The PXA platform code has a static inline helper called
gpio_to_chip which clashes with the gpiolib namespace if we
try to expose the function with the same name from gpiolib,
and it's still confusing even if we don't do that. So rename
it to gpio_to_pxachip().
Reported-by: H Hartley Sweeten <hartleys@visionengravers.com>
Cc: Eric Miao <eric.miao@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Replace sysdev classes and struct sys_device objects used for "core"
power management by the PXA platform code with struct syscore_ops
objects that are simpler.
This reduces the code size and the kernel memory footprint. It also
is necessary for removing sysdevs entirely from the kernel in the
future.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
As slab is available early now, use kzalloc() rather than
alloc_bootmem_low() in pxa_init_gpio_chip().
This removes the following boot time warning:
<4>------------[ cut here ]------------
<4>WARNING: at mm/bootmem.c:535 alloc_arch_preferred_bootmem+0x2c/0x54()
<d>Modules linked in:
[<c0029430>] (unwind_backtrace+0x0/0xdc) from [<c0036f64>] (warn_slowpath_common+0x4c/0x80)
[<c0036f64>] (warn_slowpath_common+0x4c/0x80) from [<c000ede0>] (alloc_arch_preferred_bootmem+0x2c/0x54)
[<c000ede0>] (alloc_arch_preferred_bootmem+0x2c/0x54) from [<c000f2e4>] (___alloc_bootmem_nopanic+0x34/0xd0)
[<c000f2e4>] (___alloc_bootmem_nopanic+0x34/0xd0) from [<c000f6e4>] (___alloc_bootmem+0xc/0x34)
[<c000f6e4>] (___alloc_bootmem+0xc/0x34) from [<c000cb20>] (pxa_init_gpio+0x48/0x228)
[<c000cb20>] (pxa_init_gpio+0x48/0x228) from [<c0009794>] (init_IRQ+0x34/0x44)
[<c0009794>] (init_IRQ+0x34/0x44) from [<c00089d4>] (start_kernel+0x144/0x264)
[<c00089d4>] (start_kernel+0x144/0x264) from [<a0008034>] (0xa0008034)
<4>---[ end trace 1b75b31a2719ed1c ]---
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
pxa_gpio_irq_type() and pxa_unmask_muxed_gpio() will touch non-muxed GPIOs
(0 and 1 on PXA2xx/PXA3xx) bits in GRERx and GFERx, which is incorrect.
Actually, only those bits should get updated if the corresponding bits are
set in c->irq_mask as well. Fix this by updating only those relevant bits.
Reported-and-tested-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
1. add common GPIO handling code into [arch/arm/plat-pxa]
2. common code in <mach/gpio.h> moved into <plat/gpio.h>, new processors
should implement its own <mach/gpio.h>, provide the following required
definitions and '#include <plat/gpio.h>' in the end:
- GPIO_REGS_VIRT for mapped virtual address of the GPIO registers'
physical I/O memory
- macros of GPLR(), GPSR(), GPDR() for constant optimization for
functions gpio_{set,get}_value() (so that bit-bang code can still
have tolerable performance)
- NR_BUILTIN_GPIO for the number of onchip GPIO
- definitions of __gpio_is_inverted() and __gpio_is_occupied(), they
can be either macros or inlined functions
Signed-off-by: Eric Miao <eric.miao@marvell.com>
