Commit Graph

3 Commits (1cf53d5ddb93b77ce1e277da85fe695e4c2a667d)

Author SHA1 Message Date
Kumar Gala 2e56ff206b [POWERPC] Make endianess of cfg_addr for indirect pci ops runtime
Make it so we do a runtime check to know if we need to write cfg_addr
as big or little endian.  This is needed if we want to allow 86xx support
to co-exist in the same kernel as other 6xx PPCs.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 22:29:09 -05:00
Pavel Roskin a1fdf6940a [POWERPC] Assign all PCI busses on G3 Blue & White
G3 Blue & White is misconfigured by default so that CardBus controllers
in PCI slots don't work.  The PCI bridge is programmed to only allow
access to bus 1 but not higher busses.

The patch forces the PCI busses to be reassigned if a Grackle controller
is found and the machine identifies itself as "PowerMac1,1"

Signed-off-by: Pavel Roskin <proski@gnu.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-07 14:03:22 +11:00
Paul Mackerras 830825d6c3 powerpc: Pull out MPC106 (grackle) initialization code into its own file
This is so that the 32-bit CHRP code can use it.  The MPC106
initialization code is now in arch/powerpc/sysdev/grackle.c and
is controlled by CONFIG_PPC_MPC106.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-10-26 17:16:38 +10:00