Commit graph

489 commits

Author SHA1 Message Date
Linus Torvalds
982653009b Merge branch 'core-iommu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
* 'core-iommu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86, ioapic: Consolidate the explicit EOI code
  x86, ioapic: Restore the mask bit correctly in eoi_ioapic_irq()
  x86, kdump, ioapic: Reset remote-IRR in clear_IO_APIC
  iommu: Rename the DMAR and INTR_REMAP config options
  x86, ioapic: Define irq_remap_modify_chip_defaults()
  x86, msi, intr-remap: Use the ioapic set affinity routine
  iommu: Cleanup ifdefs in detect_intel_iommu()
  iommu: No need to set dmar_disabled in check_zero_address()
  iommu: Move IOMMU specific code to intel-iommu.c
  intr_remap: Call dmar_dev_scope_init() explicitly
  x86, x2apic: Enable the bios request for x2apic optout
2011-10-26 16:11:53 +02:00
Suresh Siddha
d3f138106b iommu: Rename the DMAR and INTR_REMAP config options
Change the CONFIG_DMAR to CONFIG_INTEL_IOMMU to be consistent
with the other IOMMU options.

Rename the CONFIG_INTR_REMAP to CONFIG_IRQ_REMAP to match the
irq subsystem name.

And define the CONFIG_DMAR_TABLE for the common ACPI DMAR
routines shared by both CONFIG_INTEL_IOMMU and CONFIG_IRQ_REMAP.

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: yinghai@kernel.org
Cc: youquan.song@intel.com
Cc: joerg.roedel@amd.com
Cc: tony.luck@intel.com
Cc: dwmw2@infradead.org
Link: http://lkml.kernel.org/r/20110824001456.558630224@sbsiddha-desk.sc.intel.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2011-09-21 10:22:03 +02:00
Joe Perches
8e03bd6525 char: Convert vmalloc/memset to vzalloc
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-09-15 13:55:03 +02:00
Chris Wilson
780d7cc445 agp/intel: Fix typo in G4x_GMCH_SIZE_VT_2M
Konstantin Belousov found an error in the define of G4x_GMCH_SIZE_VT_2M
relative to the GMCH specs, and confirmed that indeed one of his users
with a Q45 reports 0xb not 0xc for a 2/2MiB GATT.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Konstantin Belousov <kostikbel@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-07-13 07:44:27 +01:00
Michel Dänzer
5613beb46d agp/uninorth: Fix lockups with radeon KMS and >1x.
This was based on a description by Ben Herrenschmidt:

> I've removed that SBA reset from the normal TLB invalidation path and
> left it only once after turning AGP on.

About six months ago, he said:

> I did it a bit differently, but yeah, you get the idea. I'm doing a
> patch series so don't bother pushing things too hard yet.

But I haven't seen anything from him about this since then, and people are
regularly hitting these lockups, so here we are...

Signed-off-by: Michel Dänzer <daenzer@vmware.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@gmail.com>
2011-05-22 20:23:09 +10:00
Jesse Barnes
246d08b8f9 agp/intel: add Ivy Bridge support
Just use the Sandy Bridge routines.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-05-13 17:11:13 -07:00
Vasiliy Kulikov
194b3da873 agp: fix arbitrary kernel memory writes
pg_start is copied from userspace on AGPIOC_BIND and AGPIOC_UNBIND ioctl
cmds of agp_ioctl() and passed to agpioc_bind_wrap().  As said in the
comment, (pg_start + mem->page_count) may wrap in case of AGPIOC_BIND,
and it is not checked at all in case of AGPIOC_UNBIND.  As a result, user
with sufficient privileges (usually "video" group) may generate either
local DoS or privilege escalation.

Signed-off-by: Vasiliy Kulikov <segoon@openwall.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-04-21 12:16:55 +10:00
Vasiliy Kulikov
b522f02184 agp: fix OOM and buffer overflow
page_count is copied from userspace.  agp_allocate_memory() tries to
check whether this number is too big, but doesn't take into account the
wrap case.  Also agp_create_user_memory() doesn't check whether
alloc_size is calculated from num_agp_pages variable without overflow.
This may lead to allocation of too small buffer with following buffer
overflow.

Another problem in agp code is not addressed in the patch - kernel memory
exhaustion (AGPIOC_RESERVE and AGPIOC_ALLOCATE ioctls).  It is not checked
whether requested pid is a pid of the caller (no check in agpioc_reserve_wrap()).
Each allocation is limited to 16KB, though, there is no per-process limit.
This might lead to OOM situation, which is not even solved in case of the
caller death by OOM killer - the memory is allocated for another (faked) process.

Signed-off-by: Vasiliy Kulikov <segoon@openwall.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-04-21 11:51:04 +10:00
Lucas De Marchi
25985edced Fix common misspellings
Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
2011-03-31 11:26:23 -03:00
Dave Airlie
fbf92bea68 Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel into drm-fixes
* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel:
  drm/i915: fix corruptions on i8xx due to relaxed fencing
  drm/i915: skip FDI & PCH enabling for DP_A
  agp/intel: Experiment with a 855GM GWB bit
  drm/i915: don't enable FDI & transcoder interrupts after all
  drm/i915: Ignore a hung GPU when flushing the framebuffer prior to a switch
2011-02-24 12:19:43 +10:00
Florian Mickler
49495d44df amd64-agp: fix crash at second module load
The module forgot to sometimes unregister some resources.

This fixes Bug #22882.

[Patch updated to 2.6.38-rc3 by Randy Dunlap.]
Tested-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Florian Mickler <florian@mickler.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-23 18:29:17 +10:00
Chris Wilson
bdb8b975fc agp/intel: Experiment with a 855GM GWB bit
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27187
Tested-by: Thorsten Vollmer <thorsten@thvo.de> (DFI-ACP G5M150-N w/852GME)
Tested-by: Moritz Brunner <2points@gmx.org> (Asus M2400N/i855GM)
Tested-by: Indan Zupancic <indan@nul.nu> (Thinkpad X40/855GM rev 02)
Tested-by: Eric Anholt <eric@anholt.net> (865G)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-22 15:52:41 +00:00
Stephen Kitt
a70b95c017 agp: ensure GART has an address before enabling it
Some BIOSs (eg.  the AMI BIOS on the Asus P4P800 motherboard) don't
initialise the GART address, and pcibios_assign_resources() can ignore it
because it can be marked as a host bridge (see
https://bugzilla.kernel.org/show_bug.cgi?id=24392#c5 for details).  This
was handled correctly up to 2.6.35, but the pci_enable_device() cleanup in
2.6.36 96576a9e1a ("agp: intel-agp: do not use PCI resources before
pci_enable_device()") means that the kernel tries to enable the GART
before assigning it an address; in such cases the GART overlaps with other
device assignments and ends up being disabled.

This patch fixes https://bugzilla.kernel.org/show_bug.cgi?id=24392

Note that I imagine efficeon-agp.c probably has the same problem, but
I can't test that and I'd like to make sure this patch is suitable for
-stable (since 2.6.36 and 2.6.37 are affected).

Signed-off-by: Stephen Kitt <steve@sk2.org>
Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Maciej Rutecki <maciej.rutecki@gmail.com>
Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
Cc: Kulikov Vasiliy <segooon@gmail.com>
Cc: Florian Mickler <florian@mickler.org>
Cc: <stable@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-04 09:43:57 +10:00
Matt Turner
cecd1455bc Revert "agp: AMD AGP is used on UP1100 & UP1500 alpha boxen"
This reverts commit f191f14407.

The AMD 751 and 761 chipsets are used on the UP1000, UP1100, and UP1500
OEM motherboards, but they neglect to do anything to make AGP work.

According to Ivan Kokshaysky:
There is quite fundamental conflict between the Alpha architecture and
x86 AGP implementation - Alpha is entirely cache coherent by design,
while x86 AGP is not (I mean native AGP DMA transactions, not a PCI over
AGP). There are no such things as non-cacheable mappings or software
support for cache flushing/invalidation on Alpha, so x86 AGP code won't
work on Nautilus.

So there's no point in allowing this driver to be configured on Alpha.

Signed-off-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-04 09:42:25 +10:00
Matt Turner
4b863b3d3e amd-k7-agp: remove non-x86 code
amd-k7-agp can't be built on Alpha anymore, so remove now unnecessary
code.

Signed-off-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-04 09:42:24 +10:00
Chris Wilson
bee4a186c1 drm/i915,agp/intel: Do not clear stolen entries
We can only utilize the stolen portion of the GTT if we are in sole
charge of the hardware. This is only true if using GEM and KMS,
otherwise VESA continues to access stolen memory.

Reported-by: Arnd Bergmann <arnd@arndb.de>
Reported-by: Frederic Weisbecker <fweisbec@gmail.com>
Tested-by: Jiri Olsa <jolsa@redhat.com>
Tested-by: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-24 18:26:25 +00:00
Oswald Buddenhagen
53371edaef agp/intel: Fix device names of i845 and 845G
They got mixed up when the switch was converted to a table in 2007.

Signed-off-by: Oswald Buddenhagen <ossi@kde.org>
[ickle: minor changes for 2.6.37+]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-14 16:36:19 +00:00
Dave Airlie
d15eda5c6e i915/gtt: fix ordering causing DMAR errors on object teardown.
Previous to the last GTT rework we always rewrote the GTT then unmapped the
object, somehow this got reversed in the rework in 2.6.37-rc5 timeframe.

This fix needs to go to stable in an alternate form since the code changed.

This fixes DMAR reports on my Ironlake HP2540p.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-12 11:39:48 +10:00
Dave Airlie
a46f3108b1 i915/gtt: fix ordering issues with status setup and DMAR
This code was setting up the status page before setting the DMAR-is-on-bit,
so we were getting DMAR errors on the status page. Reverse the two bits
of init code to the correct result.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-12 11:38:37 +10:00
Chris Wilson
c97689d886 agp/intel: Flush the chipset write buffers when changing GTT base
Flush the chipset write buffers before and after adjusting the GTT base
register, just in case. We only modify this value upon initialisation
(boot and resume) so there should be no outstanding writes, however
there are always those persistent PGTBL_ER that keep getting reported
upon resume.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:35:41 +00:00
Linus Torvalds
5b2eef966c Merge branch 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (390 commits)
  drm/radeon/kms: disable underscan by default
  drm/radeon/kms: only enable hdmi features if the monitor supports audio
  drm: Restore the old_fb upon modeset failure
  drm/nouveau: fix hwmon device binding
  radeon: consolidate asic-specific function decls for pre-r600
  vga_switcheroo: comparing too few characters in strncmp()
  drm/radeon/kms: add NI pci ids
  drm/radeon/kms: don't enable pcie gen2 on NI yet
  drm/radeon/kms: add radeon_asic struct for NI asics
  drm/radeon/kms/ni: load default sclk/mclk/vddc at pm init
  drm/radeon/kms: add ucode loader for NI
  drm/radeon/kms: add support for DCE5 display LUTs
  drm/radeon/kms: add ni_reg.h
  drm/radeon/kms: add bo blit support for NI
  drm/radeon/kms: always use writeback/events for fences on NI
  drm/radeon/kms: adjust default clock/vddc tracking for pm on DCE5
  drm/radeon/kms: add backend map workaround for barts
  drm/radeon/kms: fill gpu init for NI asics
  drm/radeon/kms: add disabled vbios accessor for NI asics
  drm/radeon/kms: handle NI thermal controller
  ...
2011-01-10 17:11:39 -08:00
Linus Torvalds
42cbd8efb0 Merge branch 'x86-amd-nb-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-amd-nb-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, cacheinfo: Cleanup L3 cache index disable support
  x86, amd-nb: Cleanup AMD northbridge caching code
  x86, amd-nb: Complete the rename of AMD NB and related code
2011-01-06 10:50:28 -08:00
Chris Wilson
9097eef024 Merge branch 'drm-intel-fixes' into drm-intel-next 2010-12-14 11:34:51 +00:00
Chris Wilson
71f4566084 agp/intel: Fix missed cached memory flags setting in i965_write_entry()
This fixes regression from a6963596a1,
that missed to set cached memory type in GTT entry.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-14 11:29:23 +00:00
Chris Wilson
5aa7d52aeb Merge branch 'drm-intel-fixes' into drm-intel-next
Immediate merge for the conflicting introduction of HAS_COHERENT_RINGS.

Conflicts:
	drivers/gpu/drm/i915/i915_dma.c
	include/drm/i915_drm.h
2010-12-05 10:43:39 +00:00
Takashi Iwai
136711be41 agp/intel: Fix wrong kunmap in i830_cleanup()
Add a missing NULL check and fix the wrong address passed to kunmap()
in i830_cleanup().

Cc: stable@kernel.org
Signed-off-by: Takashi Iwai <tiwai@suse.de>
[danvet: added cc stable]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 10:40:17 +00:00
Chris Wilson
7bdc9ab00b agp/intel: Remove duplicate const
drivers/char/agp/intel-gtt.c:340:48: warning: duplicate const

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 20:19:13 +00:00
Daniel Vetter
4080775b60 intel-gtt: export api for drm/i915
Just some minor shuffling to get rid of any agp traces in the
exported functions.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 20:14:47 +00:00
Daniel Vetter
cb16b67b5c agp: kill agp_rebind_memory
Its only user, intel-gtt.c is now gone.

Cc: Dave Airlie <airlied@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 20:14:46 +00:00
Daniel Vetter
76aaf22016 drm/i915: restore gtt on resume in the drm instead of in intel-gtt.ko
This still uses the agp functions to actually reinstate the mappings
(with a gross hack to make agp cooperate), but it wires everything
up correctly for the switchover.

The call to agp_rebind_memory can be dropped because all non-kms drivers
do all their rebinding on EnterVT.

v2: Be more paranoid and flush the chipset cache after restoring gtt
mappings.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 20:14:46 +00:00
Daniel Vetter
f050a8abbd agp: kill agp_flush_chipset and corresponding ioctl
The intel drm calls the chipset functions now directly. Userspace
never called the corresponding ioctl, hence it can be killed, too.

Cc: Dave Airlie <airlied@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 20:14:45 +00:00
Daniel Vetter
40ce657510 drm/i915/gtt: call chipset flush directly
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 20:14:44 +00:00
Daniel Vetter
23ed992a5e drm/i915|intel-gtt: consolidate intel-gtt.h headers
... and a few other defines.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 20:14:43 +00:00
Daniel Vetter
ff26860fb5 intel-gtt: fold i81x-only dcache support into the generic driver
Now the intel-gtt.c rewrite is complete!

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 20:14:43 +00:00
Daniel Vetter
820647b97a intel-gtt: switch i81x to the common initialization helpers
Still a separate agp_bridge_driver because of the i81x-only
dedicated vram support.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 20:14:42 +00:00
Daniel Vetter
625dd9d331 intel-gtt: switch i81x to the write_entry helpers
Initialization is still done with the old code with a few
added things sprinkled in to make the intel_fake_agp helper
functions work.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 20:14:42 +00:00
Daniel Vetter
24a6b387af intel-gtt: kill unneeded sandybridge memory types
Used for the now dead agp type_to_mask stuff.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 20:14:42 +00:00
Daniel Vetter
b47cf66f31 intel-gtt: drop dcache support for i830 and later
i830_check_flags already disallows it, so no need to implement it
in the write_entry function. Seems to be a remnant from i810 support.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 20:14:41 +00:00
Chris Wilson
c64f7ba5f1 agp/intel: Remove confusion of stolen entries not stolen memory
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 15:43:18 +00:00
Chris Wilson
1b6064d79b agp/intel: Remove the artificial cap on stolen size
Now that the stolen memory does not also steal entries from the GTT, we
can use all the memory the BIOS set aside for the GPU.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 15:42:59 +00:00
Chris Wilson
e624ae8e0d Merge branch 'drm-intel-fixes' into drm-intel-next
Conflicts:
	drivers/gpu/drm/i915/i915_gem.c
2010-11-22 08:51:36 +00:00
Hans Rosenfeld
9653a5c76c x86, amd-nb: Cleanup AMD northbridge caching code
Support more than just the "Misc Control" part of the northbridges.
Support more flags by turning "gart_supported" into a single bit flag
that is stored in a flags member. Clean up related code by using a set
of functions (amd_nb_num(), amd_nb_has_feature() and node_to_amd_nb())
instead of accessing the NB data structures directly. Reorder the
initialization code and put the GART flush words caching in a separate
function.

Signed-off-by: Hans Rosenfeld <hans.rosenfeld@amd.com>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2010-11-18 15:53:05 +01:00
Hans Rosenfeld
eec1d4fa00 x86, amd-nb: Complete the rename of AMD NB and related code
Not only the naming of the files was confusing, it was even more so for
the function and variable names.

Renamed the K8 NB and NUMA stuff that is also used on other AMD
platforms. This also renames the CONFIG_K8_NUMA option to
CONFIG_AMD_NUMA and the related file k8topology_64.c to
amdtopology_64.c. No functional changes intended.

Signed-off-by: Hans Rosenfeld <hans.rosenfeld@amd.com>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2010-11-18 15:53:04 +01:00
Arnd Bergmann
451a3c24b0 BKL: remove extraneous #include <smp_lock.h>
The big kernel lock has been removed from all these files at some point,
leaving only the #include.

Remove this too as a cleanup.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-11-17 08:59:32 -08:00
Chris Wilson
c94f28c383 Merge branch 'drm-intel-fixes' into drm-intel-next
Conflicts:
	drivers/gpu/drm/i915/i915_gem.c
	drivers/gpu/drm/i915/intel_ringbuffer.c
2010-11-15 06:49:30 +00:00
Dave Airlie
91839fd577 Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel
* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel:
  drm/i915: Fix LVDS fixed-mode regression from 219adae1
  drm/i915/ringbuffer: Use the HEAD auto-reporting mechanism
  drm/i915: Avoid might_fault during pwrite whilst holding our mutex
  agp/intel: fix cache control for sandybridge
  agp/intel: restore cache behavior on sandybridge
  drm/i915; Don't apply Ironlake FDI clock workaround to Sandybridge
  drm/i915: Fix KMS regression on Sandybridge/CPT
  i915: reprogram power monitoring registers on resume
  drm/i915: SNB BLT workaround
  drm/i915: Fix the graphics frequency clamping at init and when IPS is active.
  drm/i915: Allow powersave modparam to be adjusted at runtime.
  drm/i915: Apply big hammer to serialise buffer access between rings
  drm/i915: opregion_setup: iounmap correct address
  drm/i915: Flush read-only buffers from the active list upon idle as well
  i915: signedness bug in check_overlay_src()
  drm/i915: Fix typo from "Enable DisplayPort Audio"
2010-11-09 13:26:13 +10:00
Zhenyu Wang
16a02cf08a agp/intel: fix cache control for sandybridge
This is broken from 97ef1bdd0b.
Let's set the correct bit for LLC+MLC and LLC only.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: stable@kernel.org
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-04 09:39:50 +00:00
Zhenyu Wang
8d0f567082 agp/intel: restore cache behavior on sandybridge
This restores cache behavior for default AGP_USER_MEMORY as
uncached, and leave default AGP_USER_CACHED_MEMORY as LLC only.
I've seen different cache behavior on one sandybridge desktop CPU vs.
another mobile CPU. Until we figure out how to detect the real cache
config, restore back to the original behavior now.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: stable@kernel.org
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-04 09:39:28 +00:00
Zhenyu Wang
897ef19251 agp/intel: restore cache behavior on sandybridge
This restores cache behavior for default AGP_USER_MEMORY as
uncached, and leave default AGP_USER_CACHED_MEMORY as LLC only.
I've seen different cache behavior on one sandybridge desktop CPU vs.
another mobile CPU. Until we figure out how to detect the real cache
config, restore back to the original behavior now.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-02 10:05:47 +00:00
Zhenyu Wang
d110852513 agp/intel: fix cache control for sandybridge
This is broken from 97ef1bdd0b.
Let's set the correct bit for LLC+MLC and LLC only.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-02 10:05:46 +00:00