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drm/i915: Unify the FB and plane state view information into one struct 

To allow the simplification of FB/plane view computation in the
follow-up patches, unify the corresponding state in the
intel_framebuffer and intel_plane_state structs into a new intel_fb_view
struct.

This adds some overhead to intel_framebuffer as the rotated view will
have now space for 4 color planes instead of the required 2 and it'll
also contain the unused offset for each color_plane info. Imo this is an
acceptable trade-off to get a simplified way of the remap computation.

Use the new intel_fb_view struct for the FB normal view as well, so (in
the follow-up patches) we can remove the special casing for normal view
calculation wrt. the calculation of remapped/rotated views. This also
adds an overhead to the intel_framebuffer struct, as the gtt remap info
and per-color plane offset/pitch is not required for the normal view,
but imo this is an acceptable trade-off as above. The per-color plane
pitch filed will be used by a follow-up patch, so we can retrieve the
pitch for each view in the same way.

No functional changes in this patch.

v2:
- Make the patch have _no functional change_.
  (fix skl_check_nv12_aux_surface() and skl_check_main_surface()).
- s/i915_color_plane_view::pitch/stride/ (Ville)

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-17-imre.deak@intel.com
whle-ls1
Imre Deak 2021-03-28 00:09:10 +02:00
parent 5d32bcd0a7
commit 61169987c4
8 changed files with 150 additions and 136 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
drivers/gpu/drm/i915/display/i9xx_plane.c
View File

@ -271,7 +271,7 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
u32 alignment = intel_surf_alignment(fb, 0);
int cpp = fb->format->cpp[0];
while ((src_x + src_w) * cpp > plane_state->color_plane[0].stride) {
while ((src_x + src_w) * cpp > plane_state->view.color_plane[0].stride) {
if (offset == 0) {
drm_dbg_kms(&dev_priv->drm,
"Unable to find suitable display surface offset due to X-tiling\n");
@ -311,9 +311,9 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
drm_WARN_ON(&dev_priv->drm, src_x > 4095 || src_y > 4095);
}
plane_state->color_plane[0].offset = offset;
plane_state->color_plane[0].x = src_x;
plane_state->color_plane[0].y = src_y;
plane_state->view.color_plane[0].offset = offset;
plane_state->view.color_plane[0].x = src_x;
plane_state->view.color_plane[0].y = src_y;
return 0;
}
@ -424,8 +424,8 @@ static void i9xx_update_plane(struct intel_plane *plane,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
u32 linear_offset;
int x = plane_state->color_plane[0].x;
int y = plane_state->color_plane[0].y;
int x = plane_state->view.color_plane[0].x;
int y = plane_state->view.color_plane[0].y;
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
int crtc_w = drm_rect_width(&plane_state->uapi.dst);
@ -439,14 +439,14 @@ static void i9xx_update_plane(struct intel_plane *plane,
linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
if (DISPLAY_VER(dev_priv) >= 4)
dspaddr_offset = plane_state->color_plane[0].offset;
dspaddr_offset = plane_state->view.color_plane[0].offset;
else
dspaddr_offset = linear_offset;
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, DSPSTRIDE(i9xx_plane),
plane_state->color_plane[0].stride);
plane_state->view.color_plane[0].stride);
if (DISPLAY_VER(dev_priv) < 4) {
/*
@ -531,7 +531,7 @@ g4x_primary_async_flip(struct intel_plane *plane,
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
u32 dspcntr = plane_state->ctl | i9xx_plane_ctl_crtc(crtc_state);
u32 dspaddr_offset = plane_state->color_plane[0].offset;
u32 dspaddr_offset = plane_state->view.color_plane[0].offset;
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
unsigned long irqflags;
@ -552,7 +552,7 @@ vlv_primary_async_flip(struct intel_plane *plane,
bool async_flip)
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
u32 dspaddr_offset = plane_state->color_plane[0].offset;
u32 dspaddr_offset = plane_state->view.color_plane[0].offset;
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
unsigned long irqflags;

14
drivers/gpu/drm/i915/display/intel_cursor.c
View File

@ -45,7 +45,7 @@ static u32 intel_cursor_base(const struct intel_plane_state *plane_state)
else
base = intel_plane_ggtt_offset(plane_state);
return base + plane_state->color_plane[0].offset;
return base + plane_state->view.color_plane[0].offset;
}
static u32 intel_cursor_position(const struct intel_plane_state *plane_state)
@ -125,9 +125,9 @@ static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
offset += (src_h * src_w - 1) * fb->format->cpp[0];
}
plane_state->color_plane[0].offset = offset;
plane_state->color_plane[0].x = src_x;
plane_state->color_plane[0].y = src_y;
plane_state->view.color_plane[0].offset = offset;
plane_state->view.color_plane[0].x = src_x;
plane_state->view.color_plane[0].y = src_y;
return 0;
}
@ -194,7 +194,7 @@ static u32 i845_cursor_ctl(const struct intel_crtc_state *crtc_state,
{
return CURSOR_ENABLE |
CURSOR_FORMAT_ARGB |
CURSOR_STRIDE(plane_state->color_plane[0].stride);
CURSOR_STRIDE(plane_state->view.color_plane[0].stride);
}
static bool i845_cursor_size_ok(const struct intel_plane_state *plane_state)
@ -233,7 +233,7 @@ static int i845_check_cursor(struct intel_crtc_state *crtc_state,
}
drm_WARN_ON(&i915->drm, plane_state->uapi.visible &&
plane_state->color_plane[0].stride != fb->pitches[0]);
plane_state->view.color_plane[0].stride != fb->pitches[0]);
switch (fb->pitches[0]) {
case 256:
@ -450,7 +450,7 @@ static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,
}
drm_WARN_ON(&dev_priv->drm, plane_state->uapi.visible &&
plane_state->color_plane[0].stride != fb->pitches[0]);
plane_state->view.color_plane[0].stride != fb->pitches[0]);
if (fb->pitches[0] !=
drm_rect_width(&plane_state->uapi.dst) * fb->format->cpp[0]) {

22
drivers/gpu/drm/i915/display/intel_display.c
View File

@ -1013,7 +1013,7 @@ static bool intel_plane_uses_fence(const struct intel_plane_state *plane_state)
return DISPLAY_VER(dev_priv) < 4 ||
(plane->has_fbc &&
plane_state->view.type == I915_GGTT_VIEW_NORMAL);
plane_state->view.gtt.type == I915_GGTT_VIEW_NORMAL);
}
struct i915_vma *
@ -1131,7 +1131,7 @@ u32 intel_fb_xy_to_linear(int x, int y,
{
const struct drm_framebuffer *fb = state->hw.fb;
unsigned int cpp = fb->format->cpp[color_plane];
unsigned int pitch = state->color_plane[color_plane].stride;
unsigned int pitch = state->view.color_plane[color_plane].stride;
return y * pitch + x * cpp;
}
@ -1146,8 +1146,8 @@ void intel_add_fb_offsets(int *x, int *y,
int color_plane)
{
*x += state->color_plane[color_plane].x;
*y += state->color_plane[color_plane].y;
*x += state->view.color_plane[color_plane].x;
*y += state->view.color_plane[color_plane].y;
}
static unsigned int intel_fb_modifier_to_tiling(u64 fb_modifier)
@ -1650,9 +1650,9 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
valid_fb:
plane_state->rotation = plane_config->rotation;
intel_fill_fb_ggtt_view(&intel_state->view, fb,
intel_fill_fb_ggtt_view(&intel_state->view.gtt, fb,
plane_state->rotation);
intel_state->color_plane[0].stride =
intel_state->view.color_plane[0].stride =
intel_fb_pitch(fb, 0, plane_state->rotation);
__i915_vma_pin(vma);
@ -1693,7 +1693,7 @@ intel_plane_fence_y_offset(const struct intel_plane_state *plane_state)
int x = 0, y = 0;
intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0,
plane_state->color_plane[0].offset, 0);
plane_state->view.color_plane[0].offset, 0);
return y;
}
@ -6757,8 +6757,6 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
linked_state->ctl = plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE;
linked_state->color_ctl = plane_state->color_ctl;
linked_state->view = plane_state->view;
memcpy(linked_state->color_plane, plane_state->color_plane,
sizeof(linked_state->color_plane));
intel_plane_copy_hw_state(linked_state, plane_state);
linked_state->uapi.src = plane_state->uapi.src;
@ -9286,8 +9284,8 @@ static int intel_atomic_check_async(struct intel_atomic_state *state)
return -EINVAL;
}
if (old_plane_state->color_plane[0].stride !=
new_plane_state->color_plane[0].stride) {
if (old_plane_state->view.color_plane[0].stride !=
new_plane_state->view.color_plane[0].stride) {
drm_dbg_kms(&i915->drm, "Stride cannot be changed in async flip\n");
return -EINVAL;
}
@ -10520,7 +10518,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state)
}
vma = intel_pin_and_fence_fb_obj(fb,
&plane_state->view,
&plane_state->view.gtt,
intel_plane_uses_fence(plane_state),
&plane_state->flags);
if (IS_ERR(vma))

61
drivers/gpu/drm/i915/display/intel_display_types.h
View File

@ -85,20 +85,49 @@ enum intel_broadcast_rgb {
INTEL_BROADCAST_RGB_LIMITED,
};
struct intel_fb_view {
/*
* The remap information used in the remapped and rotated views to
* create the DMA scatter-gather list for each FB color plane. This sg
* list is created along with the view type (gtt.type) specific
* i915_vma object and contains the list of FB object pages (reordered
* in the rotated view) that are visible in the view.
* In the normal view the FB object's backing store sg list is used
* directly and hence the remap information here is not used.
*/
struct i915_ggtt_view gtt;
/*
* The GTT view (gtt.type) specific information for each FB color
* plane. In the normal GTT view all formats (up to 4 color planes),
* in the rotated and remapped GTT view all no-CCS formats (up to 2
* color planes) are supported.
*
* TODO: add support for CCS formats in the remapped GTT view.
*
* The view information shared by all FB color planes in the FB,
* like dst x/y and src/dst width, is stored separately in
* intel_plane_state.
*/
struct i915_color_plane_view {
u32 offset;
unsigned int x, y;
/*
* Plane stride in:
* bytes for 0/180 degree rotation
* pixels for 90/270 degree rotation
*/
unsigned int stride;
} color_plane[4];
};
struct intel_framebuffer {
struct drm_framebuffer base;
struct intel_frontbuffer *frontbuffer;
struct intel_rotation_info rot_info;
/* for each plane in the normal GTT view */
struct {
unsigned int x, y;
} normal[4];
/* for each plane in the rotated GTT view for no-CCS formats */
struct {
unsigned int x, y;
unsigned int pitch; /* pixels */
} rotated[2];
/* Params to remap the FB pages and program the plane registers in each view. */
struct intel_fb_view normal_view;
struct intel_fb_view rotated_view;
};
struct intel_fbdev {
@ -581,21 +610,11 @@ struct intel_plane_state {
enum drm_scaling_filter scaling_filter;
} hw;
struct i915_ggtt_view view;
struct i915_vma *vma;
unsigned long flags;
#define PLANE_HAS_FENCE BIT(0)
struct {
u32 offset;
/*
* Plane stride in:
* bytes for 0/180 degree rotation
* pixels for 90/270 degree rotation
*/
u32 stride;
int x, y;
} color_plane[4];
struct intel_fb_view view;
/* plane control register */
u32 ctl;

66
drivers/gpu/drm/i915/display/intel_fb.c
View File

@ -259,7 +259,7 @@ u32 intel_plane_adjust_aligned_offset(int *x, int *y,
{
return intel_adjust_aligned_offset(x, y, state->hw.fb, color_plane,
state->hw.rotation,
state->color_plane[color_plane].stride,
state->view.color_plane[color_plane].stride,
old_offset, new_offset);
}
@ -340,7 +340,7 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
struct drm_i915_private *i915 = to_i915(intel_plane->base.dev);
const struct drm_framebuffer *fb = state->hw.fb;
unsigned int rotation = state->hw.rotation;
int pitch = state->color_plane[color_plane].stride;
int pitch = state->view.color_plane[color_plane].stride;
u32 alignment;
if (intel_plane->id == PLANE_CURSOR)
@ -423,8 +423,8 @@ static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane
ccs_y = (y * vsub) % tile_height;
main_plane = skl_ccs_to_main_plane(fb, ccs_plane);
main_x = intel_fb->normal[main_plane].x % tile_width;
main_y = intel_fb->normal[main_plane].y % tile_height;
main_x = intel_fb->normal_view.color_plane[main_plane].x % tile_width;
main_y = intel_fb->normal_view.color_plane[main_plane].y % tile_height;
/*
* CCS doesn't have its own x/y offset register, so the intra CCS tile
@ -435,8 +435,8 @@ static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane
"Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
main_x, main_y,
ccs_x, ccs_y,
intel_fb->normal[main_plane].x,
intel_fb->normal[main_plane].y,
intel_fb->normal_view.color_plane[main_plane].x,
intel_fb->normal_view.color_plane[main_plane].y,
x, y);
return -EINVAL;
}
@ -487,7 +487,7 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
int intel_fb_pitch(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation)
{
if (drm_rotation_90_or_270(rotation))
return to_intel_framebuffer(fb)->rotated[color_plane].pitch;
return to_intel_framebuffer(fb)->rotated_view.color_plane[color_plane].stride;
else
return fb->pitches[color_plane];
}
@ -584,7 +584,7 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
struct drm_framebuffer *fb)
{
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
struct intel_rotation_info *rot_info = &intel_fb->rot_info;
struct intel_rotation_info *rot_info = &intel_fb->rotated_view.gtt.rotated;
unsigned int pitch_tiles;
struct drm_rect r;
@ -598,7 +598,7 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
rot_info->plane[plane] = *plane_info;
intel_fb->rotated[plane].pitch = plane_info->height * tile_height;
intel_fb->rotated_view.color_plane[plane].stride = plane_info->height * tile_height;
/* rotate the x/y offsets to match the GTT view */
drm_rect_init(&r, x, y, width, height);
@ -610,7 +610,7 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
y = r.y1;
/* rotate the tile dimensions to match the GTT view */
pitch_tiles = intel_fb->rotated[plane].pitch / tile_height;
pitch_tiles = intel_fb->rotated_view.color_plane[plane].stride / tile_height;
swap(tile_width, tile_height);
/*
@ -626,8 +626,8 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
* First pixel of the framebuffer from
* the start of the rotated gtt mapping.
*/
intel_fb->rotated[plane].x = x;
intel_fb->rotated[plane].y = y;
intel_fb->rotated_view.color_plane[plane].x = x;
intel_fb->rotated_view.color_plane[plane].y = y;
return plane_info->width * plane_info->height;
}
@ -742,8 +742,8 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
* First pixel of the framebuffer from
* the start of the normal gtt mapping.
*/
intel_fb->normal[i].x = x;
intel_fb->normal[i].y = y;
intel_fb->normal_view.color_plane[i].x = x;
intel_fb->normal_view.color_plane[i].y = y;
offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
@ -785,7 +785,7 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
to_i915(plane_state->uapi.plane->dev);
struct drm_framebuffer *fb = plane_state->hw.fb;
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
struct intel_rotation_info *info = &plane_state->view.rotated;
struct intel_rotation_info *info = &plane_state->view.gtt.rotated;
unsigned int rotation = plane_state->hw.rotation;
int i, num_planes = fb->format->num_planes;
unsigned int tile_size = intel_tile_size(i915);
@ -793,8 +793,8 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
unsigned int src_w, src_h;
u32 gtt_offset = 0;
memset(&plane_state->view, 0, sizeof(plane_state->view));
plane_state->view.type = drm_rotation_90_or_270(rotation) ?
memset(&plane_state->view.gtt, 0, sizeof(plane_state->view.gtt));
plane_state->view.gtt.type = drm_rotation_90_or_270(rotation) ?
I915_GGTT_VIEW_ROTATED : I915_GGTT_VIEW_REMAPPED;
src_x = plane_state->uapi.src.x1 >> 16;
@ -835,8 +835,8 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
* First pixel of the src viewport from the
* start of the normal gtt mapping.
*/
x += intel_fb->normal[i].x;
y += intel_fb->normal[i].y;
x += intel_fb->normal_view.color_plane[i].x;
y += intel_fb->normal_view.color_plane[i].y;
offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
@ -860,13 +860,13 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
y = r.y1;
pitch_tiles = info->plane[i].height;
plane_state->color_plane[i].stride = pitch_tiles * tile_height;
plane_state->view.color_plane[i].stride = pitch_tiles * tile_height;
/* rotate the tile dimensions to match the GTT view */
swap(tile_width, tile_height);
} else {
pitch_tiles = info->plane[i].width;
plane_state->color_plane[i].stride = pitch_tiles * tile_width * cpp;
plane_state->view.color_plane[i].stride = pitch_tiles * tile_width * cpp;
}
/*
@ -880,9 +880,9 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
gtt_offset += info->plane[i].width * info->plane[i].height;
plane_state->color_plane[i].offset = 0;
plane_state->color_plane[i].x = x;
plane_state->color_plane[i].y = y;
plane_state->view.color_plane[i].offset = 0;
plane_state->view.color_plane[i].x = x;
plane_state->view.color_plane[i].y = y;
}
}
@ -895,7 +895,7 @@ void intel_fill_fb_ggtt_view(struct i915_ggtt_view *view,
view->type = I915_GGTT_VIEW_NORMAL;
if (drm_rotation_90_or_270(rotation)) {
view->type = I915_GGTT_VIEW_ROTATED;
view->rotated = to_intel_framebuffer(fb)->rot_info;
view->rotated = to_intel_framebuffer(fb)->rotated_view.gtt.rotated;
}
}
@ -917,7 +917,7 @@ static int intel_plane_check_stride(const struct intel_plane_state *plane_state)
return 0;
/* FIXME other color planes? */
stride = plane_state->color_plane[0].stride;
stride = plane_state->view.color_plane[0].stride;
max_stride = plane->max_stride(plane, fb->format->format,
fb->modifier, rotation);
@ -955,18 +955,18 @@ int intel_plane_compute_gtt(struct intel_plane_state *plane_state)
return intel_plane_check_stride(plane_state);
}
intel_fill_fb_ggtt_view(&plane_state->view, &fb->base, rotation);
intel_fill_fb_ggtt_view(&plane_state->view.gtt, &fb->base, rotation);
for (i = 0; i < num_planes; i++) {
plane_state->color_plane[i].stride = intel_fb_pitch(&fb->base, i, rotation);
plane_state->color_plane[i].offset = 0;
plane_state->view.color_plane[i].stride = intel_fb_pitch(&fb->base, i, rotation);
plane_state->view.color_plane[i].offset = 0;
if (drm_rotation_90_or_270(rotation)) {
plane_state->color_plane[i].x = fb->rotated[i].x;
plane_state->color_plane[i].y = fb->rotated[i].y;
plane_state->view.color_plane[i].x = fb->rotated_view.color_plane[i].x;
plane_state->view.color_plane[i].y = fb->rotated_view.color_plane[i].y;
} else {
plane_state->color_plane[i].x = fb->normal[i].x;
plane_state->color_plane[i].y = fb->normal[i].y;
plane_state->view.color_plane[i].x = fb->normal_view.color_plane[i].x;
plane_state->view.color_plane[i].y = fb->normal_view.color_plane[i].y;
}
}

6
drivers/gpu/drm/i915/display/intel_fbc.c
View File

@ -716,8 +716,8 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
*/
cache->plane.src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
cache->plane.src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
cache->plane.adjusted_x = plane_state->color_plane[0].x;
cache->plane.adjusted_y = plane_state->color_plane[0].y;
cache->plane.adjusted_x = plane_state->view.color_plane[0].x;
cache->plane.adjusted_y = plane_state->view.color_plane[0].y;
cache->plane.pixel_blend_mode = plane_state->hw.pixel_blend_mode;
@ -725,7 +725,7 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
cache->fb.modifier = fb->modifier;
/* FIXME is this correct? */
cache->fb.stride = plane_state->color_plane[0].stride;
cache->fb.stride = plane_state->view.color_plane[0].stride;
if (drm_rotation_90_or_270(plane_state->hw.rotation))
cache->fb.stride *= fb->format->cpp[0];

26
drivers/gpu/drm/i915/display/intel_sprite.c
View File

@ -423,15 +423,15 @@ vlv_update_plane(struct intel_plane *plane,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum pipe pipe = plane->pipe;
enum plane_id plane_id = plane->id;
u32 sprsurf_offset = plane_state->color_plane[0].offset;
u32 sprsurf_offset = plane_state->view.color_plane[0].offset;
u32 linear_offset;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
u32 x = plane_state->color_plane[0].x;
u32 y = plane_state->color_plane[0].y;
u32 x = plane_state->view.color_plane[0].x;
u32 y = plane_state->view.color_plane[0].y;
unsigned long irqflags;
u32 sprctl;
@ -446,7 +446,7 @@ vlv_update_plane(struct intel_plane *plane,
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, SPSTRIDE(pipe, plane_id),
plane_state->color_plane[0].stride);
plane_state->view.color_plane[0].stride);
intel_de_write_fw(dev_priv, SPPOS(pipe, plane_id),
(crtc_y << 16) | crtc_x);
intel_de_write_fw(dev_priv, SPSIZE(pipe, plane_id),
@ -840,15 +840,15 @@ ivb_update_plane(struct intel_plane *plane,
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum pipe pipe = plane->pipe;
u32 sprsurf_offset = plane_state->color_plane[0].offset;
u32 sprsurf_offset = plane_state->view.color_plane[0].offset;
u32 linear_offset;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
u32 x = plane_state->color_plane[0].x;
u32 y = plane_state->color_plane[0].y;
u32 x = plane_state->view.color_plane[0].x;
u32 y = plane_state->view.color_plane[0].y;
u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
u32 sprctl, sprscale = 0;
@ -870,7 +870,7 @@ ivb_update_plane(struct intel_plane *plane,
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, SPRSTRIDE(pipe),
plane_state->color_plane[0].stride);
plane_state->view.color_plane[0].stride);
intel_de_write_fw(dev_priv, SPRPOS(pipe), (crtc_y << 16) | crtc_x);
intel_de_write_fw(dev_priv, SPRSIZE(pipe), (crtc_h << 16) | crtc_w);
if (IS_IVYBRIDGE(dev_priv))
@ -1168,15 +1168,15 @@ g4x_update_plane(struct intel_plane *plane,
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum pipe pipe = plane->pipe;
u32 dvssurf_offset = plane_state->color_plane[0].offset;
u32 dvssurf_offset = plane_state->view.color_plane[0].offset;
u32 linear_offset;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
u32 x = plane_state->color_plane[0].x;
u32 y = plane_state->color_plane[0].y;
u32 x = plane_state->view.color_plane[0].x;
u32 y = plane_state->view.color_plane[0].y;
u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
u32 dvscntr, dvsscale = 0;
@ -1198,7 +1198,7 @@ g4x_update_plane(struct intel_plane *plane,
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, DVSSTRIDE(pipe),
plane_state->color_plane[0].stride);
plane_state->view.color_plane[0].stride);
intel_de_write_fw(dev_priv, DVSPOS(pipe), (crtc_y << 16) | crtc_x);
intel_de_write_fw(dev_priv, DVSSIZE(pipe), (crtc_h << 16) | crtc_w);
intel_de_write_fw(dev_priv, DVSSCALE(pipe), dvsscale);
@ -1298,7 +1298,7 @@ g4x_sprite_check_scaling(struct intel_crtc_state *crtc_state,
int src_x, src_w, src_h, crtc_w, crtc_h;
const struct drm_display_mode *adjusted_mode =
&crtc_state->hw.adjusted_mode;
unsigned int stride = plane_state->color_plane[0].stride;
unsigned int stride = plane_state->view.color_plane[0].stride;
unsigned int cpp = fb->format->cpp[0];
unsigned int width_bytes;
int min_width, min_height;

71
drivers/gpu/drm/i915/display/skl_universal_plane.c
View File

@ -582,7 +582,7 @@ static u32 skl_plane_stride(const struct intel_plane_state *plane_state,
{
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
u32 stride = plane_state->color_plane[color_plane].stride;
u32 stride = plane_state->view.color_plane[color_plane].stride;
if (color_plane >= fb->format->num_planes)
return 0;
@ -919,14 +919,14 @@ skl_program_plane(struct intel_plane *plane,
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
u32 surf_addr = plane_state->color_plane[color_plane].offset;
u32 surf_addr = plane_state->view.color_plane[color_plane].offset;
u32 stride = skl_plane_stride(plane_state, color_plane);
const struct drm_framebuffer *fb = plane_state->hw.fb;
int aux_plane = skl_main_to_aux_plane(fb, color_plane);
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
u32 x = plane_state->color_plane[color_plane].x;
u32 y = plane_state->color_plane[color_plane].y;
u32 x = plane_state->view.color_plane[color_plane].x;
u32 y = plane_state->view.color_plane[color_plane].y;
u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
u8 alpha = plane_state->hw.alpha >> 8;
@ -958,7 +958,7 @@ skl_program_plane(struct intel_plane *plane,
}
if (aux_plane) {
aux_dist = plane_state->color_plane[aux_plane].offset - surf_addr;
aux_dist = plane_state->view.color_plane[aux_plane].offset - surf_addr;
if (DISPLAY_VER(dev_priv) < 12)
aux_dist |= skl_plane_stride(plane_state, aux_plane);
@ -1001,7 +1001,8 @@ skl_program_plane(struct intel_plane *plane,
if (DISPLAY_VER(dev_priv) < 11)
intel_de_write_fw(dev_priv, PLANE_AUX_OFFSET(pipe, plane_id),
(plane_state->color_plane[1].y << 16) | plane_state->color_plane[1].x);
(plane_state->view.color_plane[1].y << 16) |
plane_state->view.color_plane[1].x);
if (!drm_atomic_crtc_needs_modeset(&crtc_state->uapi))
intel_psr2_program_plane_sel_fetch(plane, crtc_state, plane_state, color_plane);
@ -1031,7 +1032,7 @@ skl_plane_async_flip(struct intel_plane *plane,
unsigned long irqflags;
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
u32 surf_addr = plane_state->color_plane[0].offset;
u32 surf_addr = plane_state->view.color_plane[0].offset;
u32 plane_ctl = plane_state->ctl;
plane_ctl |= skl_plane_ctl_crtc(crtc_state);
@ -1269,9 +1270,9 @@ skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state,
int ccs_plane)
{
const struct drm_framebuffer *fb = plane_state->hw.fb;
int aux_x = plane_state->color_plane[ccs_plane].x;
int aux_y = plane_state->color_plane[ccs_plane].y;
u32 aux_offset = plane_state->color_plane[ccs_plane].offset;
int aux_x = plane_state->view.color_plane[ccs_plane].x;
int aux_y = plane_state->view.color_plane[ccs_plane].y;
u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset;
u32 alignment = intel_surf_alignment(fb, ccs_plane);
int hsub;
int vsub;
@ -1301,9 +1302,9 @@ skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state,
if (aux_x != main_x || aux_y != main_y)
return false;
plane_state->color_plane[ccs_plane].offset = aux_offset;
plane_state->color_plane[ccs_plane].x = aux_x;
plane_state->color_plane[ccs_plane].y = aux_y;
plane_state->view.color_plane[ccs_plane].offset = aux_offset;
plane_state->view.color_plane[ccs_plane].x = aux_x;
plane_state->view.color_plane[ccs_plane].y = aux_y;
return true;
}
@ -1316,7 +1317,7 @@ int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
const int aux_plane = skl_main_to_aux_plane(fb, 0);
const u32 aux_offset = plane_state->color_plane[aux_plane].offset;
const u32 aux_offset = plane_state->view.color_plane[aux_plane].offset;
const u32 alignment = intel_surf_alignment(fb, 0);
const int w = drm_rect_width(&plane_state->uapi.src) >> 16;
@ -1344,7 +1345,7 @@ int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
if (fb->modifier == I915_FORMAT_MOD_X_TILED) {
int cpp = fb->format->cpp[0];
while ((*x + w) * cpp > plane_state->color_plane[0].stride) {
while ((*x + w) * cpp > plane_state->view.color_plane[0].stride) {
if (*offset == 0) {
drm_dbg_kms(&dev_priv->drm,
"Unable to find suitable display surface offset due to X-tiling\n");
@ -1403,8 +1404,8 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
offset, offset - alignment);
}
if (x != plane_state->color_plane[aux_plane].x ||
y != plane_state->color_plane[aux_plane].y) {
if (x != plane_state->view.color_plane[aux_plane].x ||
y != plane_state->view.color_plane[aux_plane].y) {
drm_dbg_kms(&dev_priv->drm,
"Unable to find suitable display surface offset due to CCS\n");
return -EINVAL;
@ -1413,9 +1414,9 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
drm_WARN_ON(&dev_priv->drm, x > 8191 || y > 8191);
plane_state->color_plane[0].offset = offset;
plane_state->color_plane[0].x = x;
plane_state->color_plane[0].y = y;
plane_state->view.color_plane[0].offset = offset;
plane_state->view.color_plane[0].x = x;
plane_state->view.color_plane[0].y = y;
/*
* Put the final coordinates back so that the src
@ -1456,7 +1457,7 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
if (is_ccs_modifier(fb->modifier)) {
int ccs_plane = main_to_ccs_plane(fb, uv_plane);
u32 aux_offset = plane_state->color_plane[ccs_plane].offset;
u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset;
u32 alignment = intel_surf_alignment(fb, uv_plane);
if (offset > aux_offset)
@ -1477,8 +1478,8 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
offset, offset - alignment);
}
if (x != plane_state->color_plane[ccs_plane].x ||
y != plane_state->color_plane[ccs_plane].y) {
if (x != plane_state->view.color_plane[ccs_plane].x ||
y != plane_state->view.color_plane[ccs_plane].y) {
drm_dbg_kms(&i915->drm,
"Unable to find suitable display surface offset due to CCS\n");
return -EINVAL;
@ -1487,9 +1488,9 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
drm_WARN_ON(&i915->drm, x > 8191 || y > 8191);
plane_state->color_plane[uv_plane].offset = offset;
plane_state->color_plane[uv_plane].x = x;
plane_state->color_plane[uv_plane].y = y;
plane_state->view.color_plane[uv_plane].offset = offset;
plane_state->view.color_plane[uv_plane].x = x;
plane_state->view.color_plane[uv_plane].y = y;
return 0;
}
@ -1526,13 +1527,9 @@ static int skl_check_ccs_aux_surface(struct intel_plane_state *plane_state)
plane_state,
ccs_plane);
plane_state->color_plane[ccs_plane].offset = offset;
plane_state->color_plane[ccs_plane].x = (x * hsub +
src_x % hsub) /
main_hsub;
plane_state->color_plane[ccs_plane].y = (y * vsub +
src_y % vsub) /
main_vsub;
plane_state->view.color_plane[ccs_plane].offset = offset;
plane_state->view.color_plane[ccs_plane].x = (x * hsub + src_x % hsub) / main_hsub;
plane_state->view.color_plane[ccs_plane].y = (y * vsub + src_y % vsub) / main_vsub;
}
return 0;
@ -1567,10 +1564,10 @@ static int skl_check_plane_surface(struct intel_plane_state *plane_state)
return ret;
}
for (i = fb->format->num_planes; i < ARRAY_SIZE(plane_state->color_plane); i++) {
plane_state->color_plane[i].offset = 0;
plane_state->color_plane[i].x = 0;
plane_state->color_plane[i].y = 0;
for (i = fb->format->num_planes; i < ARRAY_SIZE(plane_state->view.color_plane); i++) {
plane_state->view.color_plane[i].offset = 0;
plane_state->view.color_plane[i].x = 0;
plane_state->view.color_plane[i].y = 0;
}
ret = skl_check_main_surface(plane_state);