2010-09-22 15:09:43 +00:00
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/*
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* Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
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* Copyright (C) 2005-2006, Thomas Gleixner, Russell King
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*
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* This file contains the interrupt descriptor management code
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*
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* Detailed information is available in Documentation/DocBook/genericirq
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*
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*/
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#include <linux/irq.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/kernel_stat.h>
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#include <linux/radix-tree.h>
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2010-09-27 15:48:26 +00:00
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#include <linux/bitmap.h>
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2010-09-22 15:09:43 +00:00
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#include "internals.h"
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/*
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* lockdep: we want to handle all irq_desc locks as a single lock-class:
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*/
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2010-09-29 15:18:47 +00:00
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static struct lock_class_key irq_desc_lock_class;
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2010-09-22 15:09:43 +00:00
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2011-05-18 10:53:03 +00:00
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#if defined(CONFIG_SMP)
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2010-09-22 15:09:43 +00:00
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static void __init init_irq_default_affinity(void)
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{
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alloc_cpumask_var(&irq_default_affinity, GFP_NOWAIT);
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cpumask_setall(irq_default_affinity);
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}
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#else
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static void __init init_irq_default_affinity(void)
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{
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}
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#endif
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2010-09-27 15:48:26 +00:00
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#ifdef CONFIG_SMP
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static int alloc_masks(struct irq_desc *desc, gfp_t gfp, int node)
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{
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if (!zalloc_cpumask_var_node(&desc->irq_data.affinity, gfp, node))
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return -ENOMEM;
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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if (!zalloc_cpumask_var_node(&desc->pending_mask, gfp, node)) {
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free_cpumask_var(desc->irq_data.affinity);
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return -ENOMEM;
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}
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#endif
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return 0;
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}
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static void desc_smp_init(struct irq_desc *desc, int node)
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{
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2010-09-27 18:02:56 +00:00
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desc->irq_data.node = node;
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2010-09-27 15:48:26 +00:00
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cpumask_copy(desc->irq_data.affinity, irq_default_affinity);
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2010-09-29 16:46:55 +00:00
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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cpumask_clear(desc->pending_mask);
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#endif
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}
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static inline int desc_node(struct irq_desc *desc)
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{
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return desc->irq_data.node;
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2010-09-27 15:48:26 +00:00
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}
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#else
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static inline int
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alloc_masks(struct irq_desc *desc, gfp_t gfp, int node) { return 0; }
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static inline void desc_smp_init(struct irq_desc *desc, int node) { }
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2010-09-29 16:46:55 +00:00
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static inline int desc_node(struct irq_desc *desc) { return 0; }
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2010-09-27 15:48:26 +00:00
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#endif
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2011-07-11 10:17:31 +00:00
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static void desc_set_defaults(unsigned int irq, struct irq_desc *desc, int node,
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struct module *owner)
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2010-09-27 15:48:26 +00:00
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{
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2011-01-13 23:45:38 +00:00
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int cpu;
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2010-09-27 15:48:26 +00:00
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desc->irq_data.irq = irq;
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desc->irq_data.chip = &no_irq_chip;
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desc->irq_data.chip_data = NULL;
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desc->irq_data.handler_data = NULL;
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desc->irq_data.msi_desc = NULL;
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2011-02-09 13:54:49 +00:00
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irq_settings_clr_and_set(desc, ~0, _IRQ_DEFAULT_INIT_FLAGS);
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2011-03-27 09:02:49 +00:00
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irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
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2010-09-27 15:48:26 +00:00
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desc->handle_irq = handle_bad_irq;
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desc->depth = 1;
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2010-09-29 16:46:55 +00:00
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desc->irq_count = 0;
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desc->irqs_unhandled = 0;
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2010-09-27 15:48:26 +00:00
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desc->name = NULL;
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2011-07-11 10:17:31 +00:00
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desc->owner = owner;
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2011-01-13 23:45:38 +00:00
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for_each_possible_cpu(cpu)
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*per_cpu_ptr(desc->kstat_irqs, cpu) = 0;
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2010-09-27 15:48:26 +00:00
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desc_smp_init(desc, node);
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}
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2010-09-22 15:09:43 +00:00
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int nr_irqs = NR_IRQS;
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EXPORT_SYMBOL_GPL(nr_irqs);
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2010-10-08 10:47:53 +00:00
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static DEFINE_MUTEX(sparse_irq_lock);
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2011-02-17 16:45:15 +00:00
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static DECLARE_BITMAP(allocated_irqs, IRQ_BITMAP_BITS);
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2010-09-27 15:48:26 +00:00
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2010-09-22 15:09:43 +00:00
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#ifdef CONFIG_SPARSE_IRQ
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2010-10-05 13:14:35 +00:00
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static RADIX_TREE(irq_desc_tree, GFP_KERNEL);
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2010-09-22 15:09:43 +00:00
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2010-09-27 15:48:26 +00:00
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static void irq_insert_desc(unsigned int irq, struct irq_desc *desc)
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2010-09-22 15:09:43 +00:00
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{
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radix_tree_insert(&irq_desc_tree, irq, desc);
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}
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struct irq_desc *irq_to_desc(unsigned int irq)
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{
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return radix_tree_lookup(&irq_desc_tree, irq);
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}
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2010-09-27 15:48:26 +00:00
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static void delete_irq_desc(unsigned int irq)
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{
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radix_tree_delete(&irq_desc_tree, irq);
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}
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#ifdef CONFIG_SMP
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static void free_masks(struct irq_desc *desc)
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{
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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free_cpumask_var(desc->pending_mask);
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#endif
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2010-10-12 19:58:27 +00:00
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free_cpumask_var(desc->irq_data.affinity);
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2010-09-27 15:48:26 +00:00
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}
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#else
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static inline void free_masks(struct irq_desc *desc) { }
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#endif
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2011-07-11 10:17:31 +00:00
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static struct irq_desc *alloc_desc(int irq, int node, struct module *owner)
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2010-09-27 15:48:26 +00:00
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{
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struct irq_desc *desc;
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2010-10-05 13:14:35 +00:00
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gfp_t gfp = GFP_KERNEL;
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2010-09-27 15:48:26 +00:00
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desc = kzalloc_node(sizeof(*desc), gfp, node);
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if (!desc)
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return NULL;
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/* allocate based on nr_cpu_ids */
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2011-01-13 23:45:38 +00:00
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desc->kstat_irqs = alloc_percpu(unsigned int);
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2010-09-27 15:48:26 +00:00
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if (!desc->kstat_irqs)
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goto err_desc;
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if (alloc_masks(desc, gfp, node))
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goto err_kstat;
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raw_spin_lock_init(&desc->lock);
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lockdep_set_class(&desc->lock, &irq_desc_lock_class);
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2011-07-11 10:17:31 +00:00
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desc_set_defaults(irq, desc, node, owner);
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2010-09-27 15:48:26 +00:00
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return desc;
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err_kstat:
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2011-01-13 23:45:38 +00:00
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free_percpu(desc->kstat_irqs);
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2010-09-27 15:48:26 +00:00
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err_desc:
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kfree(desc);
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return NULL;
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}
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static void free_desc(unsigned int irq)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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2010-09-30 00:46:07 +00:00
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unregister_irq_proc(irq, desc);
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2010-10-08 10:47:53 +00:00
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mutex_lock(&sparse_irq_lock);
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2010-09-27 15:48:26 +00:00
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delete_irq_desc(irq);
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2010-10-08 10:47:53 +00:00
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mutex_unlock(&sparse_irq_lock);
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2010-09-27 15:48:26 +00:00
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free_masks(desc);
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2011-01-13 23:45:38 +00:00
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free_percpu(desc->kstat_irqs);
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2010-09-27 15:48:26 +00:00
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kfree(desc);
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}
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2011-07-11 10:17:31 +00:00
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static int alloc_descs(unsigned int start, unsigned int cnt, int node,
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struct module *owner)
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2010-09-27 15:48:26 +00:00
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{
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struct irq_desc *desc;
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int i;
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for (i = 0; i < cnt; i++) {
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2011-07-11 10:17:31 +00:00
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desc = alloc_desc(start + i, node, owner);
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2010-09-27 15:48:26 +00:00
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if (!desc)
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goto err;
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2010-10-08 10:47:53 +00:00
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mutex_lock(&sparse_irq_lock);
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2010-09-27 15:48:26 +00:00
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irq_insert_desc(start + i, desc);
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2010-10-08 10:47:53 +00:00
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mutex_unlock(&sparse_irq_lock);
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2010-09-27 15:48:26 +00:00
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}
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return start;
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err:
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for (i--; i >= 0; i--)
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free_desc(start + i);
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2010-10-08 10:47:53 +00:00
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mutex_lock(&sparse_irq_lock);
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2010-09-27 15:48:26 +00:00
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bitmap_clear(allocated_irqs, start, cnt);
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2010-10-08 10:47:53 +00:00
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mutex_unlock(&sparse_irq_lock);
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2010-09-27 15:48:26 +00:00
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return -ENOMEM;
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}
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2011-02-19 19:07:37 +00:00
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static int irq_expand_nr_irqs(unsigned int nr)
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2011-02-16 16:12:57 +00:00
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{
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2011-02-19 19:07:37 +00:00
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if (nr > IRQ_BITMAP_BITS)
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2011-02-16 16:12:57 +00:00
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return -ENOMEM;
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2011-02-19 19:07:37 +00:00
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nr_irqs = nr;
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2011-02-16 16:12:57 +00:00
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return 0;
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}
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2010-09-22 15:09:43 +00:00
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int __init early_irq_init(void)
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{
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2010-09-27 18:55:03 +00:00
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int i, initcnt, node = first_online_node;
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2010-09-22 15:09:43 +00:00
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struct irq_desc *desc;
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init_irq_default_affinity();
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2010-09-27 18:55:03 +00:00
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/* Let arch update nr_irqs and return the nr of preallocated irqs */
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initcnt = arch_probe_nr_irqs();
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printk(KERN_INFO "NR_IRQS:%d nr_irqs:%d %d\n", NR_IRQS, nr_irqs, initcnt);
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2010-09-22 15:09:43 +00:00
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2011-02-17 16:45:15 +00:00
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if (WARN_ON(nr_irqs > IRQ_BITMAP_BITS))
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nr_irqs = IRQ_BITMAP_BITS;
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if (WARN_ON(initcnt > IRQ_BITMAP_BITS))
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initcnt = IRQ_BITMAP_BITS;
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if (initcnt > nr_irqs)
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nr_irqs = initcnt;
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2010-09-27 18:55:03 +00:00
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for (i = 0; i < initcnt; i++) {
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2011-07-11 10:17:31 +00:00
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desc = alloc_desc(i, node, NULL);
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2010-09-27 18:02:56 +00:00
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set_bit(i, allocated_irqs);
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irq_insert_desc(i, desc);
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2010-09-22 15:09:43 +00:00
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}
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return arch_early_irq_init();
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}
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#else /* !CONFIG_SPARSE_IRQ */
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struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
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[0 ... NR_IRQS-1] = {
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.handle_irq = handle_bad_irq,
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.depth = 1,
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.lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc->lock),
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}
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};
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int __init early_irq_init(void)
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{
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2010-09-27 18:02:56 +00:00
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int count, i, node = first_online_node;
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2010-09-22 15:09:43 +00:00
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struct irq_desc *desc;
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init_irq_default_affinity();
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printk(KERN_INFO "NR_IRQS:%d\n", NR_IRQS);
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desc = irq_desc;
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count = ARRAY_SIZE(irq_desc);
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for (i = 0; i < count; i++) {
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2011-01-13 23:45:38 +00:00
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desc[i].kstat_irqs = alloc_percpu(unsigned int);
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2011-05-31 16:14:39 +00:00
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alloc_masks(&desc[i], GFP_KERNEL, node);
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raw_spin_lock_init(&desc[i].lock);
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2010-09-22 13:58:45 +00:00
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lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
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2011-07-11 10:17:31 +00:00
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desc_set_defaults(i, &desc[i], node, NULL);
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2010-09-22 15:09:43 +00:00
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}
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return arch_early_irq_init();
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}
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struct irq_desc *irq_to_desc(unsigned int irq)
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{
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return (irq < NR_IRQS) ? irq_desc + irq : NULL;
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}
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2010-09-27 15:48:26 +00:00
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static void free_desc(unsigned int irq)
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{
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2010-09-29 16:46:55 +00:00
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dynamic_irq_cleanup(irq);
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2010-09-27 15:48:26 +00:00
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}
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2011-07-11 10:17:31 +00:00
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static inline int alloc_descs(unsigned int start, unsigned int cnt, int node,
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struct module *owner)
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2010-09-27 15:48:26 +00:00
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{
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2011-07-11 10:17:31 +00:00
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u32 i;
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for (i = 0; i < cnt; i++) {
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struct irq_desc *desc = irq_to_desc(start + i);
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desc->owner = owner;
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}
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2010-09-27 15:48:26 +00:00
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return start;
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}
|
2011-02-16 16:12:57 +00:00
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2011-02-19 19:07:37 +00:00
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static int irq_expand_nr_irqs(unsigned int nr)
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2011-02-16 16:12:57 +00:00
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{
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return -ENOMEM;
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}
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2010-09-22 15:09:43 +00:00
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#endif /* !CONFIG_SPARSE_IRQ */
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2011-05-18 10:48:00 +00:00
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/**
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* generic_handle_irq - Invoke the handler for a particular irq
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* @irq: The irq number to handle
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*
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*/
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int generic_handle_irq(unsigned int irq)
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{
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|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
|
|
|
|
if (!desc)
|
|
|
|
return -EINVAL;
|
|
|
|
generic_handle_irq_desc(irq, desc);
|
|
|
|
return 0;
|
|
|
|
}
|
2011-05-18 09:39:04 +00:00
|
|
|
EXPORT_SYMBOL_GPL(generic_handle_irq);
|
2011-05-18 10:48:00 +00:00
|
|
|
|
2010-09-27 15:48:26 +00:00
|
|
|
/* Dynamic interrupt handling */
|
|
|
|
|
|
|
|
/**
|
|
|
|
* irq_free_descs - free irq descriptors
|
|
|
|
* @from: Start of descriptor range
|
|
|
|
* @cnt: Number of consecutive irqs to free
|
|
|
|
*/
|
|
|
|
void irq_free_descs(unsigned int from, unsigned int cnt)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (from >= nr_irqs || (from + cnt) > nr_irqs)
|
|
|
|
return;
|
|
|
|
|
|
|
|
for (i = 0; i < cnt; i++)
|
|
|
|
free_desc(from + i);
|
|
|
|
|
2010-10-08 10:47:53 +00:00
|
|
|
mutex_lock(&sparse_irq_lock);
|
2010-09-27 15:48:26 +00:00
|
|
|
bitmap_clear(allocated_irqs, from, cnt);
|
2010-10-08 10:47:53 +00:00
|
|
|
mutex_unlock(&sparse_irq_lock);
|
2010-09-27 15:48:26 +00:00
|
|
|
}
|
2011-05-18 09:39:04 +00:00
|
|
|
EXPORT_SYMBOL_GPL(irq_free_descs);
|
2010-09-27 15:48:26 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* irq_alloc_descs - allocate and initialize a range of irq descriptors
|
|
|
|
* @irq: Allocate for specific irq number if irq >= 0
|
|
|
|
* @from: Start the search from this irq number
|
|
|
|
* @cnt: Number of consecutive irqs to allocate.
|
|
|
|
* @node: Preferred node on which the irq descriptor should be allocated
|
2011-08-18 19:19:27 +00:00
|
|
|
* @owner: Owning module (can be NULL)
|
2010-09-27 15:48:26 +00:00
|
|
|
*
|
|
|
|
* Returns the first irq number or error code
|
|
|
|
*/
|
|
|
|
int __ref
|
2011-07-11 10:17:31 +00:00
|
|
|
__irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
|
|
|
|
struct module *owner)
|
2010-09-27 15:48:26 +00:00
|
|
|
{
|
|
|
|
int start, ret;
|
|
|
|
|
|
|
|
if (!cnt)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2011-06-02 17:55:13 +00:00
|
|
|
if (irq >= 0) {
|
|
|
|
if (from > irq)
|
|
|
|
return -EINVAL;
|
|
|
|
from = irq;
|
|
|
|
}
|
|
|
|
|
2010-10-08 10:47:53 +00:00
|
|
|
mutex_lock(&sparse_irq_lock);
|
2010-09-27 15:48:26 +00:00
|
|
|
|
2011-02-19 19:07:37 +00:00
|
|
|
start = bitmap_find_next_zero_area(allocated_irqs, IRQ_BITMAP_BITS,
|
|
|
|
from, cnt, 0);
|
2010-09-27 15:48:26 +00:00
|
|
|
ret = -EEXIST;
|
|
|
|
if (irq >=0 && start != irq)
|
|
|
|
goto err;
|
|
|
|
|
2011-02-19 19:07:37 +00:00
|
|
|
if (start + cnt > nr_irqs) {
|
|
|
|
ret = irq_expand_nr_irqs(start + cnt);
|
2011-02-16 16:12:57 +00:00
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
}
|
2010-09-27 15:48:26 +00:00
|
|
|
|
|
|
|
bitmap_set(allocated_irqs, start, cnt);
|
2010-10-08 10:47:53 +00:00
|
|
|
mutex_unlock(&sparse_irq_lock);
|
2011-07-11 10:17:31 +00:00
|
|
|
return alloc_descs(start, cnt, node, owner);
|
2010-09-27 15:48:26 +00:00
|
|
|
|
|
|
|
err:
|
2010-10-08 10:47:53 +00:00
|
|
|
mutex_unlock(&sparse_irq_lock);
|
2010-09-27 15:48:26 +00:00
|
|
|
return ret;
|
|
|
|
}
|
2011-07-11 10:17:31 +00:00
|
|
|
EXPORT_SYMBOL_GPL(__irq_alloc_descs);
|
2010-09-27 15:48:26 +00:00
|
|
|
|
2010-10-12 10:31:46 +00:00
|
|
|
/**
|
|
|
|
* irq_reserve_irqs - mark irqs allocated
|
|
|
|
* @from: mark from irq number
|
|
|
|
* @cnt: number of irqs to mark
|
|
|
|
*
|
|
|
|
* Returns 0 on success or an appropriate error code
|
|
|
|
*/
|
|
|
|
int irq_reserve_irqs(unsigned int from, unsigned int cnt)
|
|
|
|
{
|
|
|
|
unsigned int start;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (!cnt || (from + cnt) > nr_irqs)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2010-10-08 10:47:53 +00:00
|
|
|
mutex_lock(&sparse_irq_lock);
|
2010-10-12 10:31:46 +00:00
|
|
|
start = bitmap_find_next_zero_area(allocated_irqs, nr_irqs, from, cnt, 0);
|
|
|
|
if (start == from)
|
|
|
|
bitmap_set(allocated_irqs, start, cnt);
|
|
|
|
else
|
|
|
|
ret = -EEXIST;
|
2010-10-08 10:47:53 +00:00
|
|
|
mutex_unlock(&sparse_irq_lock);
|
2010-10-12 10:31:46 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2010-09-30 08:45:07 +00:00
|
|
|
/**
|
|
|
|
* irq_get_next_irq - get next allocated irq number
|
|
|
|
* @offset: where to start the search
|
|
|
|
*
|
|
|
|
* Returns next irq number after offset or nr_irqs if none is found.
|
|
|
|
*/
|
|
|
|
unsigned int irq_get_next_irq(unsigned int offset)
|
|
|
|
{
|
|
|
|
return find_next_bit(allocated_irqs, nr_irqs, offset);
|
|
|
|
}
|
|
|
|
|
2011-02-12 11:16:16 +00:00
|
|
|
struct irq_desc *
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 16:03:06 +00:00
|
|
|
__irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus,
|
|
|
|
unsigned int check)
|
2011-02-12 11:16:16 +00:00
|
|
|
{
|
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
|
|
|
|
if (desc) {
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 16:03:06 +00:00
|
|
|
if (check & _IRQ_DESC_CHECK) {
|
|
|
|
if ((check & _IRQ_DESC_PERCPU) &&
|
|
|
|
!irq_settings_is_per_cpu_devid(desc))
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
if (!(check & _IRQ_DESC_PERCPU) &&
|
|
|
|
irq_settings_is_per_cpu_devid(desc))
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2011-02-12 11:16:16 +00:00
|
|
|
if (bus)
|
|
|
|
chip_bus_lock(desc);
|
|
|
|
raw_spin_lock_irqsave(&desc->lock, *flags);
|
|
|
|
}
|
|
|
|
return desc;
|
|
|
|
}
|
|
|
|
|
|
|
|
void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus)
|
|
|
|
{
|
|
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
|
|
|
if (bus)
|
|
|
|
chip_bus_sync_unlock(desc);
|
|
|
|
}
|
|
|
|
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 16:03:06 +00:00
|
|
|
int irq_set_percpu_devid(unsigned int irq)
|
|
|
|
{
|
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
|
|
|
|
if (!desc)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (desc->percpu_enabled)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
desc->percpu_enabled = kzalloc(sizeof(*desc->percpu_enabled), GFP_KERNEL);
|
|
|
|
|
|
|
|
if (!desc->percpu_enabled)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
irq_set_percpu_devid_flags(irq);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-09-29 16:46:55 +00:00
|
|
|
/**
|
|
|
|
* dynamic_irq_cleanup - cleanup a dynamically allocated irq
|
|
|
|
* @irq: irq number to initialize
|
|
|
|
*/
|
|
|
|
void dynamic_irq_cleanup(unsigned int irq)
|
2010-09-22 15:09:43 +00:00
|
|
|
{
|
2010-09-29 16:46:55 +00:00
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
raw_spin_lock_irqsave(&desc->lock, flags);
|
2011-07-11 10:17:31 +00:00
|
|
|
desc_set_defaults(irq, desc, desc_node(desc), NULL);
|
2010-09-29 16:46:55 +00:00
|
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
2010-09-22 15:09:43 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
|
|
|
|
{
|
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
2011-01-13 23:45:38 +00:00
|
|
|
|
|
|
|
return desc && desc->kstat_irqs ?
|
|
|
|
*per_cpu_ptr(desc->kstat_irqs, cpu) : 0;
|
2010-09-22 15:09:43 +00:00
|
|
|
}
|
2010-10-27 22:34:15 +00:00
|
|
|
|
|
|
|
unsigned int kstat_irqs(unsigned int irq)
|
|
|
|
{
|
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
int cpu;
|
|
|
|
int sum = 0;
|
|
|
|
|
2011-01-13 23:45:38 +00:00
|
|
|
if (!desc || !desc->kstat_irqs)
|
2010-10-27 22:34:15 +00:00
|
|
|
return 0;
|
|
|
|
for_each_possible_cpu(cpu)
|
2011-01-13 23:45:38 +00:00
|
|
|
sum += *per_cpu_ptr(desc->kstat_irqs, cpu);
|
2010-10-27 22:34:15 +00:00
|
|
|
return sum;
|
|
|
|
}
|