2005-04-16 22:20:36 +00:00
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/*
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* $Id: proc.c,v 1.13 1998/05/12 07:36:07 mj Exp $
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*
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* Procfs interface for the PCI bus.
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*
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* Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/module.h>
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#include <linux/proc_fs.h>
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#include <linux/seq_file.h>
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#include <linux/smp_lock.h>
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#include <asm/uaccess.h>
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#include <asm/byteorder.h>
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2005-04-08 05:53:31 +00:00
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#include "pci.h"
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2005-04-16 22:20:36 +00:00
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static int proc_initialized; /* = 0 */
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static loff_t
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proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
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{
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loff_t new = -1;
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struct inode *inode = file->f_dentry->d_inode;
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down(&inode->i_sem);
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switch (whence) {
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case 0:
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new = off;
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break;
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case 1:
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new = file->f_pos + off;
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break;
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case 2:
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new = inode->i_size + off;
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break;
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}
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if (new < 0 || new > inode->i_size)
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new = -EINVAL;
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else
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file->f_pos = new;
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up(&inode->i_sem);
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return new;
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}
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static ssize_t
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proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *ppos)
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{
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const struct inode *ino = file->f_dentry->d_inode;
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const struct proc_dir_entry *dp = PDE(ino);
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struct pci_dev *dev = dp->data;
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unsigned int pos = *ppos;
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unsigned int cnt, size;
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/*
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* Normal users can read only the standardized portion of the
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* configuration space as several chips lock up when trying to read
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* undefined locations (think of Intel PIIX4 as a typical example).
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*/
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if (capable(CAP_SYS_ADMIN))
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size = dev->cfg_size;
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else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
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size = 128;
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else
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size = 64;
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if (pos >= size)
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return 0;
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if (nbytes >= size)
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nbytes = size;
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if (pos + nbytes > size)
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nbytes = size - pos;
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cnt = nbytes;
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if (!access_ok(VERIFY_WRITE, buf, cnt))
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return -EINVAL;
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if ((pos & 1) && cnt) {
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unsigned char val;
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2005-09-27 08:21:55 +00:00
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pci_user_read_config_byte(dev, pos, &val);
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2005-04-16 22:20:36 +00:00
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__put_user(val, buf);
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buf++;
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pos++;
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cnt--;
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}
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if ((pos & 3) && cnt > 2) {
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unsigned short val;
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2005-09-27 08:21:55 +00:00
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pci_user_read_config_word(dev, pos, &val);
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2005-04-16 22:20:36 +00:00
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__put_user(cpu_to_le16(val), (unsigned short __user *) buf);
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buf += 2;
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pos += 2;
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cnt -= 2;
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}
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while (cnt >= 4) {
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unsigned int val;
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2005-09-27 08:21:55 +00:00
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pci_user_read_config_dword(dev, pos, &val);
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2005-04-16 22:20:36 +00:00
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__put_user(cpu_to_le32(val), (unsigned int __user *) buf);
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buf += 4;
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pos += 4;
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cnt -= 4;
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}
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if (cnt >= 2) {
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unsigned short val;
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2005-09-27 08:21:55 +00:00
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pci_user_read_config_word(dev, pos, &val);
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2005-04-16 22:20:36 +00:00
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__put_user(cpu_to_le16(val), (unsigned short __user *) buf);
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buf += 2;
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pos += 2;
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cnt -= 2;
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}
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if (cnt) {
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unsigned char val;
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2005-09-27 08:21:55 +00:00
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pci_user_read_config_byte(dev, pos, &val);
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2005-04-16 22:20:36 +00:00
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__put_user(val, buf);
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buf++;
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pos++;
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cnt--;
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}
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*ppos = pos;
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return nbytes;
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}
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static ssize_t
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proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos)
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{
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const struct inode *ino = file->f_dentry->d_inode;
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const struct proc_dir_entry *dp = PDE(ino);
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struct pci_dev *dev = dp->data;
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int pos = *ppos;
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int size = dev->cfg_size;
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int cnt;
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if (pos >= size)
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return 0;
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if (nbytes >= size)
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nbytes = size;
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if (pos + nbytes > size)
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nbytes = size - pos;
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cnt = nbytes;
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if (!access_ok(VERIFY_READ, buf, cnt))
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return -EINVAL;
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if ((pos & 1) && cnt) {
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unsigned char val;
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__get_user(val, buf);
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2005-09-27 08:21:55 +00:00
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pci_user_write_config_byte(dev, pos, val);
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2005-04-16 22:20:36 +00:00
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buf++;
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pos++;
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cnt--;
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}
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if ((pos & 3) && cnt > 2) {
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unsigned short val;
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__get_user(val, (unsigned short __user *) buf);
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2005-09-27 08:21:55 +00:00
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pci_user_write_config_word(dev, pos, le16_to_cpu(val));
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2005-04-16 22:20:36 +00:00
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buf += 2;
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pos += 2;
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cnt -= 2;
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}
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while (cnt >= 4) {
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unsigned int val;
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__get_user(val, (unsigned int __user *) buf);
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2005-09-27 08:21:55 +00:00
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pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
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2005-04-16 22:20:36 +00:00
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buf += 4;
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pos += 4;
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cnt -= 4;
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}
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if (cnt >= 2) {
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unsigned short val;
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__get_user(val, (unsigned short __user *) buf);
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2005-09-27 08:21:55 +00:00
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pci_user_write_config_word(dev, pos, le16_to_cpu(val));
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2005-04-16 22:20:36 +00:00
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buf += 2;
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pos += 2;
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cnt -= 2;
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}
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if (cnt) {
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unsigned char val;
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__get_user(val, buf);
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2005-09-27 08:21:55 +00:00
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pci_user_write_config_byte(dev, pos, val);
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2005-04-16 22:20:36 +00:00
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buf++;
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pos++;
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cnt--;
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}
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*ppos = pos;
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return nbytes;
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}
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struct pci_filp_private {
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enum pci_mmap_state mmap_state;
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int write_combine;
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};
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static int proc_bus_pci_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
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{
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const struct proc_dir_entry *dp = PDE(inode);
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struct pci_dev *dev = dp->data;
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#ifdef HAVE_PCI_MMAP
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struct pci_filp_private *fpriv = file->private_data;
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#endif /* HAVE_PCI_MMAP */
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int ret = 0;
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switch (cmd) {
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case PCIIOC_CONTROLLER:
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ret = pci_domain_nr(dev->bus);
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break;
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#ifdef HAVE_PCI_MMAP
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case PCIIOC_MMAP_IS_IO:
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fpriv->mmap_state = pci_mmap_io;
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break;
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case PCIIOC_MMAP_IS_MEM:
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fpriv->mmap_state = pci_mmap_mem;
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break;
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case PCIIOC_WRITE_COMBINE:
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if (arg)
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fpriv->write_combine = 1;
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else
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fpriv->write_combine = 0;
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break;
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#endif /* HAVE_PCI_MMAP */
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default:
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ret = -EINVAL;
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break;
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};
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return ret;
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}
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#ifdef HAVE_PCI_MMAP
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static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
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{
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struct inode *inode = file->f_dentry->d_inode;
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const struct proc_dir_entry *dp = PDE(inode);
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struct pci_dev *dev = dp->data;
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struct pci_filp_private *fpriv = file->private_data;
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int ret;
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if (!capable(CAP_SYS_RAWIO))
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return -EPERM;
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ret = pci_mmap_page_range(dev, vma,
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fpriv->mmap_state,
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fpriv->write_combine);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int proc_bus_pci_open(struct inode *inode, struct file *file)
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{
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struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
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if (!fpriv)
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return -ENOMEM;
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fpriv->mmap_state = pci_mmap_io;
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fpriv->write_combine = 0;
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file->private_data = fpriv;
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return 0;
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}
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static int proc_bus_pci_release(struct inode *inode, struct file *file)
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{
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kfree(file->private_data);
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file->private_data = NULL;
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return 0;
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}
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#endif /* HAVE_PCI_MMAP */
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static struct file_operations proc_bus_pci_operations = {
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.llseek = proc_bus_pci_lseek,
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.read = proc_bus_pci_read,
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.write = proc_bus_pci_write,
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.ioctl = proc_bus_pci_ioctl,
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#ifdef HAVE_PCI_MMAP
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.open = proc_bus_pci_open,
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.release = proc_bus_pci_release,
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.mmap = proc_bus_pci_mmap,
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#ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
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.get_unmapped_area = get_pci_unmapped_area,
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#endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
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#endif /* HAVE_PCI_MMAP */
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};
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#if BITS_PER_LONG == 32
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#define LONG_FORMAT "\t%08lx"
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#else
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#define LONG_FORMAT "\t%16lx"
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#endif
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/* iterator */
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static void *pci_seq_start(struct seq_file *m, loff_t *pos)
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{
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struct pci_dev *dev = NULL;
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loff_t n = *pos;
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for_each_pci_dev(dev) {
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if (!n--)
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break;
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}
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return dev;
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}
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static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
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{
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struct pci_dev *dev = v;
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(*pos)++;
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dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
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return dev;
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}
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static void pci_seq_stop(struct seq_file *m, void *v)
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{
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if (v) {
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struct pci_dev *dev = v;
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pci_dev_put(dev);
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}
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}
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static int show_device(struct seq_file *m, void *v)
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{
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const struct pci_dev *dev = v;
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const struct pci_driver *drv;
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int i;
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if (dev == NULL)
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return 0;
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drv = pci_dev_driver(dev);
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seq_printf(m, "%02x%02x\t%04x%04x\t%x",
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dev->bus->number,
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dev->devfn,
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dev->vendor,
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dev->device,
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dev->irq);
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/* Here should be 7 and not PCI_NUM_RESOURCES as we need to preserve compatibility */
|
2005-05-13 07:44:10 +00:00
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for (i=0; i<7; i++) {
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u64 start, end;
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pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
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2005-04-16 22:20:36 +00:00
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seq_printf(m, LONG_FORMAT,
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2005-05-13 07:44:10 +00:00
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((unsigned long)start) |
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2005-04-16 22:20:36 +00:00
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(dev->resource[i].flags & PCI_REGION_FLAG_MASK));
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2005-05-13 07:44:10 +00:00
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}
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for (i=0; i<7; i++) {
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u64 start, end;
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pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
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2005-04-16 22:20:36 +00:00
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seq_printf(m, LONG_FORMAT,
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dev->resource[i].start < dev->resource[i].end ?
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2005-05-13 07:44:10 +00:00
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(unsigned long)(end - start) + 1 : 0);
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}
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2005-04-16 22:20:36 +00:00
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seq_putc(m, '\t');
|
|
|
|
if (drv)
|
|
|
|
seq_printf(m, "%s", drv->name);
|
|
|
|
seq_putc(m, '\n');
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct seq_operations proc_bus_pci_devices_op = {
|
|
|
|
.start = pci_seq_start,
|
|
|
|
.next = pci_seq_next,
|
|
|
|
.stop = pci_seq_stop,
|
|
|
|
.show = show_device
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct proc_dir_entry *proc_bus_pci_dir;
|
|
|
|
|
|
|
|
int pci_proc_attach_device(struct pci_dev *dev)
|
|
|
|
{
|
|
|
|
struct pci_bus *bus = dev->bus;
|
|
|
|
struct proc_dir_entry *e;
|
|
|
|
char name[16];
|
|
|
|
|
|
|
|
if (!proc_initialized)
|
|
|
|
return -EACCES;
|
|
|
|
|
|
|
|
if (!bus->procdir) {
|
|
|
|
if (pci_proc_domain(bus)) {
|
|
|
|
sprintf(name, "%04x:%02x", pci_domain_nr(bus),
|
|
|
|
bus->number);
|
|
|
|
} else {
|
|
|
|
sprintf(name, "%02x", bus->number);
|
|
|
|
}
|
|
|
|
bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
|
|
|
|
if (!bus->procdir)
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
|
|
|
|
e = create_proc_entry(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir);
|
|
|
|
if (!e)
|
|
|
|
return -ENOMEM;
|
|
|
|
e->proc_fops = &proc_bus_pci_operations;
|
|
|
|
e->data = dev;
|
|
|
|
e->size = dev->cfg_size;
|
|
|
|
dev->procent = e;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int pci_proc_detach_device(struct pci_dev *dev)
|
|
|
|
{
|
|
|
|
struct proc_dir_entry *e;
|
|
|
|
|
|
|
|
if ((e = dev->procent)) {
|
|
|
|
if (atomic_read(&e->count))
|
|
|
|
return -EBUSY;
|
|
|
|
remove_proc_entry(e->name, dev->bus->procdir);
|
|
|
|
dev->procent = NULL;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int pci_proc_attach_bus(struct pci_bus* bus)
|
|
|
|
{
|
|
|
|
struct proc_dir_entry *de = bus->procdir;
|
|
|
|
|
|
|
|
if (!proc_initialized)
|
|
|
|
return -EACCES;
|
|
|
|
|
|
|
|
if (!de) {
|
|
|
|
char name[16];
|
|
|
|
sprintf(name, "%02x", bus->number);
|
|
|
|
de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
|
|
|
|
if (!de)
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int pci_proc_detach_bus(struct pci_bus* bus)
|
|
|
|
{
|
|
|
|
struct proc_dir_entry *de = bus->procdir;
|
|
|
|
if (de)
|
|
|
|
remove_proc_entry(de->name, proc_bus_pci_dir);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_PCI_LEGACY_PROC
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Backward compatible /proc/pci interface.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Convert some of the configuration space registers of the device at
|
|
|
|
* address (bus,devfn) into a string (possibly several lines each).
|
|
|
|
* The configuration string is stored starting at buf[len]. If the
|
|
|
|
* string would exceed the size of the buffer (SIZE), 0 is returned.
|
|
|
|
*/
|
|
|
|
static int show_dev_config(struct seq_file *m, void *v)
|
|
|
|
{
|
|
|
|
struct pci_dev *dev = v;
|
|
|
|
struct pci_dev *first_dev;
|
|
|
|
struct pci_driver *drv;
|
|
|
|
u32 class_rev;
|
2005-07-17 02:22:20 +00:00
|
|
|
unsigned char latency, min_gnt, max_lat;
|
2005-04-16 22:20:36 +00:00
|
|
|
int reg;
|
|
|
|
|
|
|
|
first_dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL);
|
|
|
|
if (dev == first_dev)
|
|
|
|
seq_puts(m, "PCI devices found:\n");
|
|
|
|
pci_dev_put(first_dev);
|
|
|
|
|
|
|
|
drv = pci_dev_driver(dev);
|
|
|
|
|
2005-09-27 08:21:55 +00:00
|
|
|
pci_user_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
|
|
|
|
pci_user_read_config_byte (dev, PCI_LATENCY_TIMER, &latency);
|
|
|
|
pci_user_read_config_byte (dev, PCI_MIN_GNT, &min_gnt);
|
|
|
|
pci_user_read_config_byte (dev, PCI_MAX_LAT, &max_lat);
|
2005-04-16 22:20:36 +00:00
|
|
|
seq_printf(m, " Bus %2d, device %3d, function %2d:\n",
|
|
|
|
dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
|
2005-07-17 02:22:20 +00:00
|
|
|
seq_printf(m, " Class %04x", class_rev >> 16);
|
2005-04-16 22:20:36 +00:00
|
|
|
seq_printf(m, ": PCI device %04x:%04x", dev->vendor, dev->device);
|
|
|
|
seq_printf(m, " (rev %d).\n", class_rev & 0xff);
|
|
|
|
|
|
|
|
if (dev->irq)
|
|
|
|
seq_printf(m, " IRQ %d.\n", dev->irq);
|
|
|
|
|
|
|
|
if (latency || min_gnt || max_lat) {
|
|
|
|
seq_printf(m, " Master Capable. ");
|
|
|
|
if (latency)
|
|
|
|
seq_printf(m, "Latency=%d. ", latency);
|
|
|
|
else
|
|
|
|
seq_puts(m, "No bursts. ");
|
|
|
|
if (min_gnt)
|
|
|
|
seq_printf(m, "Min Gnt=%d.", min_gnt);
|
|
|
|
if (max_lat)
|
|
|
|
seq_printf(m, "Max Lat=%d.", max_lat);
|
|
|
|
seq_putc(m, '\n');
|
|
|
|
}
|
|
|
|
|
|
|
|
for (reg = 0; reg < 6; reg++) {
|
|
|
|
struct resource *res = dev->resource + reg;
|
|
|
|
unsigned long base, end, flags;
|
|
|
|
|
|
|
|
base = res->start;
|
|
|
|
end = res->end;
|
|
|
|
flags = res->flags;
|
|
|
|
if (!end)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (flags & PCI_BASE_ADDRESS_SPACE_IO) {
|
|
|
|
seq_printf(m, " I/O at 0x%lx [0x%lx].\n",
|
|
|
|
base, end);
|
|
|
|
} else {
|
|
|
|
const char *pref, *type = "unknown";
|
|
|
|
|
|
|
|
if (flags & PCI_BASE_ADDRESS_MEM_PREFETCH)
|
|
|
|
pref = "P";
|
|
|
|
else
|
|
|
|
pref = "Non-p";
|
|
|
|
switch (flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
|
|
|
|
case PCI_BASE_ADDRESS_MEM_TYPE_32:
|
|
|
|
type = "32 bit"; break;
|
|
|
|
case PCI_BASE_ADDRESS_MEM_TYPE_1M:
|
|
|
|
type = "20 bit"; break;
|
|
|
|
case PCI_BASE_ADDRESS_MEM_TYPE_64:
|
|
|
|
type = "64 bit"; break;
|
|
|
|
}
|
|
|
|
seq_printf(m, " %srefetchable %s memory at "
|
|
|
|
"0x%lx [0x%lx].\n", pref, type,
|
|
|
|
base,
|
|
|
|
end);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct seq_operations proc_pci_op = {
|
|
|
|
.start = pci_seq_start,
|
|
|
|
.next = pci_seq_next,
|
|
|
|
.stop = pci_seq_stop,
|
|
|
|
.show = show_dev_config
|
|
|
|
};
|
|
|
|
|
|
|
|
static int proc_pci_open(struct inode *inode, struct file *file)
|
|
|
|
{
|
|
|
|
return seq_open(file, &proc_pci_op);
|
|
|
|
}
|
|
|
|
static struct file_operations proc_pci_operations = {
|
|
|
|
.open = proc_pci_open,
|
|
|
|
.read = seq_read,
|
|
|
|
.llseek = seq_lseek,
|
|
|
|
.release = seq_release,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void legacy_proc_init(void)
|
|
|
|
{
|
|
|
|
struct proc_dir_entry * entry = create_proc_entry("pci", 0, NULL);
|
|
|
|
if (entry)
|
|
|
|
entry->proc_fops = &proc_pci_operations;
|
|
|
|
}
|
|
|
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
static void legacy_proc_init(void)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* CONFIG_PCI_LEGACY_PROC */
|
|
|
|
|
|
|
|
static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
|
|
|
|
{
|
|
|
|
return seq_open(file, &proc_bus_pci_devices_op);
|
|
|
|
}
|
|
|
|
static struct file_operations proc_bus_pci_dev_operations = {
|
|
|
|
.open = proc_bus_pci_dev_open,
|
|
|
|
.read = seq_read,
|
|
|
|
.llseek = seq_lseek,
|
|
|
|
.release = seq_release,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init pci_proc_init(void)
|
|
|
|
{
|
|
|
|
struct proc_dir_entry *entry;
|
|
|
|
struct pci_dev *dev = NULL;
|
|
|
|
proc_bus_pci_dir = proc_mkdir("pci", proc_bus);
|
|
|
|
entry = create_proc_entry("devices", 0, proc_bus_pci_dir);
|
|
|
|
if (entry)
|
|
|
|
entry->proc_fops = &proc_bus_pci_dev_operations;
|
|
|
|
proc_initialized = 1;
|
|
|
|
while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
|
|
|
|
pci_proc_attach_device(dev);
|
|
|
|
}
|
|
|
|
legacy_proc_init();
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
__initcall(pci_proc_init);
|
|
|
|
|
|
|
|
#ifdef CONFIG_HOTPLUG
|
|
|
|
EXPORT_SYMBOL(pci_proc_attach_device);
|
|
|
|
EXPORT_SYMBOL(pci_proc_attach_bus);
|
|
|
|
EXPORT_SYMBOL(pci_proc_detach_bus);
|
|
|
|
#endif
|
|
|
|
|