106 lines
3.0 KiB
C
106 lines
3.0 KiB
C
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/*
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* cmmdefs.h
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*
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* DSP-BIOS Bridge driver support functions for TI OMAP processors.
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*
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* Global MEM constants and types.
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*
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* Copyright (C) 2008 Texas Instruments, Inc.
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*
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* This package is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
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* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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*/
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#ifndef CMMDEFS_
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#define CMMDEFS_
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#include <dspbridge/list.h>
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/* Cmm attributes used in cmm_create() */
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struct cmm_mgrattrs {
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/* Minimum SM allocation; default 32 bytes. */
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u32 ul_min_block_size;
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};
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/* Attributes for CMM_AllocBuf() & CMM_AllocDesc() */
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struct cmm_attrs {
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u32 ul_seg_id; /* 1,2... are SM segments. 0 is not. */
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u32 ul_alignment; /* 0,1,2,4....ul_min_block_size */
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};
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/*
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* DSPPa to GPPPa Conversion Factor.
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*
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* For typical platforms:
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* converted Address = PaDSP + ( c_factor * addressToConvert).
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*/
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#define CMM_SUBFROMDSPPA -1
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#define CMM_ADDTODSPPA 1
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#define CMM_ALLSEGMENTS 0xFFFFFF /* All SegIds */
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#define CMM_MAXGPPSEGS 1 /* Maximum # of SM segs */
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/*
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* SMSEGs are SM segments the DSP allocates from.
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*
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* This info is used by the GPP to xlate DSP allocated PAs.
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*/
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struct cmm_seginfo {
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u32 dw_seg_base_pa; /* Start Phys address of SM segment */
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/* Total size in bytes of segment: DSP+GPP */
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u32 ul_total_seg_size;
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u32 dw_gpp_base_pa; /* Start Phys addr of Gpp SM seg */
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u32 ul_gpp_size; /* Size of Gpp SM seg in bytes */
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u32 dw_dsp_base_va; /* DSP virt base byte address */
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u32 ul_dsp_size; /* DSP seg size in bytes */
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/* # of current GPP allocations from this segment */
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u32 ul_in_use_cnt;
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u32 dw_seg_base_va; /* Start Virt address of SM seg */
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};
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/* CMM useful information */
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struct cmm_info {
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/* # of SM segments registered with this Cmm. */
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u32 ul_num_gppsm_segs;
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/* Total # of allocations outstanding for CMM */
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u32 ul_total_in_use_cnt;
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/* Min SM block size allocation from cmm_create() */
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u32 ul_min_block_size;
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/* Info per registered SM segment. */
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struct cmm_seginfo seg_info[CMM_MAXGPPSEGS];
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};
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/* XlatorCreate attributes */
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struct cmm_xlatorattrs {
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u32 ul_seg_id; /* segment Id used for SM allocations */
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u32 dw_dsp_bufs; /* # of DSP-side bufs */
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u32 dw_dsp_buf_size; /* size of DSP-side bufs in GPP bytes */
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/* Vm base address alloc'd in client process context */
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void *vm_base;
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/* dw_vm_size must be >= (dwMaxNumBufs * dwMaxSize) */
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u32 dw_vm_size;
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};
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/*
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* Cmm translation types. Use to map SM addresses to process context.
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*/
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enum cmm_xlatetype {
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CMM_VA2PA = 0, /* Virtual to GPP physical address xlation */
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CMM_PA2VA = 1, /* GPP Physical to virtual */
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CMM_VA2DSPPA = 2, /* Va to DSP Pa */
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CMM_PA2DSPPA = 3, /* GPP Pa to DSP Pa */
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CMM_DSPPA2PA = 4, /* DSP Pa to GPP Pa */
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};
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struct cmm_object;
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struct cmm_xlatorobject;
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#endif /* CMMDEFS_ */
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