2008-08-30 08:55:48 +00:00
|
|
|
/*
|
|
|
|
|
|
|
|
Broadcom B43 wireless driver
|
|
|
|
IEEE 802.11g LP-PHY driver
|
|
|
|
|
2009-01-31 15:52:29 +00:00
|
|
|
Copyright (c) 2008-2009 Michael Buesch <mb@bu3sch.de>
|
2008-08-30 08:55:48 +00:00
|
|
|
|
|
|
|
This program is free software; you can redistribute it and/or modify
|
|
|
|
it under the terms of the GNU General Public License as published by
|
|
|
|
the Free Software Foundation; either version 2 of the License, or
|
|
|
|
(at your option) any later version.
|
|
|
|
|
|
|
|
This program is distributed in the hope that it will be useful,
|
|
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
|
GNU General Public License for more details.
|
|
|
|
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
|
|
along with this program; see the file COPYING. If not, write to
|
|
|
|
the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
|
|
|
|
Boston, MA 02110-1301, USA.
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include "b43.h"
|
|
|
|
#include "phy_lp.h"
|
|
|
|
#include "phy_common.h"
|
2009-01-31 15:52:29 +00:00
|
|
|
#include "tables_lpphy.h"
|
2008-08-30 08:55:48 +00:00
|
|
|
|
|
|
|
|
|
|
|
static int b43_lpphy_op_allocate(struct b43_wldev *dev)
|
|
|
|
{
|
|
|
|
struct b43_phy_lp *lpphy;
|
|
|
|
|
|
|
|
lpphy = kzalloc(sizeof(*lpphy), GFP_KERNEL);
|
|
|
|
if (!lpphy)
|
|
|
|
return -ENOMEM;
|
|
|
|
dev->phy.lp = lpphy;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-09-02 11:00:34 +00:00
|
|
|
static void b43_lpphy_op_prepare_structs(struct b43_wldev *dev)
|
2008-08-30 08:55:48 +00:00
|
|
|
{
|
2008-09-02 11:00:34 +00:00
|
|
|
struct b43_phy *phy = &dev->phy;
|
|
|
|
struct b43_phy_lp *lpphy = phy->lp;
|
2008-08-30 08:55:48 +00:00
|
|
|
|
2008-09-02 11:00:34 +00:00
|
|
|
memset(lpphy, 0, sizeof(*lpphy));
|
2008-08-30 08:55:48 +00:00
|
|
|
|
2008-09-02 11:00:34 +00:00
|
|
|
//TODO
|
2008-08-30 08:55:48 +00:00
|
|
|
}
|
|
|
|
|
2008-09-02 11:00:34 +00:00
|
|
|
static void b43_lpphy_op_free(struct b43_wldev *dev)
|
2008-08-30 08:55:48 +00:00
|
|
|
{
|
|
|
|
struct b43_phy_lp *lpphy = dev->phy.lp;
|
|
|
|
|
|
|
|
kfree(lpphy);
|
|
|
|
dev->phy.lp = NULL;
|
|
|
|
}
|
|
|
|
|
2009-01-31 13:20:44 +00:00
|
|
|
static void lpphy_table_init(struct b43_wldev *dev)
|
|
|
|
{
|
|
|
|
//TODO
|
|
|
|
}
|
|
|
|
|
|
|
|
static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
|
|
|
|
{
|
|
|
|
B43_WARN_ON(1);//TODO rev < 2 not supported, yet.
|
|
|
|
}
|
|
|
|
|
|
|
|
static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev)
|
|
|
|
{
|
2009-01-31 15:52:29 +00:00
|
|
|
struct b43_phy_lp *lpphy = dev->phy.lp;
|
|
|
|
|
|
|
|
b43_phy_write(dev, B43_LPPHY_AFE_DAC_CTL, 0x50);
|
|
|
|
b43_phy_write(dev, B43_LPPHY_AFE_CTL, 0x8800);
|
|
|
|
b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVR, 0);
|
|
|
|
b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0);
|
|
|
|
b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_0, 0);
|
|
|
|
b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_2, 0);
|
|
|
|
b43_phy_write(dev, B43_PHY_OFDM(0xF9), 0);
|
|
|
|
b43_phy_write(dev, B43_LPPHY_TR_LOOKUP_1, 0);
|
|
|
|
b43_phy_set(dev, B43_LPPHY_ADC_COMPENSATION_CTL, 0x10);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_OFDMSYNCTHRESH0, 0xFF00, 0x78);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_DCOFFSETTRANSIENT, 0xF8FF, 0x200);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_DCOFFSETTRANSIENT, 0xFF00, 0x7F);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xFF0F, 0x40);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_PREAMBLECONFIRMTO, 0xFF00, 0x2);
|
|
|
|
b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x4000);
|
|
|
|
b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x2000);
|
|
|
|
b43_phy_set(dev, B43_PHY_OFDM(0x10A), 0x1);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_CCKLMSSTEPSIZE, 0xFF01, 0x10);
|
|
|
|
b43_phy_maskset(dev, B43_PHY_OFDM(0xDF), 0xFF00, 0xF4);
|
|
|
|
b43_phy_maskset(dev, B43_PHY_OFDM(0xDF), 0x00FF, 0xF100);//FIXME specs are different
|
|
|
|
b43_phy_write(dev, B43_LPPHY_CLIPTHRESH, 0x48);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0xFF00, 0x46);
|
|
|
|
b43_phy_maskset(dev, B43_PHY_OFDM(0xE4), 0xFF00, 0x10);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_PWR_THRESH1, 0xFFF0, 0x9);
|
|
|
|
b43_phy_mask(dev, B43_LPPHY_GAINDIRECTMISMATCH, ~0xF);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0x00FF, 0x5500);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xF81F, 0xA0);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xE0FF, 0x300);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0x00FF, 0x2A00);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x1E00);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0xD);
|
|
|
|
b43_phy_maskset(dev, B43_PHY_OFDM(0xFE), 0xFFE0, 0x1F);
|
|
|
|
b43_phy_maskset(dev, B43_PHY_OFDM(0xFF), 0xFFE0, 0xC);
|
|
|
|
b43_phy_maskset(dev, B43_PHY_OFDM(0x100), 0xFF00, 0x19);
|
|
|
|
b43_phy_maskset(dev, B43_PHY_OFDM(0xFF), 0x03FF, 0x3C00);
|
|
|
|
b43_phy_maskset(dev, B43_PHY_OFDM(0xFE), 0xFC1F, 0x3E0);
|
|
|
|
b43_phy_maskset(dev, B43_PHY_OFDM(0xFF), 0xFFE0, 0xC);
|
|
|
|
b43_phy_maskset(dev, B43_PHY_OFDM(0x100), 0x00FF, 0x1900);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0x83FF, 0x5800);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFFE0, 0x12);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_GAINMISMATCH, 0x0FFF, 0x9000);
|
|
|
|
|
|
|
|
if (dev->phy.rev < 2) {
|
|
|
|
//FIXME this will never execute.
|
|
|
|
|
|
|
|
//FIXME 32bit?
|
|
|
|
b43_lptab_write(dev, B43_LPTAB32(0x11, 0x14), 0);
|
|
|
|
b43_lptab_write(dev, B43_LPTAB32(0x08, 0x12), 0x40);
|
|
|
|
} else {
|
|
|
|
//FIXME 32bit?
|
|
|
|
b43_lptab_write(dev, B43_LPTAB32(0x08, 0x14), 0);
|
|
|
|
b43_lptab_write(dev, B43_LPTAB32(0x08, 0x12), 0x40);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
|
|
|
|
b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x40);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xF0FF, 0xB00);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_SYNCPEAKCNT, 0xFFF8, 0x6);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_MINPWR_LEVEL, 0x00FF, 0x9D00);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_MINPWR_LEVEL, 0xFF00, 0xA1);
|
|
|
|
} else /* 5GHz */
|
|
|
|
b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x40);
|
|
|
|
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0xFF00, 0xB3);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0x00FF, 0xAD00);
|
|
|
|
b43_phy_maskset(dev, B43_LPPHY_INPUT_PWRDB, 0xFF00, lpphy->rx_pwr_offset);
|
|
|
|
b43_phy_set(dev, B43_LPPHY_RESET_CTL, 0x44);
|
|
|
|
b43_phy_write(dev, B43_LPPHY_RESET_CTL, 0x80);
|
|
|
|
b43_phy_write(dev, B43_LPPHY_AFE_RSSI_CTL_0, 0xA954);
|
|
|
|
b43_phy_write(dev, B43_LPPHY_AFE_RSSI_CTL_1,
|
|
|
|
0x2000 | ((u16)lpphy->rssi_gs << 10) |
|
|
|
|
((u16)lpphy->rssi_vc << 4) | lpphy->rssi_vf);
|
2009-01-31 13:20:44 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void lpphy_baseband_init(struct b43_wldev *dev)
|
|
|
|
{
|
|
|
|
lpphy_table_init(dev);
|
|
|
|
if (dev->phy.rev >= 2)
|
|
|
|
lpphy_baseband_rev2plus_init(dev);
|
|
|
|
else
|
|
|
|
lpphy_baseband_rev0_1_init(dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void lpphy_radio_init(struct b43_wldev *dev)
|
|
|
|
{
|
|
|
|
//TODO
|
|
|
|
}
|
|
|
|
|
2008-09-02 11:00:34 +00:00
|
|
|
static int b43_lpphy_op_init(struct b43_wldev *dev)
|
|
|
|
{
|
2009-01-31 13:20:44 +00:00
|
|
|
/* TODO: band SPROM */
|
|
|
|
lpphy_baseband_init(dev);
|
|
|
|
lpphy_radio_init(dev);
|
|
|
|
|
2008-09-02 11:00:34 +00:00
|
|
|
//TODO
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-08-30 08:55:48 +00:00
|
|
|
static u16 b43_lpphy_op_read(struct b43_wldev *dev, u16 reg)
|
|
|
|
{
|
2008-08-30 09:49:45 +00:00
|
|
|
b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
|
|
|
|
return b43_read16(dev, B43_MMIO_PHY_DATA);
|
2008-08-30 08:55:48 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void b43_lpphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
|
|
|
|
{
|
2008-08-30 09:49:45 +00:00
|
|
|
b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
|
|
|
|
b43_write16(dev, B43_MMIO_PHY_DATA, value);
|
2008-08-30 08:55:48 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static u16 b43_lpphy_op_radio_read(struct b43_wldev *dev, u16 reg)
|
|
|
|
{
|
2008-08-30 09:49:45 +00:00
|
|
|
/* Register 1 is a 32-bit register. */
|
|
|
|
B43_WARN_ON(reg == 1);
|
|
|
|
/* LP-PHY needs a special bit set for read access */
|
|
|
|
if (dev->phy.rev < 2) {
|
|
|
|
if (reg != 0x4001)
|
|
|
|
reg |= 0x100;
|
|
|
|
} else
|
|
|
|
reg |= 0x200;
|
|
|
|
|
|
|
|
b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
|
|
|
|
return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW);
|
2008-08-30 08:55:48 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void b43_lpphy_op_radio_write(struct b43_wldev *dev, u16 reg, u16 value)
|
|
|
|
{
|
|
|
|
/* Register 1 is a 32-bit register. */
|
|
|
|
B43_WARN_ON(reg == 1);
|
|
|
|
|
2008-08-30 09:49:45 +00:00
|
|
|
b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
|
|
|
|
b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value);
|
2008-08-30 08:55:48 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void b43_lpphy_op_software_rfkill(struct b43_wldev *dev,
|
|
|
|
enum rfkill_state state)
|
|
|
|
{
|
|
|
|
//TODO
|
|
|
|
}
|
|
|
|
|
|
|
|
static int b43_lpphy_op_switch_channel(struct b43_wldev *dev,
|
|
|
|
unsigned int new_channel)
|
|
|
|
{
|
|
|
|
//TODO
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static unsigned int b43_lpphy_op_get_default_chan(struct b43_wldev *dev)
|
|
|
|
{
|
|
|
|
return 1; /* Default to channel 1 */
|
|
|
|
}
|
|
|
|
|
|
|
|
static void b43_lpphy_op_set_rx_antenna(struct b43_wldev *dev, int antenna)
|
|
|
|
{
|
|
|
|
//TODO
|
|
|
|
}
|
|
|
|
|
|
|
|
static void b43_lpphy_op_adjust_txpower(struct b43_wldev *dev)
|
|
|
|
{
|
|
|
|
//TODO
|
|
|
|
}
|
|
|
|
|
|
|
|
static enum b43_txpwr_result b43_lpphy_op_recalc_txpower(struct b43_wldev *dev,
|
|
|
|
bool ignore_tssi)
|
|
|
|
{
|
|
|
|
//TODO
|
|
|
|
return B43_TXPWR_RES_DONE;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
const struct b43_phy_operations b43_phyops_lp = {
|
|
|
|
.allocate = b43_lpphy_op_allocate,
|
2008-09-02 11:00:34 +00:00
|
|
|
.free = b43_lpphy_op_free,
|
|
|
|
.prepare_structs = b43_lpphy_op_prepare_structs,
|
2008-08-30 08:55:48 +00:00
|
|
|
.init = b43_lpphy_op_init,
|
|
|
|
.phy_read = b43_lpphy_op_read,
|
|
|
|
.phy_write = b43_lpphy_op_write,
|
|
|
|
.radio_read = b43_lpphy_op_radio_read,
|
|
|
|
.radio_write = b43_lpphy_op_radio_write,
|
|
|
|
.software_rfkill = b43_lpphy_op_software_rfkill,
|
2008-09-03 10:12:20 +00:00
|
|
|
.switch_analog = b43_phyop_switch_analog_generic,
|
2008-08-30 08:55:48 +00:00
|
|
|
.switch_channel = b43_lpphy_op_switch_channel,
|
|
|
|
.get_default_chan = b43_lpphy_op_get_default_chan,
|
|
|
|
.set_rx_antenna = b43_lpphy_op_set_rx_antenna,
|
|
|
|
.recalc_txpower = b43_lpphy_op_recalc_txpower,
|
|
|
|
.adjust_txpower = b43_lpphy_op_adjust_txpower,
|
|
|
|
};
|