56 lines
1.3 KiB
C
56 lines
1.3 KiB
C
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/*
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*
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*/
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#ifndef _MIPS_EV96100_H
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#define _MIPS_EV96100_H
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#include <asm/addrspace.h>
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/*
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* GT64120 config space base address
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*/
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#define GT64120_BASE (KSEG1ADDR(0x14000000))
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#define MIPS_GT_BASE GT64120_BASE
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/*
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* PCI Bus allocation
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*/
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#define GT_PCI_MEM_BASE 0x12000000UL
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#define GT_PCI_MEM_SIZE 0x02000000UL
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#define GT_PCI_IO_BASE 0x10000000UL
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#define GT_PCI_IO_SIZE 0x02000000UL
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#define GT_ISA_IO_BASE PCI_IO_BASE
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/*
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* Duart I/O ports.
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*/
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#define EV96100_COM1_BASE_ADDR (0xBD000000 + 0x20)
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#define EV96100_COM2_BASE_ADDR (0xBD000000 + 0x00)
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/*
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* EV96100 interrupt controller register base.
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*/
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#define EV96100_ICTRL_REGS_BASE (KSEG1ADDR(0x1f000000))
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/*
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* EV96100 UART register base.
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*/
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#define EV96100_UART0_REGS_BASE EV96100_COM1_BASE_ADDR
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#define EV96100_UART1_REGS_BASE EV96100_COM2_BASE_ADDR
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#define EV96100_BASE_BAUD ( 3686400 / 16 )
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/*
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* Because of an error/peculiarity in the Galileo chip, we need to swap the
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* bytes when running bigendian.
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*/
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#define __GT_READ(ofs) \
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(*(volatile u32 *)(GT64120_BASE+(ofs)))
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#define __GT_WRITE(ofs, data) \
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do { *(volatile u32 *)(GT64120_BASE+(ofs)) = (data); } while (0)
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#define GT_READ(ofs) le32_to_cpu(__GT_READ(ofs))
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#define GT_WRITE(ofs, data) __GT_WRITE(ofs, cpu_to_le32(data))
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#endif /* !(_MIPS_EV96100_H) */
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