542 lines
16 KiB
C
542 lines
16 KiB
C
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/*
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* Copyright (C) 1997 Cullen Jennings
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* Copyright (C) 1998 Elmer.Joandi@ut.ee, +37-255-13500
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* GNU General Public License applies
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*/
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#include <linux/module.h>
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/skbuff.h>
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#include <linux/if_ether.h> /* For the statistics structure. */
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#include <linux/if_arp.h> /* For ARPHRD_ETHER */
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#include <linux/ptrace.h>
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#include <linux/ioport.h>
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#include <linux/in.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/bitops.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <linux/errno.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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//#define ARLAN_DEBUGGING 1
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#define ARLAN_PROC_INTERFACE
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#define MAX_ARLANS 4 /* not more than 4 ! */
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#define ARLAN_PROC_SHM_DUMP /* shows all card registers, makes driver way larger */
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#define ARLAN_MAX_MULTICAST_ADDRS 16
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#define ARLAN_RCV_CLEAN 0
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#define ARLAN_RCV_PROMISC 1
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#define ARLAN_RCV_CONTROL 2
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#ifdef CONFIG_PROC_FS
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extern int init_arlan_proc(void);
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extern void cleanup_arlan_proc(void);
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#else
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#define init_arlan_proc() ({ 0; })
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#define cleanup_arlan_proc() do { } while (0)
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#endif
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extern struct net_device *arlan_device[MAX_ARLANS];
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extern int arlan_debug;
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extern int arlan_entry_debug;
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extern int arlan_exit_debug;
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extern int testMemory;
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extern int arlan_command(struct net_device * dev, int command);
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#define SIDUNKNOWN -1
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#define radioNodeIdUNKNOWN -1
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#define irqUNKNOWN 0
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#define debugUNKNOWN 0
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#define testMemoryUNKNOWN 1
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#define spreadingCodeUNKNOWN 0
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#define channelNumberUNKNOWN 0
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#define channelSetUNKNOWN 0
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#define systemIdUNKNOWN -1
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#define registrationModeUNKNOWN -1
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#define IFDEBUG( L ) if ( (L) & arlan_debug )
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#define ARLAN_FAKE_HDR_LEN 12
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#ifdef ARLAN_DEBUGGING
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#define DEBUG 1
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#define ARLAN_ENTRY_EXIT_DEBUGGING 1
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#define ARLAN_DEBUG(a,b) printk(KERN_DEBUG a, b)
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#else
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#define ARLAN_DEBUG(a,b)
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#endif
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#define ARLAN_SHMEM_SIZE 0x2000
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struct arlan_shmem
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{
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/* Header Signature */
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volatile char textRegion[48];
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volatile u_char resetFlag;
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volatile u_char diagnosticInfo;
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volatile u_short diagnosticOffset;
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volatile u_char _1[12];
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volatile u_char lanCardNodeId[6];
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volatile u_char broadcastAddress[6];
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volatile u_char hardwareType;
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volatile u_char majorHardwareVersion;
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volatile u_char minorHardwareVersion;
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volatile u_char radioModule;// shows EEPROM, can be overridden at 0x111
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volatile u_char defaultChannelSet; // shows EEProm, can be overriiden at 0x10A
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volatile u_char _2[47];
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/* Control/Status Block - 0x0080 */
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volatile u_char interruptInProgress; /* not used by lancpu */
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volatile u_char cntrlRegImage; /* not used by lancpu */
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volatile u_char _3[13];
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volatile u_char dumpByte;
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volatile u_char commandByte; /* non-zero = active */
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volatile u_char commandParameter[15];
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/* Receive Status - 0x00a0 */
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volatile u_char rxStatus; /* 1- data, 2-control, 0xff - registr change */
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volatile u_char rxFrmType;
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volatile u_short rxOffset;
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volatile u_short rxLength;
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volatile u_char rxSrc[6];
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volatile u_char rxBroadcastFlag;
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volatile u_char rxQuality;
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volatile u_char scrambled;
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volatile u_char _4[1];
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/* Transmit Status - 0x00b0 */
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volatile u_char txStatus;
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volatile u_char txAckQuality;
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volatile u_char numRetries;
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volatile u_char _5[14];
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volatile u_char registeredRouter[6];
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volatile u_char backboneRouter[6];
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volatile u_char registrationStatus;
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volatile u_char configuredStatusFlag;
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volatile u_char _6[1];
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volatile u_char ultimateDestAddress[6];
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volatile u_char immedDestAddress[6];
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volatile u_char immedSrcAddress[6];
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volatile u_short rxSequenceNumber;
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volatile u_char assignedLocaltalkAddress;
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volatile u_char _7[27];
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/* System Parameter Block */
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/* - Driver Parameters (Novell Specific) */
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volatile u_short txTimeout;
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volatile u_short transportTime;
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volatile u_char _8[4];
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/* - Configuration Parameters */
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volatile u_char irqLevel;
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volatile u_char spreadingCode;
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volatile u_char channelSet;
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volatile u_char channelNumber;
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volatile u_short radioNodeId;
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volatile u_char _9[2];
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volatile u_char scramblingDisable;
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volatile u_char radioType;
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volatile u_short routerId;
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volatile u_char _10[9];
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volatile u_char txAttenuation;
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volatile u_char systemId[4];
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volatile u_short globalChecksum;
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volatile u_char _11[4];
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volatile u_short maxDatagramSize;
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volatile u_short maxFrameSize;
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volatile u_char maxRetries;
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volatile u_char receiveMode;
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volatile u_char priority;
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volatile u_char rootOrRepeater;
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volatile u_char specifiedRouter[6];
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volatile u_short fastPollPeriod;
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volatile u_char pollDecay;
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volatile u_char fastPollDelay[2];
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volatile u_char arlThreshold;
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volatile u_char arlDecay;
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volatile u_char _12[1];
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volatile u_short specRouterTimeout;
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volatile u_char _13[5];
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/* Scrambled Area */
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volatile u_char SID[4];
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volatile u_char encryptionKey[12];
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volatile u_char _14[2];
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volatile u_char waitTime[2];
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volatile u_char lParameter[2];
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volatile u_char _15[3];
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volatile u_short headerSize;
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volatile u_short sectionChecksum;
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volatile u_char registrationMode;
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volatile u_char registrationFill;
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volatile u_short pollPeriod;
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volatile u_short refreshPeriod;
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volatile u_char name[16];
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volatile u_char NID[6];
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volatile u_char localTalkAddress;
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volatile u_char codeFormat;
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volatile u_char numChannels;
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volatile u_char channel1;
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volatile u_char channel2;
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volatile u_char channel3;
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volatile u_char channel4;
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volatile u_char SSCode[59];
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volatile u_char _16[0xC0];
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volatile u_short auxCmd;
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volatile u_char dumpPtr[4];
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volatile u_char dumpVal;
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volatile u_char _17[0x6A];
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volatile u_char wireTest;
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volatile u_char _18[14];
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/* Statistics Block - 0x0300 */
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volatile u_char hostcpuLock;
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volatile u_char lancpuLock;
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volatile u_char resetTime[18];
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volatile u_char numDatagramsTransmitted[4];
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volatile u_char numReTransmissions[4];
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volatile u_char numFramesDiscarded[4];
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volatile u_char numDatagramsReceived[4];
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volatile u_char numDuplicateReceivedFrames[4];
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volatile u_char numDatagramsDiscarded[4];
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volatile u_short maxNumReTransmitDatagram;
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volatile u_short maxNumReTransmitFrames;
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volatile u_short maxNumConsecutiveDuplicateFrames;
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/* misaligned here so we have to go to characters */
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volatile u_char numBytesTransmitted[4];
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volatile u_char numBytesReceived[4];
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volatile u_char numCRCErrors[4];
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volatile u_char numLengthErrors[4];
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volatile u_char numAbortErrors[4];
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volatile u_char numTXUnderruns[4];
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volatile u_char numRXOverruns[4];
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volatile u_char numHoldOffs[4];
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volatile u_char numFramesTransmitted[4];
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volatile u_char numFramesReceived[4];
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volatile u_char numReceiveFramesLost[4];
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volatile u_char numRXBufferOverflows[4];
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volatile u_char numFramesDiscardedAddrMismatch[4];
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volatile u_char numFramesDiscardedSIDMismatch[4];
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volatile u_char numPollsTransmistted[4];
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volatile u_char numPollAcknowledges[4];
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volatile u_char numStatusTimeouts[4];
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volatile u_char numNACKReceived[4];
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volatile u_char _19[0x86];
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volatile u_char txBuffer[0x800];
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volatile u_char rxBuffer[0x800];
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volatile u_char _20[0x800];
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volatile u_char _21[0x3fb];
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volatile u_char configStatus;
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volatile u_char _22;
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volatile u_char progIOCtrl;
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volatile u_char shareMBase;
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volatile u_char controlRegister;
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};
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struct arlan_conf_stru {
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int spreadingCode;
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int channelSet;
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int channelNumber;
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int scramblingDisable;
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int txAttenuation;
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int systemId;
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int maxDatagramSize;
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int maxFrameSize;
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int maxRetries;
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int receiveMode;
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int priority;
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int rootOrRepeater;
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int SID;
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int radioNodeId;
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int registrationMode;
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int registrationFill;
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int localTalkAddress;
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int codeFormat;
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int numChannels;
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int channel1;
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int channel2;
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int channel3;
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int channel4;
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int txClear;
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int txRetries;
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int txRouting;
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int txScrambled;
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int rxParameter;
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int txTimeoutMs;
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int txAckTimeoutMs;
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int waitCardTimeout;
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int waitTime;
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int lParameter;
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int _15;
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int headerSize;
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int retries;
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int tx_delay_ms;
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int waitReTransmitPacketMaxSize;
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int ReTransmitPacketMaxSize;
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int fastReTransCount;
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int driverRetransmissions;
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int registrationInterrupts;
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int hardwareType;
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int radioType;
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int writeRadioType;
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int writeEEPROM;
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char siteName[17];
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int measure_rate;
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int in_speed;
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int out_speed;
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int in_speed10;
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int out_speed10;
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int in_speed_max;
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int out_speed_max;
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int pre_Command_Wait;
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int rx_tweak1;
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int rx_tweak2;
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int tx_queue_len;
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};
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extern struct arlan_conf_stru arlan_conf[MAX_ARLANS];
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struct TxParam
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{
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volatile short offset;
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volatile short length;
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volatile u_char dest[6];
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volatile unsigned char clear;
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volatile unsigned char retries;
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volatile unsigned char routing;
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volatile unsigned char scrambled;
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};
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#define TX_RING_SIZE 2
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/* Information that need to be kept for each board. */
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struct arlan_private {
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struct net_device_stats stats;
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struct arlan_shmem __iomem * card;
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struct arlan_shmem * conf;
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struct arlan_conf_stru * Conf;
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int bad;
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int reset;
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unsigned long lastReset;
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struct timer_list timer;
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struct timer_list tx_delay_timer;
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struct timer_list tx_retry_timer;
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struct timer_list rx_check_timer;
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int registrationLostCount;
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int reRegisterExp;
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int irq_test_done;
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struct TxParam txRing[TX_RING_SIZE];
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char reTransmitBuff[0x800];
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int txLast;
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unsigned ReTransmitRequested;
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unsigned long tx_done_delayed;
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unsigned long registrationLastSeen;
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unsigned long tx_last_sent;
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unsigned long tx_last_cleared;
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unsigned long retransmissions;
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unsigned long interrupt_ack_requested;
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spinlock_t lock;
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unsigned long waiting_command_mask;
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unsigned long card_polling_interval;
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unsigned long last_command_buff_free_time;
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int under_reset;
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int under_config;
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int rx_command_given;
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int tx_command_given;
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unsigned long interrupt_processing_active;
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unsigned long last_rx_int_ack_time;
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unsigned long in_bytes;
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unsigned long out_bytes;
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unsigned long in_time;
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unsigned long out_time;
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unsigned long in_time10;
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unsigned long out_time10;
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unsigned long in_bytes10;
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unsigned long out_bytes10;
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int init_etherdev_alloc;
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};
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#define ARLAN_CLEAR 0x00
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#define ARLAN_RESET 0x01
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#define ARLAN_CHANNEL_ATTENTION 0x02
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#define ARLAN_INTERRUPT_ENABLE 0x04
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#define ARLAN_CLEAR_INTERRUPT 0x08
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#define ARLAN_POWER 0x40
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#define ARLAN_ACCESS 0x80
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#define ARLAN_COM_CONF 0x01
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#define ARLAN_COM_RX_ENABLE 0x03
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#define ARLAN_COM_RX_ABORT 0x04
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#define ARLAN_COM_TX_ENABLE 0x05
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#define ARLAN_COM_TX_ABORT 0x06
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#define ARLAN_COM_NOP 0x07
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#define ARLAN_COM_STANDBY 0x08
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#define ARLAN_COM_ACTIVATE 0x09
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#define ARLAN_COM_GOTO_SLOW_POLL 0x0a
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#define ARLAN_COM_INT 0x80
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#define TXLAST(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[((struct arlan_private *)netdev_priv(dev))->txLast])
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#define TXHEAD(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[0])
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#define TXTAIL(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[1])
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#define TXBuffStart(dev) offsetof(struct arlan_shmem, txBuffer)
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#define TXBuffEnd(dev) offsetof(struct arlan_shmem, xxBuffer)
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#define READSHM(to,from,atype) {\
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atype tmp;\
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memcpy_fromio(&(tmp),&(from),sizeof(atype));\
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to = tmp;\
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}
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#define READSHMEM(from,atype)\
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atype from; \
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READSHM(from, arlan->from, atype);
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#define WRITESHM(to,from,atype) \
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{ atype tmpSHM = from;\
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memcpy_toio(&(to),&tmpSHM,sizeof(atype));\
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}
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#define DEBUGSHM(levelSHM,stringSHM,stuff,atype) \
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{ atype tmpSHM; \
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memcpy_fromio(&tmpSHM,&(stuff),sizeof(atype));\
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IFDEBUG(levelSHM) printk(stringSHM,tmpSHM);\
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}
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#define WRITESHMB(to, val) \
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writeb(val,&(to))
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#define READSHMB(to) \
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readb(&(to))
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#define WRITESHMS(to, val) \
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writew(val,&(to))
|
||
|
#define READSHMS(to) \
|
||
|
readw(&(to))
|
||
|
#define WRITESHMI(to, val) \
|
||
|
writel(val,&(to))
|
||
|
#define READSHMI(to) \
|
||
|
readl(&(to))
|
||
|
|
||
|
|
||
|
|
||
|
|
||
|
|
||
|
#define registrationBad(dev)\
|
||
|
( ( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationMode) > 0) && \
|
||
|
( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationStatus) == 0) )
|
||
|
|
||
|
|
||
|
#define readControlRegister(dev)\
|
||
|
READSHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage)
|
||
|
|
||
|
#define writeControlRegister(dev, v){\
|
||
|
WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage ,((v) &0xF) );\
|
||
|
WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->controlRegister ,(v) );}
|
||
|
|
||
|
|
||
|
#define arlan_interrupt_lancpu(dev) {\
|
||
|
int cr; \
|
||
|
\
|
||
|
cr = readControlRegister(dev);\
|
||
|
if (cr & ARLAN_CHANNEL_ATTENTION){ \
|
||
|
writeControlRegister(dev, (cr & ~ARLAN_CHANNEL_ATTENTION));\
|
||
|
}else \
|
||
|
writeControlRegister(dev, (cr | ARLAN_CHANNEL_ATTENTION));\
|
||
|
}
|
||
|
|
||
|
#define clearChannelAttention(dev){ \
|
||
|
writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_CHANNEL_ATTENTION);}
|
||
|
#define setHardwareReset(dev) {\
|
||
|
writeControlRegister(dev,readControlRegister(dev) | ARLAN_RESET);}
|
||
|
#define clearHardwareReset(dev) {\
|
||
|
writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_RESET);}
|
||
|
#define setInterruptEnable(dev){\
|
||
|
writeControlRegister(dev,readControlRegister(dev) | ARLAN_INTERRUPT_ENABLE) ;}
|
||
|
#define clearInterruptEnable(dev){\
|
||
|
writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_INTERRUPT_ENABLE) ;}
|
||
|
#define setClearInterrupt(dev){\
|
||
|
writeControlRegister(dev,readControlRegister(dev) | ARLAN_CLEAR_INTERRUPT) ;}
|
||
|
#define clearClearInterrupt(dev){\
|
||
|
writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_CLEAR_INTERRUPT);}
|
||
|
#define setPowerOff(dev){\
|
||
|
writeControlRegister(dev,readControlRegister(dev) | (ARLAN_POWER && ARLAN_ACCESS));\
|
||
|
writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_ACCESS);}
|
||
|
#define setPowerOn(dev){\
|
||
|
writeControlRegister(dev,readControlRegister(dev) & ~(ARLAN_POWER)); }
|
||
|
#define arlan_lock_card_access(dev){\
|
||
|
writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_ACCESS);}
|
||
|
#define arlan_unlock_card_access(dev){\
|
||
|
writeControlRegister(dev,readControlRegister(dev) | ARLAN_ACCESS ); }
|
||
|
|
||
|
|
||
|
|
||
|
|
||
|
#define ARLAN_COMMAND_RX 0x000001
|
||
|
#define ARLAN_COMMAND_NOOP 0x000002
|
||
|
#define ARLAN_COMMAND_NOOPINT 0x000004
|
||
|
#define ARLAN_COMMAND_TX 0x000008
|
||
|
#define ARLAN_COMMAND_CONF 0x000010
|
||
|
#define ARLAN_COMMAND_RESET 0x000020
|
||
|
#define ARLAN_COMMAND_TX_ABORT 0x000040
|
||
|
#define ARLAN_COMMAND_RX_ABORT 0x000080
|
||
|
#define ARLAN_COMMAND_POWERDOWN 0x000100
|
||
|
#define ARLAN_COMMAND_POWERUP 0x000200
|
||
|
#define ARLAN_COMMAND_SLOW_POLL 0x000400
|
||
|
#define ARLAN_COMMAND_ACTIVATE 0x000800
|
||
|
#define ARLAN_COMMAND_INT_ACK 0x001000
|
||
|
#define ARLAN_COMMAND_INT_ENABLE 0x002000
|
||
|
#define ARLAN_COMMAND_WAIT_NOW 0x004000
|
||
|
#define ARLAN_COMMAND_LONG_WAIT_NOW 0x008000
|
||
|
#define ARLAN_COMMAND_STANDBY 0x010000
|
||
|
#define ARLAN_COMMAND_INT_RACK 0x020000
|
||
|
#define ARLAN_COMMAND_INT_RENABLE 0x040000
|
||
|
#define ARLAN_COMMAND_CONF_WAIT 0x080000
|
||
|
#define ARLAN_COMMAND_TBUSY_CLEAR 0x100000
|
||
|
#define ARLAN_COMMAND_CLEAN_AND_CONF (ARLAN_COMMAND_TX_ABORT\
|
||
|
| ARLAN_COMMAND_RX_ABORT\
|
||
|
| ARLAN_COMMAND_CONF)
|
||
|
#define ARLAN_COMMAND_CLEAN_AND_RESET (ARLAN_COMMAND_TX_ABORT\
|
||
|
| ARLAN_COMMAND_RX_ABORT\
|
||
|
| ARLAN_COMMAND_RESET)
|
||
|
|
||
|
|
||
|
|
||
|
#define ARLAN_DEBUG_CHAIN_LOCKS 0x00001
|
||
|
#define ARLAN_DEBUG_RESET 0x00002
|
||
|
#define ARLAN_DEBUG_TIMING 0x00004
|
||
|
#define ARLAN_DEBUG_CARD_STATE 0x00008
|
||
|
#define ARLAN_DEBUG_TX_CHAIN 0x00010
|
||
|
#define ARLAN_DEBUG_MULTICAST 0x00020
|
||
|
#define ARLAN_DEBUG_HEADER_DUMP 0x00040
|
||
|
#define ARLAN_DEBUG_INTERRUPT 0x00080
|
||
|
#define ARLAN_DEBUG_STARTUP 0x00100
|
||
|
#define ARLAN_DEBUG_SHUTDOWN 0x00200
|
||
|
|