74 lines
1.8 KiB
C
74 lines
1.8 KiB
C
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/*
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* arch/arm/plat-spear/include/plat/shirq.h
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*
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* SPEAr platform shared irq layer header file
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*
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* Copyright (C) 2009 ST Microelectronics
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* Viresh Kumar<viresh.kumar@st.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __PLAT_SHIRQ_H
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#define __PLAT_SHIRQ_H
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#include <linux/irq.h>
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#include <linux/types.h>
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/*
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* struct shirq_dev_config: shared irq device configuration
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*
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* virq: virtual irq number of device
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* enb_mask: enable mask of device
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* status_mask: status mask of device
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* clear_mask: clear mask of device
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*/
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struct shirq_dev_config {
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u32 virq;
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u32 enb_mask;
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u32 status_mask;
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u32 clear_mask;
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};
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/*
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* struct shirq_regs: shared irq register configuration
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*
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* base: base address of shared irq register
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* enb_reg: enable register offset
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* reset_to_enb: val 1 indicates, we need to clear bit for enabling interrupt
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* status_reg: status register offset
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* status_reg_mask: status register valid mask
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* clear_reg: clear register offset
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* reset_to_clear: val 1 indicates, we need to clear bit for clearing interrupt
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*/
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struct shirq_regs {
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void __iomem *base;
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u32 enb_reg;
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u32 reset_to_enb;
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u32 status_reg;
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u32 status_reg_mask;
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u32 clear_reg;
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u32 reset_to_clear;
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};
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/*
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* struct spear_shirq: shared irq structure
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*
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* irq: hardware irq number
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* dev_config: array of device config structures which are using "irq" line
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* dev_count: size of dev_config array
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* regs: register configuration for shared irq block
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*/
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struct spear_shirq {
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u32 irq;
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struct shirq_dev_config *dev_config;
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u32 dev_count;
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struct shirq_regs regs;
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};
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int spear_shirq_register(struct spear_shirq *shirq);
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#endif /* __PLAT_SHIRQ_H */
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