2005-04-16 22:20:36 +00:00
|
|
|
/*
|
|
|
|
* NMI watchdog support on APIC systems
|
|
|
|
*
|
|
|
|
* Started by Ingo Molnar <mingo@redhat.com>
|
|
|
|
*
|
|
|
|
* Fixes:
|
|
|
|
* Mikael Pettersson : AMD K7 support for local APIC NMI watchdog.
|
|
|
|
* Mikael Pettersson : Power Management for local APIC NMI watchdog.
|
|
|
|
* Mikael Pettersson : Pentium 4 support for local APIC NMI watchdog.
|
|
|
|
* Pavel Machek and
|
|
|
|
* Mikael Pettersson : PM converted to driver model. Disable/enable API.
|
|
|
|
*/
|
|
|
|
|
2008-06-02 11:50:10 +00:00
|
|
|
#include <asm/apic.h>
|
|
|
|
|
2006-12-07 01:14:01 +00:00
|
|
|
#include <linux/nmi.h>
|
2005-04-16 22:20:36 +00:00
|
|
|
#include <linux/mm.h>
|
|
|
|
#include <linux/delay.h>
|
|
|
|
#include <linux/interrupt.h>
|
|
|
|
#include <linux/module.h>
|
|
|
|
#include <linux/sysdev.h>
|
|
|
|
#include <linux/sysctl.h>
|
2006-06-26 11:57:01 +00:00
|
|
|
#include <linux/percpu.h>
|
2006-02-03 20:50:41 +00:00
|
|
|
#include <linux/kprobes.h>
|
2006-12-07 01:14:01 +00:00
|
|
|
#include <linux/cpumask.h>
|
2007-02-16 09:28:09 +00:00
|
|
|
#include <linux/kernel_stat.h>
|
2007-05-08 07:27:03 +00:00
|
|
|
#include <linux/kdebug.h>
|
2008-05-28 01:49:39 +00:00
|
|
|
#include <linux/smp.h>
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-05-21 21:10:22 +00:00
|
|
|
#include <asm/i8259.h>
|
|
|
|
#include <asm/io_apic.h>
|
2005-04-16 22:20:36 +00:00
|
|
|
#include <asm/smp.h>
|
|
|
|
#include <asm/nmi.h>
|
|
|
|
#include <asm/proto.h>
|
2008-03-21 13:32:36 +00:00
|
|
|
#include <asm/timer.h>
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2006-04-07 17:49:57 +00:00
|
|
|
#include <asm/mce.h>
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-03-19 17:25:35 +00:00
|
|
|
#include <mach_traps.h>
|
|
|
|
|
2006-09-29 23:47:55 +00:00
|
|
|
int unknown_nmi_panic;
|
|
|
|
int nmi_watchdog_enabled;
|
|
|
|
|
2007-04-16 08:30:27 +00:00
|
|
|
static cpumask_t backtrace_mask = CPU_MASK_NONE;
|
2006-09-26 08:52:26 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
/* nmi_active:
|
2006-09-26 08:52:26 +00:00
|
|
|
* >0: the lapic NMI watchdog is active, but can be disabled
|
|
|
|
* <0: the lapic NMI watchdog has not been set up, and cannot
|
2005-04-16 22:20:36 +00:00
|
|
|
* be enabled
|
2006-09-26 08:52:26 +00:00
|
|
|
* 0: the lapic NMI watchdog is disabled, but can be enabled
|
2005-04-16 22:20:36 +00:00
|
|
|
*/
|
2006-09-26 08:52:26 +00:00
|
|
|
atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */
|
2008-05-28 01:49:39 +00:00
|
|
|
EXPORT_SYMBOL(nmi_active);
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-06-24 20:52:05 +00:00
|
|
|
unsigned int nmi_watchdog = NMI_NONE;
|
2008-05-28 01:49:39 +00:00
|
|
|
EXPORT_SYMBOL(nmi_watchdog);
|
|
|
|
|
|
|
|
static int panic_on_timeout;
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-05-24 15:36:41 +00:00
|
|
|
static unsigned int nmi_hz = HZ;
|
2007-05-02 17:27:20 +00:00
|
|
|
static DEFINE_PER_CPU(short, wd_enabled);
|
2008-05-28 01:49:39 +00:00
|
|
|
static int endflag __initdata;
|
2006-12-09 20:33:35 +00:00
|
|
|
|
2008-05-24 15:36:40 +00:00
|
|
|
static inline unsigned int get_nmi_count(int cpu)
|
|
|
|
{
|
2008-05-24 15:36:41 +00:00
|
|
|
#ifdef CONFIG_X86_64
|
|
|
|
return cpu_pda(cpu)->__nmi_count;
|
|
|
|
#else
|
2008-05-24 15:36:40 +00:00
|
|
|
return nmi_count(cpu);
|
2008-05-24 15:36:41 +00:00
|
|
|
#endif
|
2008-05-24 15:36:40 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline int mce_in_progress(void)
|
|
|
|
{
|
2008-06-16 22:59:08 +00:00
|
|
|
#if defined(CONFIG_X86_64) && defined(CONFIG_X86_MCE)
|
2008-05-24 15:36:41 +00:00
|
|
|
return atomic_read(&mce_entry) > 0;
|
|
|
|
#endif
|
2008-05-24 15:36:40 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Take the local apic timer and PIT/HPET into account. We don't
|
|
|
|
* know which one is active, when we have highres/dyntick on
|
|
|
|
*/
|
|
|
|
static inline unsigned int get_timer_irqs(int cpu)
|
|
|
|
{
|
2008-05-24 15:36:41 +00:00
|
|
|
#ifdef CONFIG_X86_64
|
|
|
|
return read_pda(apic_timer_irqs) + read_pda(irq0_irqs);
|
|
|
|
#else
|
2008-05-24 15:36:40 +00:00
|
|
|
return per_cpu(irq_stat, cpu).apic_timer_irqs +
|
|
|
|
per_cpu(irq_stat, cpu).irq0_irqs;
|
2008-05-24 15:36:41 +00:00
|
|
|
#endif
|
2008-05-24 15:36:40 +00:00
|
|
|
}
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-05-17 04:53:34 +00:00
|
|
|
#ifdef CONFIG_SMP
|
2008-05-24 15:36:41 +00:00
|
|
|
/*
|
|
|
|
* The performance counters used by NMI_LOCAL_APIC don't trigger when
|
2005-05-17 04:53:34 +00:00
|
|
|
* the CPU is idle. To make sure the NMI watchdog really ticks on all
|
|
|
|
* CPUs during the test make them busy.
|
|
|
|
*/
|
|
|
|
static __init void nmi_cpu_busy(void *data)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
2006-07-03 07:25:25 +00:00
|
|
|
local_irq_enable_in_hardirq();
|
2008-05-24 15:36:41 +00:00
|
|
|
/*
|
|
|
|
* Intentionally don't use cpu_relax here. This is
|
|
|
|
* to make sure that the performance counter really ticks,
|
|
|
|
* even if there is a simulator or similar that catches the
|
|
|
|
* pause instruction. On a real HT machine this is fine because
|
|
|
|
* all other CPUs are busy with "useless" delay loops and don't
|
|
|
|
* care if they get somewhat less cycles.
|
|
|
|
*/
|
2006-12-09 20:33:35 +00:00
|
|
|
while (endflag == 0)
|
|
|
|
mb();
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
2005-05-17 04:53:34 +00:00
|
|
|
#endif
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-08-15 13:34:32 +00:00
|
|
|
static void report_broken_nmi(int cpu, int *prev_nmi_count)
|
|
|
|
{
|
|
|
|
printk(KERN_CONT "\n");
|
|
|
|
|
|
|
|
printk(KERN_WARNING
|
|
|
|
"WARNING: CPU#%d: NMI appears to be stuck (%d->%d)!\n",
|
|
|
|
cpu, prev_nmi_count[cpu], get_nmi_count(cpu));
|
|
|
|
|
|
|
|
printk(KERN_WARNING
|
|
|
|
"Please report this to bugzilla.kernel.org,\n");
|
|
|
|
printk(KERN_WARNING
|
|
|
|
"and attach the output of the 'dmesg' command.\n");
|
|
|
|
|
|
|
|
per_cpu(wd_enabled, cpu) = 0;
|
|
|
|
atomic_dec(&nmi_active);
|
|
|
|
}
|
|
|
|
|
2008-01-30 12:30:33 +00:00
|
|
|
int __init check_nmi_watchdog(void)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
2005-10-30 22:59:40 +00:00
|
|
|
unsigned int *prev_nmi_count;
|
2005-04-16 22:20:36 +00:00
|
|
|
int cpu;
|
|
|
|
|
2008-06-24 20:52:06 +00:00
|
|
|
if (!nmi_watchdog_active() || !atomic_read(&nmi_active))
|
2006-09-26 08:52:26 +00:00
|
|
|
return 0;
|
|
|
|
|
2008-05-12 19:21:12 +00:00
|
|
|
prev_nmi_count = kmalloc(nr_cpu_ids * sizeof(int), GFP_KERNEL);
|
2008-01-30 12:30:33 +00:00
|
|
|
if (!prev_nmi_count)
|
2008-05-21 21:10:22 +00:00
|
|
|
goto error;
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-01-30 12:30:33 +00:00
|
|
|
printk(KERN_INFO "Testing NMI watchdog ... ");
|
2005-05-17 04:53:19 +00:00
|
|
|
|
2006-01-11 21:45:45 +00:00
|
|
|
#ifdef CONFIG_SMP
|
2005-05-17 04:53:34 +00:00
|
|
|
if (nmi_watchdog == NMI_LOCAL_APIC)
|
2008-06-06 09:18:06 +00:00
|
|
|
smp_call_function(nmi_cpu_busy, (void *)&endflag, 0);
|
2006-01-11 21:45:45 +00:00
|
|
|
#endif
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2006-03-28 09:56:39 +00:00
|
|
|
for_each_possible_cpu(cpu)
|
2008-05-24 15:36:40 +00:00
|
|
|
prev_nmi_count[cpu] = get_nmi_count(cpu);
|
2005-04-16 22:20:36 +00:00
|
|
|
local_irq_enable();
|
2008-05-24 15:36:41 +00:00
|
|
|
mdelay((20 * 1000) / nmi_hz); /* wait 20 ticks */
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2006-03-23 11:01:05 +00:00
|
|
|
for_each_online_cpu(cpu) {
|
2007-05-02 17:27:20 +00:00
|
|
|
if (!per_cpu(wd_enabled, cpu))
|
2006-09-26 08:52:26 +00:00
|
|
|
continue;
|
2008-08-15 13:34:32 +00:00
|
|
|
if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5)
|
|
|
|
report_broken_nmi(cpu, prev_nmi_count);
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
2008-01-30 12:30:33 +00:00
|
|
|
endflag = 1;
|
2006-09-26 08:52:26 +00:00
|
|
|
if (!atomic_read(&nmi_active)) {
|
2008-01-30 12:30:33 +00:00
|
|
|
kfree(prev_nmi_count);
|
2006-09-26 08:52:26 +00:00
|
|
|
atomic_set(&nmi_active, -1);
|
2008-05-21 21:10:22 +00:00
|
|
|
goto error;
|
2006-09-26 08:52:26 +00:00
|
|
|
}
|
2005-04-16 22:20:36 +00:00
|
|
|
printk("OK.\n");
|
|
|
|
|
2008-05-24 15:36:41 +00:00
|
|
|
/*
|
|
|
|
* now that we know it works we can reduce NMI frequency to
|
|
|
|
* something more reasonable; makes a difference in some configs
|
|
|
|
*/
|
2007-05-02 17:27:20 +00:00
|
|
|
if (nmi_watchdog == NMI_LOCAL_APIC)
|
|
|
|
nmi_hz = lapic_adjust_nmi_hz(1);
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-01-30 12:30:33 +00:00
|
|
|
kfree(prev_nmi_count);
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
2008-05-21 21:10:22 +00:00
|
|
|
error:
|
|
|
|
if (nmi_watchdog == NMI_IO_APIC && !timer_through_8259)
|
|
|
|
disable_8259A_irq(0);
|
2008-07-11 18:47:15 +00:00
|
|
|
#ifdef CONFIG_X86_32
|
|
|
|
timer_ack = 0;
|
|
|
|
#endif
|
2008-05-21 21:10:22 +00:00
|
|
|
return -1;
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
|
2008-01-30 12:30:31 +00:00
|
|
|
static int __init setup_nmi_watchdog(char *str)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
2008-06-24 20:52:04 +00:00
|
|
|
unsigned int nmi;
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-05-24 15:36:34 +00:00
|
|
|
if (!strncmp(str, "panic", 5)) {
|
2005-04-16 22:20:36 +00:00
|
|
|
panic_on_timeout = 1;
|
|
|
|
str = strchr(str, ',');
|
|
|
|
if (!str)
|
|
|
|
return 1;
|
|
|
|
++str;
|
|
|
|
}
|
|
|
|
|
|
|
|
get_option(&str, &nmi);
|
|
|
|
|
2008-06-24 20:52:04 +00:00
|
|
|
if (nmi >= NMI_INVALID)
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
2006-09-26 08:52:26 +00:00
|
|
|
|
2005-05-17 04:53:34 +00:00
|
|
|
nmi_watchdog = nmi;
|
2005-04-16 22:20:36 +00:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
__setup("nmi_watchdog=", setup_nmi_watchdog);
|
|
|
|
|
2008-05-24 15:36:41 +00:00
|
|
|
/*
|
|
|
|
* Suspend/resume support
|
|
|
|
*/
|
2005-04-16 22:20:36 +00:00
|
|
|
#ifdef CONFIG_PM
|
|
|
|
|
|
|
|
static int nmi_pm_active; /* nmi_active before suspend */
|
|
|
|
|
2005-09-03 22:56:56 +00:00
|
|
|
static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
2006-09-26 08:52:27 +00:00
|
|
|
/* only CPU0 goes here, other CPUs should be offline */
|
2006-09-26 08:52:26 +00:00
|
|
|
nmi_pm_active = atomic_read(&nmi_active);
|
2006-09-26 08:52:27 +00:00
|
|
|
stop_apic_nmi_watchdog(NULL);
|
|
|
|
BUG_ON(atomic_read(&nmi_active) != 0);
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int lapic_nmi_resume(struct sys_device *dev)
|
|
|
|
{
|
2006-09-26 08:52:27 +00:00
|
|
|
/* only CPU0 goes here, other CPUs should be offline */
|
|
|
|
if (nmi_pm_active > 0) {
|
|
|
|
setup_apic_nmi_watchdog(NULL);
|
|
|
|
touch_nmi_watchdog();
|
|
|
|
}
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct sysdev_class nmi_sysclass = {
|
2007-12-20 01:09:39 +00:00
|
|
|
.name = "lapic_nmi",
|
2005-04-16 22:20:36 +00:00
|
|
|
.resume = lapic_nmi_resume,
|
|
|
|
.suspend = lapic_nmi_suspend,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct sys_device device_lapic_nmi = {
|
2008-01-30 12:30:33 +00:00
|
|
|
.id = 0,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cls = &nmi_sysclass,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init init_lapic_nmi_sysfs(void)
|
|
|
|
{
|
|
|
|
int error;
|
|
|
|
|
2008-05-24 15:36:41 +00:00
|
|
|
/*
|
|
|
|
* should really be a BUG_ON but b/c this is an
|
2006-09-26 08:52:26 +00:00
|
|
|
* init call, it just doesn't work. -dcz
|
|
|
|
*/
|
|
|
|
if (nmi_watchdog != NMI_LOCAL_APIC)
|
|
|
|
return 0;
|
|
|
|
|
2008-01-30 12:30:33 +00:00
|
|
|
if (atomic_read(&nmi_active) < 0)
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
error = sysdev_class_register(&nmi_sysclass);
|
|
|
|
if (!error)
|
|
|
|
error = sysdev_register(&device_lapic_nmi);
|
|
|
|
return error;
|
|
|
|
}
|
2008-05-24 15:36:41 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
/* must come after the local APIC's device_initcall() */
|
|
|
|
late_initcall(init_lapic_nmi_sysfs);
|
|
|
|
|
|
|
|
#endif /* CONFIG_PM */
|
|
|
|
|
2008-01-30 12:30:33 +00:00
|
|
|
static void __acpi_nmi_enable(void *__unused)
|
|
|
|
{
|
x86: APIC: remove apic_write_around(); use alternatives
Use alternatives to select the workaround for the 11AP Pentium erratum
for the affected steppings on the fly rather than build time. Remove the
X86_GOOD_APIC configuration option and replace all the calls to
apic_write_around() with plain apic_write(), protecting accesses to the
ESR as appropriate due to the 3AP Pentium erratum. Remove
apic_read_around() and all its invocations altogether as not needed.
Remove apic_write_atomic() and all its implementing backends. The use of
ASM_OUTPUT2() is not strictly needed for input constraints, but I have
used it for readability's sake.
I had the feeling no one else was brave enough to do it, so I went ahead
and here it is. Verified by checking the generated assembly and tested
with both a 32-bit and a 64-bit configuration, also with the 11AP
"feature" forced on and verified with gdb on /proc/kcore to work as
expected (as an 11AP machines are quite hard to get hands on these days).
Some script complained about the use of "volatile", but apic_write() needs
it for the same reason and is effectively a replacement for writel(), so I
have disregarded it.
I am not sure what the policy wrt defconfig files is, they are generated
and there is risk of a conflict resulting from an unrelated change, so I
have left changes to them out. The option will get removed from them at
the next run.
Some testing with machines other than mine will be needed to avoid some
stupid mistake, but despite its volume, the change is not really that
intrusive, so I am fairly confident that because it works for me, it will
everywhere.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-16 18:15:30 +00:00
|
|
|
apic_write(APIC_LVT0, APIC_DM_NMI);
|
2008-01-30 12:30:33 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Enable timer based NMIs on all CPUs:
|
|
|
|
*/
|
|
|
|
void acpi_nmi_enable(void)
|
|
|
|
{
|
|
|
|
if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
|
2008-05-09 07:39:44 +00:00
|
|
|
on_each_cpu(__acpi_nmi_enable, NULL, 1);
|
2008-01-30 12:30:33 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void __acpi_nmi_disable(void *__unused)
|
|
|
|
{
|
x86: APIC: remove apic_write_around(); use alternatives
Use alternatives to select the workaround for the 11AP Pentium erratum
for the affected steppings on the fly rather than build time. Remove the
X86_GOOD_APIC configuration option and replace all the calls to
apic_write_around() with plain apic_write(), protecting accesses to the
ESR as appropriate due to the 3AP Pentium erratum. Remove
apic_read_around() and all its invocations altogether as not needed.
Remove apic_write_atomic() and all its implementing backends. The use of
ASM_OUTPUT2() is not strictly needed for input constraints, but I have
used it for readability's sake.
I had the feeling no one else was brave enough to do it, so I went ahead
and here it is. Verified by checking the generated assembly and tested
with both a 32-bit and a 64-bit configuration, also with the 11AP
"feature" forced on and verified with gdb on /proc/kcore to work as
expected (as an 11AP machines are quite hard to get hands on these days).
Some script complained about the use of "volatile", but apic_write() needs
it for the same reason and is effectively a replacement for writel(), so I
have disregarded it.
I am not sure what the policy wrt defconfig files is, they are generated
and there is risk of a conflict resulting from an unrelated change, so I
have left changes to them out. The option will get removed from them at
the next run.
Some testing with machines other than mine will be needed to avoid some
stupid mistake, but despite its volume, the change is not really that
intrusive, so I am fairly confident that because it works for me, it will
everywhere.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-16 18:15:30 +00:00
|
|
|
apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
|
2008-01-30 12:30:33 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Disable timer based NMIs on all CPUs:
|
|
|
|
*/
|
|
|
|
void acpi_nmi_disable(void)
|
|
|
|
{
|
|
|
|
if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
|
2008-05-09 07:39:44 +00:00
|
|
|
on_each_cpu(__acpi_nmi_disable, NULL, 1);
|
2008-01-30 12:30:33 +00:00
|
|
|
}
|
|
|
|
|
2008-09-22 17:13:59 +00:00
|
|
|
/*
|
|
|
|
* This function is called as soon the LAPIC NMI watchdog driver has everything
|
|
|
|
* in place and it's ready to check if the NMIs belong to the NMI watchdog
|
|
|
|
*/
|
|
|
|
void cpu_nmi_set_wd_enabled(void)
|
|
|
|
{
|
|
|
|
__get_cpu_var(wd_enabled) = 1;
|
|
|
|
}
|
|
|
|
|
2006-09-26 08:52:26 +00:00
|
|
|
void setup_apic_nmi_watchdog(void *unused)
|
|
|
|
{
|
2008-01-30 12:30:33 +00:00
|
|
|
if (__get_cpu_var(wd_enabled))
|
2006-09-26 08:52:27 +00:00
|
|
|
return;
|
|
|
|
|
|
|
|
/* cheap hack to support suspend/resume */
|
|
|
|
/* if cpu0 is not active neither should the other cpus */
|
2008-05-24 15:36:41 +00:00
|
|
|
if (smp_processor_id() != 0 && atomic_read(&nmi_active) <= 0)
|
2006-09-26 08:52:27 +00:00
|
|
|
return;
|
|
|
|
|
2007-05-02 17:27:20 +00:00
|
|
|
switch (nmi_watchdog) {
|
|
|
|
case NMI_LOCAL_APIC:
|
|
|
|
if (lapic_watchdog_init(nmi_hz) < 0) {
|
|
|
|
__get_cpu_var(wd_enabled) = 0;
|
2005-05-17 04:53:34 +00:00
|
|
|
return;
|
2006-09-26 08:52:26 +00:00
|
|
|
}
|
2007-05-02 17:27:20 +00:00
|
|
|
/* FALL THROUGH */
|
|
|
|
case NMI_IO_APIC:
|
|
|
|
__get_cpu_var(wd_enabled) = 1;
|
|
|
|
atomic_inc(&nmi_active);
|
2006-09-26 08:52:26 +00:00
|
|
|
}
|
|
|
|
}
|
2005-05-17 04:53:34 +00:00
|
|
|
|
2006-09-26 08:52:27 +00:00
|
|
|
void stop_apic_nmi_watchdog(void *unused)
|
2006-09-26 08:52:26 +00:00
|
|
|
{
|
|
|
|
/* only support LOCAL and IO APICs for now */
|
2008-06-24 20:52:06 +00:00
|
|
|
if (!nmi_watchdog_active())
|
2008-05-24 15:36:41 +00:00
|
|
|
return;
|
2007-05-02 17:27:20 +00:00
|
|
|
if (__get_cpu_var(wd_enabled) == 0)
|
2006-09-26 08:52:27 +00:00
|
|
|
return;
|
2007-05-02 17:27:20 +00:00
|
|
|
if (nmi_watchdog == NMI_LOCAL_APIC)
|
|
|
|
lapic_watchdog_stop();
|
|
|
|
__get_cpu_var(wd_enabled) = 0;
|
2006-09-26 08:52:26 +00:00
|
|
|
atomic_dec(&nmi_active);
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* the best way to detect whether a CPU has a 'hard lockup' problem
|
|
|
|
* is to check it's local APIC timer IRQ counts. If they are not
|
|
|
|
* changing then that CPU has some problem.
|
|
|
|
*
|
|
|
|
* as these watchdog NMI IRQs are generated on every CPU, we only
|
|
|
|
* have to check the current processor.
|
|
|
|
*
|
|
|
|
* since NMIs don't listen to _any_ locks, we have to be extremely
|
|
|
|
* careful not to rely on unsafe variables. The printk might lock
|
|
|
|
* up though, so we have to break up any console locks first ...
|
2008-05-24 15:36:41 +00:00
|
|
|
* [when there will be more tty-related locks, break them up here too!]
|
2005-04-16 22:20:36 +00:00
|
|
|
*/
|
|
|
|
|
2005-05-17 04:53:34 +00:00
|
|
|
static DEFINE_PER_CPU(unsigned, last_irq_sum);
|
|
|
|
static DEFINE_PER_CPU(local_t, alert_counter);
|
|
|
|
static DEFINE_PER_CPU(int, nmi_touch);
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2007-07-17 11:03:58 +00:00
|
|
|
void touch_nmi_watchdog(void)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
2008-06-24 20:52:06 +00:00
|
|
|
if (nmi_watchdog_active()) {
|
2006-02-16 22:41:55 +00:00
|
|
|
unsigned cpu;
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2006-02-16 22:41:55 +00:00
|
|
|
/*
|
2008-05-02 23:45:08 +00:00
|
|
|
* Tell other CPUs to reset their alert counters. We cannot
|
2006-02-16 22:41:55 +00:00
|
|
|
* do it ourselves because the alert count increase is not
|
|
|
|
* atomic.
|
|
|
|
*/
|
2007-07-17 11:03:58 +00:00
|
|
|
for_each_present_cpu(cpu) {
|
|
|
|
if (per_cpu(nmi_touch, cpu) != 1)
|
|
|
|
per_cpu(nmi_touch, cpu) = 1;
|
|
|
|
}
|
2006-02-16 22:41:55 +00:00
|
|
|
}
|
2005-09-06 22:16:27 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Tickle the softlockup detector too:
|
|
|
|
*/
|
2008-01-30 12:30:33 +00:00
|
|
|
touch_softlockup_watchdog();
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
2008-01-30 12:30:33 +00:00
|
|
|
EXPORT_SYMBOL(touch_nmi_watchdog);
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-04-19 17:19:55 +00:00
|
|
|
notrace __kprobes int
|
|
|
|
nmi_watchdog_tick(struct pt_regs *regs, unsigned reason)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Since current_thread_info()-> is always on the stack, and we
|
|
|
|
* always switch the stack NMI-atomically, it's safe to use
|
|
|
|
* smp_processor_id().
|
|
|
|
*/
|
2006-03-28 09:56:52 +00:00
|
|
|
unsigned int sum;
|
2005-05-17 04:53:34 +00:00
|
|
|
int touched = 0;
|
2006-12-07 01:14:01 +00:00
|
|
|
int cpu = smp_processor_id();
|
2007-05-02 17:27:20 +00:00
|
|
|
int rc = 0;
|
2006-09-26 08:52:26 +00:00
|
|
|
|
|
|
|
/* check for other users first */
|
|
|
|
if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT)
|
|
|
|
== NOTIFY_STOP) {
|
2006-09-26 08:52:26 +00:00
|
|
|
rc = 1;
|
2006-09-26 08:52:26 +00:00
|
|
|
touched = 1;
|
|
|
|
}
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-05-24 15:36:40 +00:00
|
|
|
sum = get_timer_irqs(cpu);
|
|
|
|
|
2005-05-17 04:53:34 +00:00
|
|
|
if (__get_cpu_var(nmi_touch)) {
|
|
|
|
__get_cpu_var(nmi_touch) = 0;
|
|
|
|
touched = 1;
|
|
|
|
}
|
2006-09-26 08:52:26 +00:00
|
|
|
|
2006-12-07 01:14:01 +00:00
|
|
|
if (cpu_isset(cpu, backtrace_mask)) {
|
|
|
|
static DEFINE_SPINLOCK(lock); /* Serialise the printks */
|
|
|
|
|
|
|
|
spin_lock(&lock);
|
2008-05-28 01:49:39 +00:00
|
|
|
printk(KERN_WARNING "NMI backtrace for cpu %d\n", cpu);
|
2006-12-07 01:14:01 +00:00
|
|
|
dump_stack();
|
|
|
|
spin_unlock(&lock);
|
|
|
|
cpu_clear(cpu, backtrace_mask);
|
|
|
|
}
|
|
|
|
|
2008-05-24 15:36:40 +00:00
|
|
|
/* Could check oops_in_progress here too, but it's safer not to */
|
|
|
|
if (mce_in_progress())
|
2006-04-07 17:49:57 +00:00
|
|
|
touched = 1;
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2007-02-16 09:28:09 +00:00
|
|
|
/* if the none of the timers isn't firing, this cpu isn't doing much */
|
2005-05-17 04:53:34 +00:00
|
|
|
if (!touched && __get_cpu_var(last_irq_sum) == sum) {
|
2005-04-16 22:20:36 +00:00
|
|
|
/*
|
|
|
|
* Ayiee, looks like this CPU is stuck ...
|
|
|
|
* wait a few IRQs (5 seconds) before doing the oops ...
|
|
|
|
*/
|
2005-05-17 04:53:34 +00:00
|
|
|
local_inc(&__get_cpu_var(alert_counter));
|
2008-05-24 15:36:41 +00:00
|
|
|
if (local_read(&__get_cpu_var(alert_counter)) == 5 * nmi_hz)
|
2005-09-03 22:56:48 +00:00
|
|
|
/*
|
|
|
|
* die_nmi will return ONLY if NOTIFY_STOP happens..
|
|
|
|
*/
|
2008-05-24 15:36:31 +00:00
|
|
|
die_nmi("BUG: NMI Watchdog detected LOCKUP",
|
2008-05-24 15:36:34 +00:00
|
|
|
regs, panic_on_timeout);
|
2005-04-16 22:20:36 +00:00
|
|
|
} else {
|
2005-05-17 04:53:34 +00:00
|
|
|
__get_cpu_var(last_irq_sum) = sum;
|
|
|
|
local_set(&__get_cpu_var(alert_counter), 0);
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
2006-09-26 08:52:26 +00:00
|
|
|
|
|
|
|
/* see if the nmi watchdog went off */
|
2007-05-02 17:27:20 +00:00
|
|
|
if (!__get_cpu_var(wd_enabled))
|
|
|
|
return rc;
|
|
|
|
switch (nmi_watchdog) {
|
|
|
|
case NMI_LOCAL_APIC:
|
|
|
|
rc |= lapic_wd_event(nmi_hz);
|
|
|
|
break;
|
|
|
|
case NMI_IO_APIC:
|
2008-05-24 15:36:41 +00:00
|
|
|
/*
|
|
|
|
* don't know how to accurately check for this.
|
2007-05-02 17:27:20 +00:00
|
|
|
* just assume it was a watchdog timer interrupt
|
|
|
|
* This matches the old behaviour.
|
|
|
|
*/
|
|
|
|
rc = 1;
|
|
|
|
break;
|
2005-05-17 04:53:34 +00:00
|
|
|
}
|
2006-09-26 08:52:26 +00:00
|
|
|
return rc;
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_SYSCTL
|
|
|
|
|
2008-07-19 22:32:54 +00:00
|
|
|
static int __init setup_unknown_nmi_panic(char *str)
|
2007-07-22 09:12:32 +00:00
|
|
|
{
|
2008-07-19 22:32:54 +00:00
|
|
|
unknown_nmi_panic = 1;
|
|
|
|
return 1;
|
2007-07-22 09:12:32 +00:00
|
|
|
}
|
2008-07-19 22:32:54 +00:00
|
|
|
__setup("unknown_nmi_panic", setup_unknown_nmi_panic);
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu)
|
|
|
|
{
|
|
|
|
unsigned char reason = get_nmi_reason();
|
|
|
|
char buf[64];
|
|
|
|
|
2006-09-26 08:52:27 +00:00
|
|
|
sprintf(buf, "NMI received for unknown reason %02x\n", reason);
|
2008-05-24 15:36:37 +00:00
|
|
|
die_nmi(buf, regs, 1); /* Always panic here */
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2006-09-26 08:52:27 +00:00
|
|
|
/*
|
|
|
|
* proc handler for /proc/sys/kernel/nmi
|
|
|
|
*/
|
|
|
|
int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file,
|
|
|
|
void __user *buffer, size_t *length, loff_t *ppos)
|
|
|
|
{
|
|
|
|
int old_state;
|
|
|
|
|
|
|
|
nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0;
|
|
|
|
old_state = nmi_watchdog_enabled;
|
|
|
|
proc_dointvec(table, write, file, buffer, length, ppos);
|
|
|
|
if (!!old_state == !!nmi_watchdog_enabled)
|
|
|
|
return 0;
|
|
|
|
|
2008-06-24 20:52:06 +00:00
|
|
|
if (atomic_read(&nmi_active) < 0 || !nmi_watchdog_active()) {
|
2008-05-24 15:36:41 +00:00
|
|
|
printk(KERN_WARNING
|
|
|
|
"NMI watchdog is permanently disabled\n");
|
2006-09-26 08:52:27 +00:00
|
|
|
return -EIO;
|
2006-09-26 08:52:27 +00:00
|
|
|
}
|
|
|
|
|
2006-09-26 08:52:27 +00:00
|
|
|
if (nmi_watchdog == NMI_LOCAL_APIC) {
|
2006-09-26 08:52:27 +00:00
|
|
|
if (nmi_watchdog_enabled)
|
|
|
|
enable_lapic_nmi_watchdog();
|
|
|
|
else
|
|
|
|
disable_lapic_nmi_watchdog();
|
|
|
|
} else {
|
2008-05-24 15:36:41 +00:00
|
|
|
printk(KERN_WARNING
|
2006-09-26 08:52:27 +00:00
|
|
|
"NMI watchdog doesn't know what hardware to touch\n");
|
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-05-24 15:36:41 +00:00
|
|
|
#endif /* CONFIG_SYSCTL */
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-02-03 07:40:30 +00:00
|
|
|
int do_nmi_callback(struct pt_regs *regs, int cpu)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_SYSCTL
|
|
|
|
if (unknown_nmi_panic)
|
|
|
|
return unknown_nmi_panic_callback(regs, cpu);
|
|
|
|
#endif
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2006-12-07 01:14:01 +00:00
|
|
|
void __trigger_all_cpu_backtrace(void)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
backtrace_mask = cpu_online_map;
|
|
|
|
/* Wait for up to 10 seconds for all CPUs to do the backtrace */
|
|
|
|
for (i = 0; i < 10 * 1000; i++) {
|
|
|
|
if (cpus_empty(backtrace_mask))
|
|
|
|
break;
|
|
|
|
mdelay(1);
|
|
|
|
}
|
|
|
|
}
|