2005-04-16 22:20:36 +00:00
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/*
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* linux/arch/m32r/mm/fault.c
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*
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* Copyright (c) 2001, 2002 Hitoshi Yamamoto, and H. Kondo
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* Copyright (c) 2004 Naoto Sugai, NIIBE Yutaka
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*
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* Some code taken from i386 version.
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* Copyright (C) 1995 Linus Torvalds
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*/
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/ptrace.h>
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#include <linux/mman.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/tty.h>
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#include <linux/vt_kern.h> /* For unblank_screen() */
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#include <linux/highmem.h>
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#include <linux/module.h>
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#include <asm/m32r.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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#include <asm/hardirq.h>
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#include <asm/mmu_context.h>
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#include <asm/tlbflush.h>
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extern void die(const char *, struct pt_regs *, long);
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#ifndef CONFIG_SMP
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asmlinkage unsigned int tlb_entry_i_dat;
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asmlinkage unsigned int tlb_entry_d_dat;
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#define tlb_entry_i tlb_entry_i_dat
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#define tlb_entry_d tlb_entry_d_dat
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#else
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unsigned int tlb_entry_i_dat[NR_CPUS];
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unsigned int tlb_entry_d_dat[NR_CPUS];
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#define tlb_entry_i tlb_entry_i_dat[smp_processor_id()]
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#define tlb_entry_d tlb_entry_d_dat[smp_processor_id()]
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#endif
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extern void init_tlb(void);
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/*======================================================================*
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* do_page_fault()
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*======================================================================*
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* This routine handles page faults. It determines the address,
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* and the problem, and then passes it off to one of the appropriate
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* routines.
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*
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* ARGUMENT:
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* regs : M32R SP reg.
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* error_code : See below
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* address : M32R MMU MDEVA reg. (Operand ACE)
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* : M32R BPC reg. (Instruction ACE)
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*
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* error_code :
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* bit 0 == 0 means no page found, 1 means protection fault
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* bit 1 == 0 means read, 1 means write
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* bit 2 == 0 means kernel, 1 means user-mode
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* bit 3 == 0 means data, 1 means instruction
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*======================================================================*/
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#define ACE_PROTECTION 1
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#define ACE_WRITE 2
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#define ACE_USERMODE 4
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#define ACE_INSTRUCTION 8
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asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long error_code,
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unsigned long address)
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{
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struct task_struct *tsk;
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struct mm_struct *mm;
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struct vm_area_struct * vma;
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unsigned long page, addr;
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int write;
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2007-07-19 08:47:05 +00:00
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int fault;
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2005-04-16 22:20:36 +00:00
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siginfo_t info;
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/*
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* If BPSW IE bit enable --> set PSW IE bit
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*/
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if (regs->psw & M32R_PSW_BIE)
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local_irq_enable();
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tsk = current;
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info.si_code = SEGV_MAPERR;
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/*
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* We fault-in kernel-space virtual memory on-demand. The
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* 'reference' page table is init_mm.pgd.
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*
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* NOTE! We MUST NOT take any locks for this case. We may
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* be in an interrupt or a critical region, and should
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* only copy the information from the master page table,
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* nothing more.
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*
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* This verifies that the fault happens in kernel space
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* (error_code & ACE_USERMODE) == 0, and that the fault was not a
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* protection error (error_code & ACE_PROTECTION) == 0.
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*/
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if (address >= TASK_SIZE && !(error_code & ACE_USERMODE))
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goto vmalloc_fault;
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mm = tsk->mm;
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/*
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* If we're in an interrupt or have no user context or are running in an
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* atomic region then we must not take the fault..
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*/
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if (in_atomic() || !mm)
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goto bad_area_nosemaphore;
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/* When running in the kernel we expect faults to occur only to
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* addresses in user space. All other faults represent errors in the
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* kernel and should generate an OOPS. Unfortunatly, in the case of an
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2006-06-30 16:27:16 +00:00
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* erroneous fault occurring in a code path which already holds mmap_sem
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2005-04-16 22:20:36 +00:00
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* we will deadlock attempting to validate the fault against the
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* address space. Luckily the kernel only validly references user
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* space from well defined areas of code, which are listed in the
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* exceptions table.
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*
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* As the vast majority of faults will be valid we will only perform
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* the source reference check when there is a possibilty of a deadlock.
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* Attempt to lock the address space, if we cannot we then validate the
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* source. If this is invalid we can skip the address space check,
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* thus avoiding the deadlock.
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*/
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if (!down_read_trylock(&mm->mmap_sem)) {
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if ((error_code & ACE_USERMODE) == 0 &&
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!search_exception_tables(regs->psw))
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goto bad_area_nosemaphore;
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down_read(&mm->mmap_sem);
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}
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vma = find_vma(mm, address);
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if (!vma)
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goto bad_area;
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if (vma->vm_start <= address)
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goto good_area;
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if (!(vma->vm_flags & VM_GROWSDOWN))
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goto bad_area;
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2006-12-08 10:35:56 +00:00
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2005-04-16 22:20:36 +00:00
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if (error_code & ACE_USERMODE) {
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/*
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* accessing the stack below "spu" is always a bug.
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* The "+ 4" is there due to the push instruction
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* doing pre-decrement on the stack and that
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* doesn't show up until later..
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*/
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if (address + 4 < regs->spu)
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goto bad_area;
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}
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2006-12-08 10:35:56 +00:00
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2005-04-16 22:20:36 +00:00
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if (expand_stack(vma, address))
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goto bad_area;
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/*
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* Ok, we have a good vm_area for this memory access, so
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* we can handle it..
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*/
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good_area:
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info.si_code = SEGV_ACCERR;
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write = 0;
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switch (error_code & (ACE_WRITE|ACE_PROTECTION)) {
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default: /* 3: write, present */
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/* fall through */
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case ACE_WRITE: /* write, not present */
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if (!(vma->vm_flags & VM_WRITE))
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goto bad_area;
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write++;
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break;
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case ACE_PROTECTION: /* read, present */
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case 0: /* read, not present */
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if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
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goto bad_area;
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}
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/*
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* For instruction access exception, check if the area is executable
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*/
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if ((error_code & ACE_INSTRUCTION) && !(vma->vm_flags & VM_EXEC))
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goto bad_area;
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survive:
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/*
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* If for any reason at all we couldn't handle the fault,
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* make sure we exit gracefully rather than endlessly redo
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* the fault.
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*/
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addr = (address & PAGE_MASK);
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set_thread_fault_code(error_code);
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2007-07-19 08:47:05 +00:00
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fault = handle_mm_fault(mm, vma, addr, write);
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if (unlikely(fault & VM_FAULT_ERROR)) {
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if (fault & VM_FAULT_OOM)
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2005-04-16 22:20:36 +00:00
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goto out_of_memory;
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2007-07-19 08:47:05 +00:00
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else if (fault & VM_FAULT_SIGBUS)
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goto do_sigbus;
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BUG();
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2005-04-16 22:20:36 +00:00
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}
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2007-07-19 08:47:05 +00:00
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if (fault & VM_FAULT_MAJOR)
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tsk->maj_flt++;
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else
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tsk->min_flt++;
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2005-04-16 22:20:36 +00:00
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set_thread_fault_code(0);
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up_read(&mm->mmap_sem);
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return;
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/*
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* Something tried to access memory that isn't in our memory map..
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* Fix it, but check if it's kernel or user first..
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*/
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bad_area:
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up_read(&mm->mmap_sem);
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bad_area_nosemaphore:
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/* User mode accesses just cause a SIGSEGV */
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if (error_code & ACE_USERMODE) {
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tsk->thread.address = address;
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tsk->thread.error_code = error_code | (address >= TASK_SIZE);
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tsk->thread.trap_no = 14;
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info.si_signo = SIGSEGV;
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info.si_errno = 0;
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/* info.si_code has been set above */
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info.si_addr = (void __user *)address;
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force_sig_info(SIGSEGV, &info, tsk);
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return;
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}
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no_context:
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/* Are we prepared to handle this kernel fault? */
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if (fixup_exception(regs))
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return;
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/*
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* Oops. The kernel tried to access some bad page. We'll have to
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* terminate things with extreme prejudice.
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*/
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bust_spinlocks(1);
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if (address < PAGE_SIZE)
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printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
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else
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printk(KERN_ALERT "Unable to handle kernel paging request");
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printk(" at virtual address %08lx\n",address);
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printk(KERN_ALERT " printing bpc:\n");
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printk("%08lx\n", regs->bpc);
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page = *(unsigned long *)MPTB;
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page = ((unsigned long *) page)[address >> PGDIR_SHIFT];
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printk(KERN_ALERT "*pde = %08lx\n", page);
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if (page & _PAGE_PRESENT) {
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page &= PAGE_MASK;
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address &= 0x003ff000;
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page = ((unsigned long *) __va(page))[address >> PAGE_SHIFT];
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printk(KERN_ALERT "*pte = %08lx\n", page);
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}
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die("Oops", regs, error_code);
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bust_spinlocks(0);
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do_exit(SIGKILL);
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/*
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* We ran out of memory, or some other thing happened to us that made
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* us unable to handle the page fault gracefully.
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*/
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out_of_memory:
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up_read(&mm->mmap_sem);
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2006-09-29 09:00:07 +00:00
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if (is_init(tsk)) {
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2005-04-16 22:20:36 +00:00
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yield();
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down_read(&mm->mmap_sem);
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goto survive;
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}
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printk("VM: killing process %s\n", tsk->comm);
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if (error_code & ACE_USERMODE)
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2007-10-16 08:24:18 +00:00
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do_group_exit(SIGKILL);
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2005-04-16 22:20:36 +00:00
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goto no_context;
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do_sigbus:
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up_read(&mm->mmap_sem);
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/* Kernel mode? Handle exception or die */
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if (!(error_code & ACE_USERMODE))
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goto no_context;
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tsk->thread.address = address;
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tsk->thread.error_code = error_code;
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tsk->thread.trap_no = 14;
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info.si_signo = SIGBUS;
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info.si_errno = 0;
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info.si_code = BUS_ADRERR;
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info.si_addr = (void __user *)address;
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force_sig_info(SIGBUS, &info, tsk);
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return;
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vmalloc_fault:
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{
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/*
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* Synchronize this task's top level page-table
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* with the 'reference' page table.
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*
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* Do _not_ use "tsk" here. We might be inside
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* an interrupt in the middle of a task switch..
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*/
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int offset = pgd_index(address);
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pgd_t *pgd, *pgd_k;
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pmd_t *pmd, *pmd_k;
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pte_t *pte_k;
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pgd = (pgd_t *)*(unsigned long *)MPTB;
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pgd = offset + (pgd_t *)pgd;
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pgd_k = init_mm.pgd + offset;
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if (!pgd_present(*pgd_k))
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goto no_context;
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/*
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* set_pgd(pgd, *pgd_k); here would be useless on PAE
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* and redundant with the set_pmd() on non-PAE.
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*/
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pmd = pmd_offset(pgd, address);
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pmd_k = pmd_offset(pgd_k, address);
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if (!pmd_present(*pmd_k))
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goto no_context;
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set_pmd(pmd, *pmd_k);
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pte_k = pte_offset_kernel(pmd_k, address);
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if (!pte_present(*pte_k))
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goto no_context;
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2007-02-10 09:43:37 +00:00
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addr = (address & PAGE_MASK);
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set_thread_fault_code(error_code);
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2005-04-16 22:20:36 +00:00
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update_mmu_cache(NULL, addr, *pte_k);
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2007-02-10 09:43:37 +00:00
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set_thread_fault_code(0);
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2005-04-16 22:20:36 +00:00
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return;
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}
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}
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/*======================================================================*
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* update_mmu_cache()
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*======================================================================*/
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#define TLB_MASK (NR_TLB_ENTRIES - 1)
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#define ITLB_END (unsigned long *)(ITLB_BASE + (NR_TLB_ENTRIES * 8))
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#define DTLB_END (unsigned long *)(DTLB_BASE + (NR_TLB_ENTRIES * 8))
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void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr,
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pte_t pte)
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{
|
2007-02-10 09:43:37 +00:00
|
|
|
volatile unsigned long *entry1, *entry2;
|
2005-04-16 22:20:36 +00:00
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|
|
unsigned long pte_data, flags;
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|
|
unsigned int *entry_dat;
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|
|
int inst = get_thread_fault_code() & ACE_INSTRUCTION;
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|
|
int i;
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|
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|
/* Ptrace may call this routine. */
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|
if (vma && current->active_mm != vma->vm_mm)
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|
return;
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|
local_irq_save(flags);
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|
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|
vaddr = (vaddr & PAGE_MASK) | get_asid();
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|
2007-02-10 09:43:37 +00:00
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|
pte_data = pte_val(pte);
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|
|
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|
2005-04-16 22:20:36 +00:00
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|
#ifdef CONFIG_CHIP_OPSP
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|
entry1 = (unsigned long *)ITLB_BASE;
|
2007-02-10 09:43:37 +00:00
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|
for (i = 0; i < NR_TLB_ENTRIES; i++) {
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|
if (*entry1++ == vaddr) {
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|
|
set_tlb_data(entry1, pte_data);
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|
|
break;
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|
|
|
}
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|
|
|
entry1++;
|
2005-04-16 22:20:36 +00:00
|
|
|
}
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|
|
|
entry2 = (unsigned long *)DTLB_BASE;
|
2007-02-10 09:43:37 +00:00
|
|
|
for (i = 0; i < NR_TLB_ENTRIES; i++) {
|
|
|
|
if (*entry2++ == vaddr) {
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|
|
|
set_tlb_data(entry2, pte_data);
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|
|
|
break;
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|
|
|
}
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|
|
|
entry2++;
|
2005-04-16 22:20:36 +00:00
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|
|
}
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|
|
#else
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|
|
/*
|
|
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|
* Update TLB entries
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|
|
* entry1: ITLB entry address
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|
|
|
* entry2: DTLB entry address
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|
|
|
*/
|
|
|
|
__asm__ __volatile__ (
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|
|
|
"seth %0, #high(%4) \n\t"
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|
|
|
"st %2, @(%5, %0) \n\t"
|
|
|
|
"ldi %1, #1 \n\t"
|
|
|
|
"st %1, @(%6, %0) \n\t"
|
|
|
|
"add3 r4, %0, %7 \n\t"
|
|
|
|
".fillinsn \n"
|
|
|
|
"1: \n\t"
|
|
|
|
"ld %1, @(%6, %0) \n\t"
|
|
|
|
"bnez %1, 1b \n\t"
|
|
|
|
"ld %0, @r4+ \n\t"
|
|
|
|
"ld %1, @r4 \n\t"
|
|
|
|
"st %3, @+%0 \n\t"
|
|
|
|
"st %3, @+%1 \n\t"
|
|
|
|
: "=&r" (entry1), "=&r" (entry2)
|
|
|
|
: "r" (vaddr), "r" (pte_data), "i" (MMU_REG_BASE),
|
|
|
|
"i" (MSVA_offset), "i" (MTOP_offset), "i" (MIDXI_offset)
|
|
|
|
: "r4", "memory"
|
|
|
|
);
|
2007-02-10 09:43:37 +00:00
|
|
|
#endif
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
if ((!inst && entry2 >= DTLB_END) || (inst && entry1 >= ITLB_END))
|
|
|
|
goto notfound;
|
|
|
|
|
|
|
|
found:
|
|
|
|
local_irq_restore(flags);
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* Valid entry not found */
|
|
|
|
notfound:
|
|
|
|
/*
|
|
|
|
* Update ITLB or DTLB entry
|
|
|
|
* entry1: TLB entry address
|
|
|
|
* entry2: TLB base address
|
|
|
|
*/
|
|
|
|
if (!inst) {
|
|
|
|
entry2 = (unsigned long *)DTLB_BASE;
|
|
|
|
entry_dat = &tlb_entry_d;
|
|
|
|
} else {
|
|
|
|
entry2 = (unsigned long *)ITLB_BASE;
|
|
|
|
entry_dat = &tlb_entry_i;
|
|
|
|
}
|
|
|
|
entry1 = entry2 + (((*entry_dat - 1) & TLB_MASK) << 1);
|
|
|
|
|
|
|
|
for (i = 0 ; i < NR_TLB_ENTRIES ; i++) {
|
|
|
|
if (!(entry1[1] & 2)) /* Valid bit check */
|
|
|
|
break;
|
|
|
|
|
|
|
|
if (entry1 != entry2)
|
|
|
|
entry1 -= 2;
|
|
|
|
else
|
|
|
|
entry1 += TLB_MASK << 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (i >= NR_TLB_ENTRIES) { /* Empty entry not found */
|
|
|
|
entry1 = entry2 + (*entry_dat << 1);
|
|
|
|
*entry_dat = (*entry_dat + 1) & TLB_MASK;
|
|
|
|
}
|
|
|
|
*entry1++ = vaddr; /* Set TLB tag */
|
|
|
|
set_tlb_data(entry1, pte_data);
|
|
|
|
|
|
|
|
goto found;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*======================================================================*
|
|
|
|
* flush_tlb_page() : flushes one page
|
|
|
|
*======================================================================*/
|
|
|
|
void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
|
|
|
|
{
|
|
|
|
if (vma->vm_mm && mm_context(vma->vm_mm) != NO_CONTEXT) {
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
local_irq_save(flags);
|
|
|
|
page &= PAGE_MASK;
|
|
|
|
page |= (mm_context(vma->vm_mm) & MMU_CONTEXT_ASID_MASK);
|
|
|
|
__flush_tlb_page(page);
|
|
|
|
local_irq_restore(flags);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*======================================================================*
|
|
|
|
* flush_tlb_range() : flushes a range of pages
|
|
|
|
*======================================================================*/
|
|
|
|
void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
|
|
|
|
unsigned long end)
|
|
|
|
{
|
|
|
|
struct mm_struct *mm;
|
|
|
|
|
|
|
|
mm = vma->vm_mm;
|
|
|
|
if (mm_context(mm) != NO_CONTEXT) {
|
|
|
|
unsigned long flags;
|
|
|
|
int size;
|
|
|
|
|
|
|
|
local_irq_save(flags);
|
|
|
|
size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
|
|
|
|
if (size > (NR_TLB_ENTRIES / 4)) { /* Too many TLB to flush */
|
|
|
|
mm_context(mm) = NO_CONTEXT;
|
|
|
|
if (mm == current->mm)
|
|
|
|
activate_context(mm);
|
|
|
|
} else {
|
|
|
|
unsigned long asid;
|
|
|
|
|
|
|
|
asid = mm_context(mm) & MMU_CONTEXT_ASID_MASK;
|
|
|
|
start &= PAGE_MASK;
|
|
|
|
end += (PAGE_SIZE - 1);
|
|
|
|
end &= PAGE_MASK;
|
|
|
|
|
|
|
|
start |= asid;
|
|
|
|
end |= asid;
|
|
|
|
while (start < end) {
|
|
|
|
__flush_tlb_page(start);
|
|
|
|
start += PAGE_SIZE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
local_irq_restore(flags);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*======================================================================*
|
|
|
|
* flush_tlb_mm() : flushes the specified mm context TLB's
|
|
|
|
*======================================================================*/
|
|
|
|
void local_flush_tlb_mm(struct mm_struct *mm)
|
|
|
|
{
|
|
|
|
/* Invalidate all TLB of this process. */
|
|
|
|
/* Instead of invalidating each TLB, we get new MMU context. */
|
|
|
|
if (mm_context(mm) != NO_CONTEXT) {
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
local_irq_save(flags);
|
|
|
|
mm_context(mm) = NO_CONTEXT;
|
|
|
|
if (mm == current->mm)
|
|
|
|
activate_context(mm);
|
|
|
|
local_irq_restore(flags);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*======================================================================*
|
|
|
|
* flush_tlb_all() : flushes all processes TLBs
|
|
|
|
*======================================================================*/
|
|
|
|
void local_flush_tlb_all(void)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
local_irq_save(flags);
|
|
|
|
__flush_tlb_all();
|
|
|
|
local_irq_restore(flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*======================================================================*
|
|
|
|
* init_mmu()
|
|
|
|
*======================================================================*/
|
|
|
|
void __init init_mmu(void)
|
|
|
|
{
|
|
|
|
tlb_entry_i = 0;
|
|
|
|
tlb_entry_d = 0;
|
|
|
|
mmu_context_cache = MMU_CONTEXT_FIRST_VERSION;
|
|
|
|
set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK);
|
|
|
|
*(volatile unsigned long *)MPTB = (unsigned long)swapper_pg_dir;
|
|
|
|
}
|