2008-10-31 16:14:33 +00:00
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/* linux/arch/arm/plat-s3c64xx/include/mach/regs-gpio.h
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*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* S3C64XX - GPIO register definitions
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*/
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#ifndef __ASM_PLAT_S3C64XX_REGS_GPIO_H
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#define __ASM_PLAT_S3C64XX_REGS_GPIO_H __FILE__
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/* Base addresses for each of the banks */
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2008-12-12 00:24:15 +00:00
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#define S3C64XX_GPIOREG(reg) (S3C64XX_VA_GPIO + (reg))
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#define S3C64XX_GPA_BASE S3C64XX_GPIOREG(0x0000)
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#define S3C64XX_GPB_BASE S3C64XX_GPIOREG(0x0020)
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#define S3C64XX_GPC_BASE S3C64XX_GPIOREG(0x0040)
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#define S3C64XX_GPD_BASE S3C64XX_GPIOREG(0x0060)
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#define S3C64XX_GPE_BASE S3C64XX_GPIOREG(0x0080)
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#define S3C64XX_GPF_BASE S3C64XX_GPIOREG(0x00A0)
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#define S3C64XX_GPG_BASE S3C64XX_GPIOREG(0x00C0)
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#define S3C64XX_GPH_BASE S3C64XX_GPIOREG(0x00E0)
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#define S3C64XX_GPI_BASE S3C64XX_GPIOREG(0x0100)
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#define S3C64XX_GPJ_BASE S3C64XX_GPIOREG(0x0120)
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#define S3C64XX_GPK_BASE S3C64XX_GPIOREG(0x0800)
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#define S3C64XX_GPL_BASE S3C64XX_GPIOREG(0x0810)
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#define S3C64XX_GPM_BASE S3C64XX_GPIOREG(0x0820)
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#define S3C64XX_GPN_BASE S3C64XX_GPIOREG(0x0830)
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#define S3C64XX_GPO_BASE S3C64XX_GPIOREG(0x0140)
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#define S3C64XX_GPP_BASE S3C64XX_GPIOREG(0x0160)
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#define S3C64XX_GPQ_BASE S3C64XX_GPIOREG(0x0180)
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/* External interrupt registers */
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#define S3C64XX_EINT12CON S3C64XX_GPIOREG(0x200)
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#define S3C64XX_EINT34CON S3C64XX_GPIOREG(0x204)
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#define S3C64XX_EINT56CON S3C64XX_GPIOREG(0x208)
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#define S3C64XX_EINT78CON S3C64XX_GPIOREG(0x20C)
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#define S3C64XX_EINT9CON S3C64XX_GPIOREG(0x210)
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#define S3C64XX_EINT12FLTCON S3C64XX_GPIOREG(0x220)
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#define S3C64XX_EINT34FLTCON S3C64XX_GPIOREG(0x224)
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#define S3C64XX_EINT56FLTCON S3C64XX_GPIOREG(0x228)
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#define S3C64XX_EINT78FLTCON S3C64XX_GPIOREG(0x22C)
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#define S3C64XX_EINT9FLTCON S3C64XX_GPIOREG(0x230)
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#define S3C64XX_EINT12MASK S3C64XX_GPIOREG(0x240)
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#define S3C64XX_EINT34MASK S3C64XX_GPIOREG(0x244)
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#define S3C64XX_EINT56MASK S3C64XX_GPIOREG(0x248)
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#define S3C64XX_EINT78MASK S3C64XX_GPIOREG(0x24C)
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#define S3C64XX_EINT9MASK S3C64XX_GPIOREG(0x250)
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#define S3C64XX_EINT12PEND S3C64XX_GPIOREG(0x260)
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#define S3C64XX_EINT34PEND S3C64XX_GPIOREG(0x264)
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#define S3C64XX_EINT56PEND S3C64XX_GPIOREG(0x268)
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#define S3C64XX_EINT78PEND S3C64XX_GPIOREG(0x26C)
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#define S3C64XX_EINT9PEND S3C64XX_GPIOREG(0x270)
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#define S3C64XX_PRIORITY S3C64XX_GPIOREG(0x280)
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#define S3C64XX_PRIORITY_ARB(x) (1 << (x))
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#define S3C64XX_SERVICE S3C64XX_GPIOREG(0x284)
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#define S3C64XX_SERVICEPEND S3C64XX_GPIOREG(0x288)
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#define S3C64XX_EINT0CON0 S3C64XX_GPIOREG(0x900)
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#define S3C64XX_EINT0CON1 S3C64XX_GPIOREG(0x904)
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#define S3C64XX_EINT0FLTCON0 S3C64XX_GPIOREG(0x910)
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#define S3C64XX_EINT0FLTCON1 S3C64XX_GPIOREG(0x914)
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#define S3C64XX_EINT0FLTCON2 S3C64XX_GPIOREG(0x918)
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#define S3C64XX_EINT0FLTCON3 S3C64XX_GPIOREG(0x91C)
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#define S3C64XX_EINT0MASK S3C64XX_GPIOREG(0x920)
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#define S3C64XX_EINT0PEND S3C64XX_GPIOREG(0x924)
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2008-10-31 16:14:33 +00:00
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#endif /* __ASM_PLAT_S3C64XX_REGS_GPIO_H */
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