2009-08-18 17:06:28 +00:00
|
|
|
#include <linux/interrupt.h>
|
|
|
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#include <linux/gpio.h>
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|
|
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#include <linux/mutex.h>
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|
|
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#include <linux/kernel.h>
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|
|
|
#include <linux/spi/spi.h>
|
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 08:04:11 +00:00
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#include <linux/slab.h>
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2009-08-18 17:06:28 +00:00
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#include "../iio.h"
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#include "../ring_sw.h"
|
2011-02-11 13:09:11 +00:00
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#include "../kfifo_buf.h"
|
2009-08-18 17:06:28 +00:00
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#include "../trigger.h"
|
2011-08-24 16:28:39 +00:00
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#include "../trigger_consumer.h"
|
2009-08-18 17:06:28 +00:00
|
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#include "lis3l02dq.h"
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|
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/**
|
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* combine_8_to_16() utility function to munge to u8s into u16
|
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**/
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static inline u16 combine_8_to_16(u8 lower, u8 upper)
|
|
|
|
{
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|
|
|
u16 _lower = lower;
|
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|
u16 _upper = upper;
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|
|
return _lower | (_upper << 8);
|
|
|
|
}
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2011-05-18 13:42:20 +00:00
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|
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/**
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* lis3l02dq_data_rdy_trig_poll() the event handler for the data rdy trig
|
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**/
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irqreturn_t lis3l02dq_data_rdy_trig_poll(int irq, void *private)
|
|
|
|
{
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|
|
|
struct iio_dev *indio_dev = private;
|
2011-05-18 13:42:26 +00:00
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struct lis3l02dq_state *st = iio_priv(indio_dev);
|
2011-05-18 13:42:20 +00:00
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if (st->trigger_on) {
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iio_trigger_poll(st->trig, iio_get_time_ns());
|
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|
return IRQ_HANDLED;
|
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} else
|
|
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return IRQ_WAKE_THREAD;
|
|
|
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}
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2009-08-18 17:06:28 +00:00
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|
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/**
|
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* lis3l02dq_read_accel_from_ring() individual acceleration read from ring
|
|
|
|
**/
|
2011-05-18 13:40:52 +00:00
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ssize_t lis3l02dq_read_accel_from_ring(struct iio_ring_buffer *ring,
|
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|
|
int index,
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int *val)
|
2009-08-18 17:06:28 +00:00
|
|
|
{
|
2011-05-18 13:40:52 +00:00
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int ret;
|
2009-08-18 17:06:28 +00:00
|
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|
s16 *data;
|
2011-05-18 13:42:34 +00:00
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2011-05-18 13:40:52 +00:00
|
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if (!iio_scan_mask_query(ring, index))
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return -EINVAL;
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2009-08-18 17:06:28 +00:00
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2011-05-18 13:42:34 +00:00
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if (!ring->access->read_last)
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return -EBUSY;
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|
2011-05-18 13:42:24 +00:00
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data = kmalloc(ring->access->get_bytes_per_datum(ring),
|
2011-05-18 13:40:52 +00:00
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|
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GFP_KERNEL);
|
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if (data == NULL)
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return -ENOMEM;
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2011-05-18 13:42:24 +00:00
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ret = ring->access->read_last(ring, (u8 *)data);
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2011-05-18 13:40:52 +00:00
|
|
|
if (ret)
|
2009-08-18 17:06:28 +00:00
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|
goto error_free_data;
|
2011-09-02 16:14:38 +00:00
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*val = data[bitmap_weight(ring->scan_mask, index)];
|
2009-08-18 17:06:28 +00:00
|
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error_free_data:
|
2011-09-02 16:14:38 +00:00
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2009-08-18 17:06:28 +00:00
|
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|
kfree(data);
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2011-05-18 13:42:34 +00:00
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|
2011-05-18 13:40:52 +00:00
|
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|
return ret;
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2009-08-18 17:06:28 +00:00
|
|
|
}
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2010-05-04 21:34:36 +00:00
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static const u8 read_all_tx_array[] = {
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2009-08-18 17:06:28 +00:00
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LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_L_ADDR), 0,
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LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_H_ADDR), 0,
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LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Y_L_ADDR), 0,
|
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LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Y_H_ADDR), 0,
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|
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LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Z_L_ADDR), 0,
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LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Z_H_ADDR), 0,
|
|
|
|
};
|
|
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|
|
/**
|
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* lis3l02dq_read_all() Reads all channels currently selected
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* @st: device specific state
|
2011-03-31 01:57:33 +00:00
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|
* @rx_array: (dma capable) receive array, must be at least
|
2009-08-18 17:06:28 +00:00
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|
* 4*number of channels
|
|
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|
**/
|
2011-05-18 13:42:26 +00:00
|
|
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static int lis3l02dq_read_all(struct iio_dev *indio_dev, u8 *rx_array)
|
2009-08-18 17:06:28 +00:00
|
|
|
{
|
2011-05-18 13:42:26 +00:00
|
|
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struct iio_ring_buffer *ring = indio_dev->ring;
|
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|
|
struct lis3l02dq_state *st = iio_priv(indio_dev);
|
2009-08-18 17:06:28 +00:00
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struct spi_transfer *xfers;
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|
struct spi_message msg;
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|
int ret, i, j = 0;
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|
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|
2010-08-31 09:32:52 +00:00
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xfers = kzalloc((ring->scan_count) * 2
|
2009-08-18 17:06:28 +00:00
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|
* sizeof(*xfers), GFP_KERNEL);
|
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|
if (!xfers)
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|
return -ENOMEM;
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|
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mutex_lock(&st->buf_lock);
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|
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|
2011-05-18 13:40:52 +00:00
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for (i = 0; i < ARRAY_SIZE(read_all_tx_array)/4; i++)
|
2011-09-02 16:14:38 +00:00
|
|
|
if (test_bit(i, ring->scan_mask)) {
|
2009-08-18 17:06:28 +00:00
|
|
|
/* lower byte */
|
|
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|
xfers[j].tx_buf = st->tx + 2*j;
|
|
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|
st->tx[2*j] = read_all_tx_array[i*4];
|
|
|
|
st->tx[2*j + 1] = 0;
|
|
|
|
if (rx_array)
|
|
|
|
xfers[j].rx_buf = rx_array + j*2;
|
|
|
|
xfers[j].bits_per_word = 8;
|
|
|
|
xfers[j].len = 2;
|
|
|
|
xfers[j].cs_change = 1;
|
|
|
|
j++;
|
|
|
|
|
|
|
|
/* upper byte */
|
|
|
|
xfers[j].tx_buf = st->tx + 2*j;
|
|
|
|
st->tx[2*j] = read_all_tx_array[i*4 + 2];
|
|
|
|
st->tx[2*j + 1] = 0;
|
|
|
|
if (rx_array)
|
|
|
|
xfers[j].rx_buf = rx_array + j*2;
|
|
|
|
xfers[j].bits_per_word = 8;
|
|
|
|
xfers[j].len = 2;
|
|
|
|
xfers[j].cs_change = 1;
|
|
|
|
j++;
|
|
|
|
}
|
2011-05-18 13:40:52 +00:00
|
|
|
|
2009-08-18 17:06:28 +00:00
|
|
|
/* After these are transmitted, the rx_buff should have
|
|
|
|
* values in alternate bytes
|
|
|
|
*/
|
|
|
|
spi_message_init(&msg);
|
2010-08-31 09:32:52 +00:00
|
|
|
for (j = 0; j < ring->scan_count * 2; j++)
|
2009-08-18 17:06:28 +00:00
|
|
|
spi_message_add_tail(&xfers[j], &msg);
|
|
|
|
|
|
|
|
ret = spi_sync(st->us, &msg);
|
|
|
|
mutex_unlock(&st->buf_lock);
|
|
|
|
kfree(xfers);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2011-05-18 13:42:26 +00:00
|
|
|
static int lis3l02dq_get_ring_element(struct iio_dev *indio_dev,
|
2010-07-11 15:39:19 +00:00
|
|
|
u8 *buf)
|
|
|
|
{
|
|
|
|
int ret, i;
|
|
|
|
u8 *rx_array ;
|
|
|
|
s16 *data = (s16 *)buf;
|
2009-08-18 17:06:28 +00:00
|
|
|
|
2011-05-18 13:42:26 +00:00
|
|
|
rx_array = kzalloc(4 * (indio_dev->ring->scan_count), GFP_KERNEL);
|
2010-07-11 15:39:19 +00:00
|
|
|
if (rx_array == NULL)
|
|
|
|
return -ENOMEM;
|
2011-05-18 13:42:26 +00:00
|
|
|
ret = lis3l02dq_read_all(indio_dev, rx_array);
|
2010-07-11 15:39:19 +00:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2011-05-18 13:42:26 +00:00
|
|
|
for (i = 0; i < indio_dev->ring->scan_count; i++)
|
2010-07-11 15:39:19 +00:00
|
|
|
data[i] = combine_8_to_16(rx_array[i*4+1],
|
|
|
|
rx_array[i*4+3]);
|
2009-08-18 17:06:28 +00:00
|
|
|
kfree(rx_array);
|
|
|
|
|
2010-07-11 15:39:19 +00:00
|
|
|
return i*sizeof(data[0]);
|
2009-08-18 17:06:28 +00:00
|
|
|
}
|
|
|
|
|
2011-05-18 13:42:26 +00:00
|
|
|
static irqreturn_t lis3l02dq_trigger_handler(int irq, void *p)
|
|
|
|
{
|
|
|
|
struct iio_poll_func *pf = p;
|
2011-08-24 16:28:36 +00:00
|
|
|
struct iio_dev *indio_dev = pf->indio_dev;
|
2011-05-18 13:42:26 +00:00
|
|
|
struct iio_ring_buffer *ring = indio_dev->ring;
|
|
|
|
int len = 0;
|
|
|
|
size_t datasize = ring->access->get_bytes_per_datum(ring);
|
|
|
|
char *data = kmalloc(datasize, GFP_KERNEL);
|
|
|
|
|
|
|
|
if (data == NULL) {
|
|
|
|
dev_err(indio_dev->dev.parent,
|
|
|
|
"memory alloc failed in ring bh");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ring->scan_count)
|
|
|
|
len = lis3l02dq_get_ring_element(indio_dev, data);
|
|
|
|
|
|
|
|
/* Guaranteed to be aligned with 8 byte boundary */
|
|
|
|
if (ring->scan_timestamp)
|
|
|
|
*(s64 *)(((phys_addr_t)data + len
|
|
|
|
+ sizeof(s64) - 1) & ~(sizeof(s64) - 1))
|
|
|
|
= pf->timestamp;
|
|
|
|
ring->access->store_to(ring, (u8 *)data, pf->timestamp);
|
|
|
|
|
|
|
|
iio_trigger_notify_done(indio_dev->trig);
|
|
|
|
kfree(data);
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
2009-08-18 17:06:28 +00:00
|
|
|
/* Caller responsible for locking as necessary. */
|
2010-05-04 21:34:36 +00:00
|
|
|
static int
|
2011-05-18 13:41:00 +00:00
|
|
|
__lis3l02dq_write_data_ready_config(struct device *dev, bool state)
|
2009-08-18 17:06:28 +00:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
u8 valold;
|
|
|
|
bool currentlyset;
|
|
|
|
struct iio_dev *indio_dev = dev_get_drvdata(dev);
|
2011-05-18 13:42:26 +00:00
|
|
|
struct lis3l02dq_state *st = iio_priv(indio_dev);
|
2009-08-18 17:06:28 +00:00
|
|
|
|
|
|
|
/* Get the current event mask register */
|
2011-05-18 13:40:58 +00:00
|
|
|
ret = lis3l02dq_spi_read_reg_8(indio_dev,
|
2009-08-18 17:06:28 +00:00
|
|
|
LIS3L02DQ_REG_CTRL_2_ADDR,
|
|
|
|
&valold);
|
|
|
|
if (ret)
|
|
|
|
goto error_ret;
|
|
|
|
/* Find out if data ready is already on */
|
|
|
|
currentlyset
|
|
|
|
= valold & LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
|
|
|
|
|
|
|
|
/* Disable requested */
|
|
|
|
if (!state && currentlyset) {
|
2011-05-18 13:41:00 +00:00
|
|
|
/* disable the data ready signal */
|
2009-08-18 17:06:28 +00:00
|
|
|
valold &= ~LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
|
2011-05-18 13:41:00 +00:00
|
|
|
|
2009-08-18 17:06:28 +00:00
|
|
|
/* The double write is to overcome a hardware bug?*/
|
2011-05-18 13:40:58 +00:00
|
|
|
ret = lis3l02dq_spi_write_reg_8(indio_dev,
|
2009-08-18 17:06:28 +00:00
|
|
|
LIS3L02DQ_REG_CTRL_2_ADDR,
|
2011-05-18 13:42:35 +00:00
|
|
|
valold);
|
2009-08-18 17:06:28 +00:00
|
|
|
if (ret)
|
|
|
|
goto error_ret;
|
2011-05-18 13:40:58 +00:00
|
|
|
ret = lis3l02dq_spi_write_reg_8(indio_dev,
|
2009-08-18 17:06:28 +00:00
|
|
|
LIS3L02DQ_REG_CTRL_2_ADDR,
|
2011-05-18 13:42:35 +00:00
|
|
|
valold);
|
2009-08-18 17:06:28 +00:00
|
|
|
if (ret)
|
|
|
|
goto error_ret;
|
2011-05-18 13:42:20 +00:00
|
|
|
st->trigger_on = false;
|
2009-08-18 17:06:28 +00:00
|
|
|
/* Enable requested */
|
|
|
|
} else if (state && !currentlyset) {
|
|
|
|
/* if not set, enable requested */
|
2011-05-18 13:41:00 +00:00
|
|
|
/* first disable all events */
|
|
|
|
ret = lis3l02dq_disable_all_events(indio_dev);
|
|
|
|
if (ret < 0)
|
|
|
|
goto error_ret;
|
|
|
|
|
|
|
|
valold = ret |
|
|
|
|
LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
|
|
|
|
|
2011-05-18 13:42:20 +00:00
|
|
|
st->trigger_on = true;
|
2011-05-18 13:40:58 +00:00
|
|
|
ret = lis3l02dq_spi_write_reg_8(indio_dev,
|
2009-08-18 17:06:28 +00:00
|
|
|
LIS3L02DQ_REG_CTRL_2_ADDR,
|
2011-05-18 13:42:35 +00:00
|
|
|
valold);
|
2011-05-18 13:42:20 +00:00
|
|
|
if (ret)
|
2009-08-18 17:06:28 +00:00
|
|
|
goto error_ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
error_ret:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* lis3l02dq_data_rdy_trigger_set_state() set datardy interrupt state
|
|
|
|
*
|
|
|
|
* If disabling the interrupt also does a final read to ensure it is clear.
|
|
|
|
* This is only important in some cases where the scan enable elements are
|
|
|
|
* switched before the ring is reenabled.
|
|
|
|
**/
|
|
|
|
static int lis3l02dq_data_rdy_trigger_set_state(struct iio_trigger *trig,
|
|
|
|
bool state)
|
|
|
|
{
|
2011-05-18 13:42:26 +00:00
|
|
|
struct iio_dev *indio_dev = trig->private_data;
|
2009-08-18 17:06:28 +00:00
|
|
|
int ret = 0;
|
|
|
|
u8 t;
|
2011-05-18 13:41:00 +00:00
|
|
|
|
2011-05-18 13:42:26 +00:00
|
|
|
__lis3l02dq_write_data_ready_config(&indio_dev->dev, state);
|
2009-08-18 17:06:28 +00:00
|
|
|
if (state == false) {
|
2011-05-18 13:41:22 +00:00
|
|
|
/*
|
|
|
|
* A possible quirk with teh handler is currently worked around
|
|
|
|
* by ensuring outstanding read events are cleared.
|
|
|
|
*/
|
2011-05-18 13:42:26 +00:00
|
|
|
ret = lis3l02dq_read_all(indio_dev, NULL);
|
2009-08-18 17:06:28 +00:00
|
|
|
}
|
2011-05-18 13:42:26 +00:00
|
|
|
lis3l02dq_spi_read_reg_8(indio_dev,
|
2009-08-18 17:06:28 +00:00
|
|
|
LIS3L02DQ_REG_WAKE_UP_SRC_ADDR,
|
|
|
|
&t);
|
|
|
|
return ret;
|
|
|
|
}
|
2010-09-04 16:54:48 +00:00
|
|
|
|
2009-08-18 17:06:28 +00:00
|
|
|
/**
|
|
|
|
* lis3l02dq_trig_try_reen() try renabling irq for data rdy trigger
|
|
|
|
* @trig: the datardy trigger
|
2011-05-18 13:41:22 +00:00
|
|
|
*/
|
2009-08-18 17:06:28 +00:00
|
|
|
static int lis3l02dq_trig_try_reen(struct iio_trigger *trig)
|
|
|
|
{
|
2011-05-18 13:42:26 +00:00
|
|
|
struct iio_dev *indio_dev = trig->private_data;
|
|
|
|
struct lis3l02dq_state *st = iio_priv(indio_dev);
|
2011-05-18 13:41:22 +00:00
|
|
|
int i;
|
|
|
|
|
2009-08-18 17:06:28 +00:00
|
|
|
/* If gpio still high (or high again) */
|
2011-05-18 13:41:22 +00:00
|
|
|
/* In theory possible we will need to do this several times */
|
|
|
|
for (i = 0; i < 5; i++)
|
|
|
|
if (gpio_get_value(irq_to_gpio(st->us->irq)))
|
2011-05-18 13:42:26 +00:00
|
|
|
lis3l02dq_read_all(indio_dev, NULL);
|
2011-05-18 13:41:22 +00:00
|
|
|
else
|
|
|
|
break;
|
|
|
|
if (i == 5)
|
|
|
|
printk(KERN_INFO
|
|
|
|
"Failed to clear the interrupt for lis3l02dq\n");
|
|
|
|
|
2009-08-18 17:06:28 +00:00
|
|
|
/* irq reenabled so success! */
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-08-12 16:08:38 +00:00
|
|
|
static const struct iio_trigger_ops lis3l02dq_trigger_ops = {
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.set_trigger_state = &lis3l02dq_data_rdy_trigger_set_state,
|
|
|
|
.try_reenable = &lis3l02dq_trig_try_reen,
|
|
|
|
};
|
|
|
|
|
2009-08-18 17:06:28 +00:00
|
|
|
int lis3l02dq_probe_trigger(struct iio_dev *indio_dev)
|
|
|
|
{
|
|
|
|
int ret;
|
2011-05-18 13:42:26 +00:00
|
|
|
struct lis3l02dq_state *st = iio_priv(indio_dev);
|
2009-08-18 17:06:28 +00:00
|
|
|
|
2011-05-18 13:42:22 +00:00
|
|
|
st->trig = iio_allocate_trigger("lis3l02dq-dev%d", indio_dev->id);
|
2011-05-18 13:41:22 +00:00
|
|
|
if (!st->trig) {
|
|
|
|
ret = -ENOMEM;
|
2011-05-18 13:42:22 +00:00
|
|
|
goto error_ret;
|
2009-08-18 17:06:28 +00:00
|
|
|
}
|
2010-07-11 15:39:08 +00:00
|
|
|
|
2011-05-18 13:40:58 +00:00
|
|
|
st->trig->dev.parent = &st->us->dev;
|
2011-08-12 16:08:38 +00:00
|
|
|
st->trig->ops = &lis3l02dq_trigger_ops;
|
2011-05-18 13:42:26 +00:00
|
|
|
st->trig->private_data = indio_dev;
|
2011-05-18 13:40:58 +00:00
|
|
|
ret = iio_trigger_register(st->trig);
|
2009-08-18 17:06:28 +00:00
|
|
|
if (ret)
|
2011-05-18 13:41:22 +00:00
|
|
|
goto error_free_trig;
|
2009-08-18 17:06:28 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
error_free_trig:
|
2011-05-18 13:40:58 +00:00
|
|
|
iio_free_trigger(st->trig);
|
2011-05-18 13:41:22 +00:00
|
|
|
error_ret:
|
2009-08-18 17:06:28 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
void lis3l02dq_remove_trigger(struct iio_dev *indio_dev)
|
|
|
|
{
|
2011-05-18 13:42:26 +00:00
|
|
|
struct lis3l02dq_state *st = iio_priv(indio_dev);
|
2009-08-18 17:06:28 +00:00
|
|
|
|
2011-05-18 13:40:58 +00:00
|
|
|
iio_trigger_unregister(st->trig);
|
|
|
|
iio_free_trigger(st->trig);
|
2009-08-18 17:06:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void lis3l02dq_unconfigure_ring(struct iio_dev *indio_dev)
|
|
|
|
{
|
2011-05-18 13:42:39 +00:00
|
|
|
iio_dealloc_pollfunc(indio_dev->pollfunc);
|
2011-02-11 13:09:11 +00:00
|
|
|
lis3l02dq_free_buf(indio_dev->ring);
|
2009-08-18 17:06:28 +00:00
|
|
|
}
|
|
|
|
|
2011-05-18 13:40:52 +00:00
|
|
|
static int lis3l02dq_ring_postenable(struct iio_dev *indio_dev)
|
|
|
|
{
|
|
|
|
/* Disable unwanted channels otherwise the interrupt will not clear */
|
|
|
|
u8 t;
|
|
|
|
int ret;
|
|
|
|
bool oneenabled = false;
|
|
|
|
|
2011-05-18 13:40:58 +00:00
|
|
|
ret = lis3l02dq_spi_read_reg_8(indio_dev,
|
2011-05-18 13:40:52 +00:00
|
|
|
LIS3L02DQ_REG_CTRL_1_ADDR,
|
|
|
|
&t);
|
|
|
|
if (ret)
|
|
|
|
goto error_ret;
|
|
|
|
|
|
|
|
if (iio_scan_mask_query(indio_dev->ring, 0)) {
|
|
|
|
t |= LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE;
|
|
|
|
oneenabled = true;
|
|
|
|
} else
|
|
|
|
t &= ~LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE;
|
|
|
|
if (iio_scan_mask_query(indio_dev->ring, 1)) {
|
|
|
|
t |= LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE;
|
|
|
|
oneenabled = true;
|
|
|
|
} else
|
|
|
|
t &= ~LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE;
|
|
|
|
if (iio_scan_mask_query(indio_dev->ring, 2)) {
|
|
|
|
t |= LIS3L02DQ_REG_CTRL_1_AXES_Z_ENABLE;
|
|
|
|
oneenabled = true;
|
|
|
|
} else
|
|
|
|
t &= ~LIS3L02DQ_REG_CTRL_1_AXES_Z_ENABLE;
|
|
|
|
|
|
|
|
if (!oneenabled) /* what happens in this case is unknown */
|
|
|
|
return -EINVAL;
|
2011-05-18 13:40:58 +00:00
|
|
|
ret = lis3l02dq_spi_write_reg_8(indio_dev,
|
2011-05-18 13:40:52 +00:00
|
|
|
LIS3L02DQ_REG_CTRL_1_ADDR,
|
2011-05-18 13:42:35 +00:00
|
|
|
t);
|
2011-05-18 13:40:52 +00:00
|
|
|
if (ret)
|
|
|
|
goto error_ret;
|
|
|
|
|
|
|
|
return iio_triggered_ring_postenable(indio_dev);
|
|
|
|
error_ret:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Turn all channels on again */
|
|
|
|
static int lis3l02dq_ring_predisable(struct iio_dev *indio_dev)
|
|
|
|
{
|
|
|
|
u8 t;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = iio_triggered_ring_predisable(indio_dev);
|
|
|
|
if (ret)
|
|
|
|
goto error_ret;
|
|
|
|
|
2011-05-18 13:40:58 +00:00
|
|
|
ret = lis3l02dq_spi_read_reg_8(indio_dev,
|
2011-05-18 13:40:52 +00:00
|
|
|
LIS3L02DQ_REG_CTRL_1_ADDR,
|
|
|
|
&t);
|
|
|
|
if (ret)
|
|
|
|
goto error_ret;
|
|
|
|
t |= LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE |
|
|
|
|
LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE |
|
|
|
|
LIS3L02DQ_REG_CTRL_1_AXES_Z_ENABLE;
|
|
|
|
|
2011-05-18 13:40:58 +00:00
|
|
|
ret = lis3l02dq_spi_write_reg_8(indio_dev,
|
2011-05-18 13:40:52 +00:00
|
|
|
LIS3L02DQ_REG_CTRL_1_ADDR,
|
2011-05-18 13:42:35 +00:00
|
|
|
t);
|
2011-05-18 13:40:52 +00:00
|
|
|
|
|
|
|
error_ret:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2011-05-18 13:42:24 +00:00
|
|
|
static const struct iio_ring_setup_ops lis3l02dq_ring_setup_ops = {
|
|
|
|
.preenable = &iio_sw_ring_preenable,
|
|
|
|
.postenable = &lis3l02dq_ring_postenable,
|
|
|
|
.predisable = &lis3l02dq_ring_predisable,
|
|
|
|
};
|
2011-05-18 13:40:52 +00:00
|
|
|
|
2009-08-18 17:06:28 +00:00
|
|
|
int lis3l02dq_configure_ring(struct iio_dev *indio_dev)
|
|
|
|
{
|
2010-07-11 15:39:19 +00:00
|
|
|
int ret;
|
2010-08-31 09:32:51 +00:00
|
|
|
struct iio_ring_buffer *ring;
|
2011-05-18 13:41:22 +00:00
|
|
|
|
2011-02-11 13:09:11 +00:00
|
|
|
ring = lis3l02dq_alloc_buf(indio_dev);
|
2010-08-31 09:32:51 +00:00
|
|
|
if (!ring)
|
2010-07-11 15:39:19 +00:00
|
|
|
return -ENOMEM;
|
|
|
|
|
2010-08-31 09:32:51 +00:00
|
|
|
indio_dev->ring = ring;
|
2009-08-18 17:06:28 +00:00
|
|
|
/* Effectively select the ring buffer implementation */
|
2011-05-18 13:42:24 +00:00
|
|
|
indio_dev->ring->access = &lis3l02dq_access_funcs;
|
2010-08-31 09:32:51 +00:00
|
|
|
ring->bpe = 2;
|
2011-05-18 13:40:52 +00:00
|
|
|
|
2010-08-31 09:32:52 +00:00
|
|
|
ring->scan_timestamp = true;
|
2011-05-18 13:42:24 +00:00
|
|
|
ring->setup_ops = &lis3l02dq_ring_setup_ops;
|
2010-08-31 09:32:51 +00:00
|
|
|
ring->owner = THIS_MODULE;
|
2009-08-18 17:06:28 +00:00
|
|
|
|
2011-05-18 13:41:22 +00:00
|
|
|
/* Functions are NULL as we set handler below */
|
2011-05-18 13:42:39 +00:00
|
|
|
indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
|
|
|
|
&lis3l02dq_trigger_handler,
|
|
|
|
0,
|
|
|
|
indio_dev,
|
|
|
|
"lis3l02dq_consumer%d",
|
|
|
|
indio_dev->id);
|
2011-05-18 13:41:22 +00:00
|
|
|
|
|
|
|
if (indio_dev->pollfunc == NULL) {
|
|
|
|
ret = -ENOMEM;
|
2010-11-15 03:04:48 +00:00
|
|
|
goto error_iio_sw_rb_free;
|
2011-05-18 13:41:22 +00:00
|
|
|
}
|
|
|
|
|
2009-08-18 17:06:28 +00:00
|
|
|
indio_dev->modes |= INDIO_RING_TRIGGERED;
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
error_iio_sw_rb_free:
|
2011-02-11 13:09:11 +00:00
|
|
|
lis3l02dq_free_buf(indio_dev->ring);
|
2009-08-18 17:06:28 +00:00
|
|
|
return ret;
|
|
|
|
}
|