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linux/arch/arm/include/asm/outercache.h

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ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4) To avoid #include collisions with subsequent patches in the series, this patch moves the outer_cache definitions to a separate asm/outercache.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-24 15:46:52 +00:00
/*
* arch/arm/include/asm/outercache.h
*
* Copyright (C) 2010 ARM Ltd.
* Written by Catalin Marinas <catalin.marinas@arm.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_OUTERCACHE_H
#define __ASM_OUTERCACHE_H
ARM: 6671/1: LPAE: use phys_addr_t instead of unsigned long in outercache functions The unsigned long datatype is not sufficient for mapping physical addresses >= 4GB. This patch ensures that the phys_addr_t datatype is used to represent physical addresses when passed to the outer cache functions. Note that the definitions in struct outer_cache_fns remain as unsigned long because there are currently no outer cache implementations supporting physical addresses wider than 32-bits. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-15 11:41:49 +00:00
#include <linux/types.h>
ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4) To avoid #include collisions with subsequent patches in the series, this patch moves the outer_cache definitions to a separate asm/outercache.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-24 15:46:52 +00:00
struct outer_cache_fns {
void (*inv_range)(unsigned long, unsigned long);
void (*clean_range)(unsigned long, unsigned long);
void (*flush_range)(unsigned long, unsigned long);
arm: Disable outer (L2) cache in kexec kexec does not disable the outer cache before disabling the inner caches in cpu_proc_fin(). So L2 is enabled across the kexec jump. When the new kernel enables chaches again, it randomly crashes. Disabling L2 before calling cpu_proc_fin() cures the problem. Disabling L2 requires the following new functions: flush_all(), inv_all() and disable(). Add them to outer_cache_fns and call them from the kexec code. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com>
2010-07-31 15:36:06 +00:00
void (*flush_all)(void);
void (*inv_all)(void);
void (*disable)(void);
ARM: 5994/1: ARM: Add outer_cache_fns.sync function pointer (2/4) This patch introduces the outer_cache_fns.sync function pointer together with the OUTER_CACHE_SYNC config option that can be used to drain the write buffer of the outer cache. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-24 15:47:53 +00:00
#ifdef CONFIG_OUTER_CACHE_SYNC
void (*sync)(void);
#endif
ARM: 6795/1: l2x0: Errata fix for flush by Way operation can cause data corrupti PL310 implements the Clean & Invalidate by Way L2 cache maintenance operation (offset 0x7FC). This operation runs in background so that PL310 can handle normal accesses while it is in progress. Under very rare circumstances, due to this erratum, write data can be lost when PL310 treats a cacheable write transaction during a Clean & Invalidate by Way operation. Workaround: Disable Write-Back and Cache Linefill (Debug Control Register) Clean & Invalidate by Way (0x7FC) Re-enable Write-Back and Cache Linefill (Debug Control Register) This patch also removes any OMAP dependency on PL310 Errata's Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-08 05:59:54 +00:00
void (*set_debug)(unsigned long);
ARM: 7114/1: cache-l2x0: add resume entry for l2 in secure mode we save the l2x0 registers at the first initialization, and platform codes can get them to restore l2x0 status after wakeup. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-30 13:43:12 +00:00
void (*resume)(void);
ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4) To avoid #include collisions with subsequent patches in the series, this patch moves the outer_cache definitions to a separate asm/outercache.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-24 15:46:52 +00:00
};
#ifdef CONFIG_OUTER_CACHE
extern struct outer_cache_fns outer_cache;
ARM: 6671/1: LPAE: use phys_addr_t instead of unsigned long in outercache functions The unsigned long datatype is not sufficient for mapping physical addresses >= 4GB. This patch ensures that the phys_addr_t datatype is used to represent physical addresses when passed to the outer cache functions. Note that the definitions in struct outer_cache_fns remain as unsigned long because there are currently no outer cache implementations supporting physical addresses wider than 32-bits. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-15 11:41:49 +00:00
static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4) To avoid #include collisions with subsequent patches in the series, this patch moves the outer_cache definitions to a separate asm/outercache.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-24 15:46:52 +00:00
{
if (outer_cache.inv_range)
outer_cache.inv_range(start, end);
}
ARM: 6671/1: LPAE: use phys_addr_t instead of unsigned long in outercache functions The unsigned long datatype is not sufficient for mapping physical addresses >= 4GB. This patch ensures that the phys_addr_t datatype is used to represent physical addresses when passed to the outer cache functions. Note that the definitions in struct outer_cache_fns remain as unsigned long because there are currently no outer cache implementations supporting physical addresses wider than 32-bits. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-15 11:41:49 +00:00
static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4) To avoid #include collisions with subsequent patches in the series, this patch moves the outer_cache definitions to a separate asm/outercache.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-24 15:46:52 +00:00
{
if (outer_cache.clean_range)
outer_cache.clean_range(start, end);
}
ARM: 6671/1: LPAE: use phys_addr_t instead of unsigned long in outercache functions The unsigned long datatype is not sufficient for mapping physical addresses >= 4GB. This patch ensures that the phys_addr_t datatype is used to represent physical addresses when passed to the outer cache functions. Note that the definitions in struct outer_cache_fns remain as unsigned long because there are currently no outer cache implementations supporting physical addresses wider than 32-bits. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-15 11:41:49 +00:00
static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4) To avoid #include collisions with subsequent patches in the series, this patch moves the outer_cache definitions to a separate asm/outercache.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-24 15:46:52 +00:00
{
if (outer_cache.flush_range)
outer_cache.flush_range(start, end);
}
arm: Disable outer (L2) cache in kexec kexec does not disable the outer cache before disabling the inner caches in cpu_proc_fin(). So L2 is enabled across the kexec jump. When the new kernel enables chaches again, it randomly crashes. Disabling L2 before calling cpu_proc_fin() cures the problem. Disabling L2 requires the following new functions: flush_all(), inv_all() and disable(). Add them to outer_cache_fns and call them from the kexec code. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com>
2010-07-31 15:36:06 +00:00
static inline void outer_flush_all(void)
{
if (outer_cache.flush_all)
outer_cache.flush_all();
}
static inline void outer_inv_all(void)
{
if (outer_cache.inv_all)
outer_cache.inv_all();
}
static inline void outer_disable(void)
{
if (outer_cache.disable)
outer_cache.disable();
}
ARM: 7114/1: cache-l2x0: add resume entry for l2 in secure mode we save the l2x0 registers at the first initialization, and platform codes can get them to restore l2x0 status after wakeup. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-30 13:43:12 +00:00
static inline void outer_resume(void)
{
if (outer_cache.resume)
outer_cache.resume();
}
ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4) To avoid #include collisions with subsequent patches in the series, this patch moves the outer_cache definitions to a separate asm/outercache.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-24 15:46:52 +00:00
#else
ARM: 6671/1: LPAE: use phys_addr_t instead of unsigned long in outercache functions The unsigned long datatype is not sufficient for mapping physical addresses >= 4GB. This patch ensures that the phys_addr_t datatype is used to represent physical addresses when passed to the outer cache functions. Note that the definitions in struct outer_cache_fns remain as unsigned long because there are currently no outer cache implementations supporting physical addresses wider than 32-bits. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-15 11:41:49 +00:00
static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4) To avoid #include collisions with subsequent patches in the series, this patch moves the outer_cache definitions to a separate asm/outercache.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-24 15:46:52 +00:00
{ }
ARM: 6671/1: LPAE: use phys_addr_t instead of unsigned long in outercache functions The unsigned long datatype is not sufficient for mapping physical addresses >= 4GB. This patch ensures that the phys_addr_t datatype is used to represent physical addresses when passed to the outer cache functions. Note that the definitions in struct outer_cache_fns remain as unsigned long because there are currently no outer cache implementations supporting physical addresses wider than 32-bits. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-15 11:41:49 +00:00
static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4) To avoid #include collisions with subsequent patches in the series, this patch moves the outer_cache definitions to a separate asm/outercache.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-24 15:46:52 +00:00
{ }
ARM: 6671/1: LPAE: use phys_addr_t instead of unsigned long in outercache functions The unsigned long datatype is not sufficient for mapping physical addresses >= 4GB. This patch ensures that the phys_addr_t datatype is used to represent physical addresses when passed to the outer cache functions. Note that the definitions in struct outer_cache_fns remain as unsigned long because there are currently no outer cache implementations supporting physical addresses wider than 32-bits. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-15 11:41:49 +00:00
static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4) To avoid #include collisions with subsequent patches in the series, this patch moves the outer_cache definitions to a separate asm/outercache.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-24 15:46:52 +00:00
{ }
arm: Disable outer (L2) cache in kexec kexec does not disable the outer cache before disabling the inner caches in cpu_proc_fin(). So L2 is enabled across the kexec jump. When the new kernel enables chaches again, it randomly crashes. Disabling L2 before calling cpu_proc_fin() cures the problem. Disabling L2 requires the following new functions: flush_all(), inv_all() and disable(). Add them to outer_cache_fns and call them from the kexec code. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com>
2010-07-31 15:36:06 +00:00
static inline void outer_flush_all(void) { }
static inline void outer_inv_all(void) { }
static inline void outer_disable(void) { }
ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4) To avoid #include collisions with subsequent patches in the series, this patch moves the outer_cache definitions to a separate asm/outercache.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-24 15:46:52 +00:00
#endif
ARM: 5994/1: ARM: Add outer_cache_fns.sync function pointer (2/4) This patch introduces the outer_cache_fns.sync function pointer together with the OUTER_CACHE_SYNC config option that can be used to drain the write buffer of the outer cache. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-24 15:47:53 +00:00
#ifdef CONFIG_OUTER_CACHE_SYNC
static inline void outer_sync(void)
{
if (outer_cache.sync)
outer_cache.sync();
}
#else
static inline void outer_sync(void)
{ }
#endif
ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4) To avoid #include collisions with subsequent patches in the series, this patch moves the outer_cache definitions to a separate asm/outercache.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-24 15:46:52 +00:00
#endif /* __ASM_OUTERCACHE_H */
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