2011-03-16 07:33:27 +00:00
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#include "Tier0/exceptions.h"
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#include "Tier0/interrupts.h"
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#include "Tier0/kstdlib.h"
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#include "Tier0/kstdio.h"
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#include "Tier0/panic.h"
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#define PAGEFAULT_TEXT "Page Fault (_____)."
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2012-05-08 12:57:44 +00:00
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#define RERR_TO_R(RERR, R) R.rax = RERR.rax; \
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R.rbx = RERR.rbx; \
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R.rcx = RERR.rcx; \
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R.rdx = RERR.rdx; \
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R.rdi = RERR.rdi; \
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R.rsi = RERR.rip; \
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R.rsp = RERR.rsp; \
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R.rbp = RERR.rbp; \
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R.cs = RERR.cs; \
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2012-07-20 21:26:38 +00:00
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R.rip = RERR.rip; \
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R.rflags = RERR.rflags; \
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R.ss = RERR.ss; \
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R.r8 = RERR.r8; \
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R.r9 = RERR.r9; \
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R.r10 = RERR.r10; \
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R.r11 = RERR.r11; \
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R.r12 = RERR.r12; \
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R.r13 = RERR.r13; \
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R.r14 = RERR.r14; \
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R.r15 = RERR.r15;
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2011-03-16 07:33:27 +00:00
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void exceptions_init_simple(void)
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{
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interrupts_setup_isr(0x00, (void*)exceptions_division_by_zero_isr,
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E_INTERRUPTS_RING0);
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2012-07-20 21:26:38 +00:00
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interrupts_setup_isr(0x0D, (void*)exceptions_general_protection_isr,
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E_INTERRUPTS_RING0);
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2011-03-16 07:33:27 +00:00
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interrupts_setup_isr(0x0E, (void*)exceptions_page_fault_isr,
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E_INTERRUPTS_RING0);
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2012-07-20 21:26:38 +00:00
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interrupts_setup_isr(0x10, (void*)exceptions_floating_point_isr,
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E_INTERRUPTS_RING0);
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}
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void exceptions_floating_point_isr(T_ISR_REGISTERS Registers)
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{
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PANIC("Floating point exception. wat.");
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}
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void exceptions_general_protection_isr(T_ISR_REGISTERS_ERR Registers)
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{
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T_ISR_REGISTERS NoErr;
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RERR_TO_R(Registers, NoErr);
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PANIC_EX("General protection fault in kernel task.", NoErr);
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2011-03-16 07:33:27 +00:00
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}
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void exceptions_division_by_zero_isr(T_ISR_REGISTERS Registers)
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{
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PANIC_EX("Divison by Zero.", Registers);
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}
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void exceptions_page_fault_isr(T_ISR_REGISTERS_ERR Registers)
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{
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2011-06-28 11:15:42 +00:00
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u64 FaultAddress;
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2011-03-16 07:33:27 +00:00
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__asm__ volatile("mov %%cr2, %0" : "=r" (FaultAddress));
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u8 Present = !(Registers.Error & 0x01);
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u8 Write = Registers.Error & 0x02;
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u8 User = Registers.Error & 0x04;
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u8 Reserved = Registers.Error & 0x08;
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u8 Execute = Registers.Error &0x10;
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s8 *Error = PAGEFAULT_TEXT;
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u8 o = 12;
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if (Present)
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Error[o] = 'p';
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if (Write)
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Error[o + 1] = 'w';
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if (User)
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Error[o + 2] = 'u';
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if (Reserved)
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Error[o + 3] = 'r';
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if (Execute)
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Error[o + 4] = 'x';
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T_ISR_REGISTERS R;
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2011-04-03 16:49:04 +00:00
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RERR_TO_R(Registers, R);
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2012-05-08 12:57:44 +00:00
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PANIC_EX_HEX(Error, R, FaultAddress);
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2011-03-16 07:33:27 +00:00
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}
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