bump, initial dual channel version working via aux cpu reset

master
informatic 2018-10-14 12:03:20 +02:00
parent 53b537bb50
commit 8200d230de
1 changed files with 67 additions and 5 deletions

View File

@ -38,7 +38,7 @@ class EP9442Matrix {
uint8_t tx1_oe :1;
enum reg49_sel tx0_sel :1;
enum reg49_sel tx1_sel :1;
} reg49 = {1, 1, true, true, reg49_sel::SECONDARY, reg49_sel::PRIMARY};
} reg49 = {0, 1, true, true, reg49_sel::PRIMARY, reg49_sel::SECONDARY};
struct {
uint8_t rx0_on :1;
@ -112,22 +112,28 @@ public:
Wire.begin(4, 5);
Wire.setClock(300000);
Wire.setClockStretchLimit(5*230);
if (0) {
debugf("basic registers");
// Disable RX on all inputs
//delay(1000);
i2cWrite(0x64, 0x4a, 0x00);
i2cWrite(0x64, 0x2d, 0x82);
i2cWrite(0x64, 0x40, 0x00);
i2cWrite(0x64, 0x41, 0x00);
i2cWrite(0x64, 0x42, 0x3f);
i2cWrite(0x64, 0x43, 0x01);
i2cWrite(0x64, 0x44, 0x43);
i2cWrite(0x64, 0x44, 0x40);
i2cWrite(0x64, 0x45, 0x14);
i2cWrite(0x64, 0x46, 0xe4);
i2cWrite(0x64, 0x47, 0x80);
i2cWrite(0x64, 0x48, 0x04);
i2cWrite(0x64, 0x4b, 0b111111);
i2cWrite(0x64, 0x51, 0x00);
i2cWrite(0x64, 0x52, 0x00);
i2cWrite(0x64, 0x4a, 0x00);
i2cWrite(0x64, 0x4a, *(uint8_t*)&reg4a); // 0xff
i2cWrite(0x64, 0x4a, 0x00);
@ -150,10 +156,65 @@ public:
debugf("updating routing...");
updateRouting();
debugf("done");
}
pollTimer.initializeMs(500, TimerDelegate(&EP9442Matrix::pollStatus, this)).start();
pinMode(0, OUTPUT);
digitalWrite(0, LOW);
delay(50);
digitalWrite(0, HIGH);
// ...let it boot
pollTimer.initializeMs(10000, TimerDelegate(&EP9442Matrix::finalizeInit, this)).start();
}
void finalizeInit() {
Serial.println("Init end");
digitalWrite(0, LOW);
pollTimer.initializeMs(3000, TimerDelegate(&EP9442Matrix::pollStatus, this)).start();
}
void testOut2() {
reg4a.tx0_on = 0;
reg4a.tx1_on = 0;
reg49.tx0_oe = 0;
reg49.tx1_oe = 0;
i2cWrite(0x64, 0x4a, *(uint8_t*)&reg4a); // 0xff
updateRouting();
enableOutput(0);
delay(3);
enableOutput(1);
}
void enableOutput(uint8_t target) {
uint8_t err;
if (target == 0) {
reg4a.tx0_on = 1;
} else {
reg4a.tx1_on = 1;
}
i2cWrite(0x64, 0x4a, *(uint8_t*)&reg4a); // 0xff
delay(3);
if ((err = twi_writeTo(0x64, rxphy, sizeof(rxphy), true)) != 0) {
debugf("rx phy settings failed: %d", err);
}
if ((err = twi_writeTo(0x64, txphy, sizeof(txphy), true)) != 0) {
debugf("tx phy settings failed: %d", err);
}
if (target == 0) {
reg49.tx0_oe = 1;
} else {
reg49.tx1_oe = 1;
}
updateRouting();
}
void updateRouting() {
uint8_t new_reg = *(uint8_t*)&reg49;
i2cWrite(0x64, 0x49, new_reg);
@ -244,7 +305,8 @@ public:
// FIXME
matrix.init();
matrix.init();
//matrix.init();
//matrix.testOut2();
//matrix.init();
}