remove broken targets

Signed-off-by: Felix Fietkau <nbd@openwrt.org>

git-svn-id: svn://svn.openwrt.org/openwrt/branches/chaos_calmer@45977 3c298f89-4303-0410-b956-a3cf2f4a3e73
zsun
nbd 2015-06-14 18:17:54 +00:00
parent 7ca37cfb2f
commit cadee081f4
87 changed files with 0 additions and 20317 deletions

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@ -1,26 +0,0 @@
#
# Copyright (C) 2010-2011 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
ARCH:=arm
BOARD:=omap24xx
BOARDNAME:=TI OMAP24xx
MAINTAINER:=Michael Buesch <m@bues.ch>
FEATURES:=targz squashfs jffs2_nand usb usbgadget display gpio audio broken
CPU_TYPE:=arm1136j-s
KERNEL_PATCHVER:=4.0
define Target/Description
TI OMAP-24xx
endef
KERNELNAME:=zImage
include $(INCLUDE_DIR)/target.mk
$(eval $(call BuildTarget))

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@ -1,13 +0,0 @@
config mount
option target /maemo/initfs
option device /dev/mtdblock3
option fstype jffs2
option options rw,noatime
option enabled 0
config mount
option target /maemo/rootfs
option device /dev/mtdblock4
option fstype jffs2
option options rw,noatime
option enabled 0

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@ -1,15 +0,0 @@
config interface loopback
option ifname lo
option proto static
option netmask 255.0.0.0
config interface lan
option proto dhcp
option netmask 255.255.255.0
config interface usb
option ifname usb0
option proto static
option ipaddr 192.168.168.168
option netmask 255.255.255.0
option ip6addr fe80::810:1

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@ -1,20 +0,0 @@
config wifi-device radio0
option type mac80211
option phy phy0
option channel auto
# TODO: CHANGE THE MAC-ADDRESS:
option macaddr 00:11:22:33:44:55
option hwmode 11g
# option country DE
# REMOVE THIS LINE TO ENABLE WIFI:
option disabled 1
config wifi-iface
option device radio0
option powersave 1
option network lan
option mode sta
option ssid OpenWrt
# option encryption psk2
# option key "foobar"

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@ -1,15 +0,0 @@
#!/bin/sh
n810_cal_bme_pmm_extract() {
[ -x /usr/bin/calvaria ] && {
/usr/bin/calvaria -p -n bme -i last /dev/mtdblock1 >/lib/firmware/n810-cal-bme-pmm.fw ||\
echo "CAL-BME extract: Failed to extract blob"
}
}
[ "$FIRMWARE" = "n810-cal-bme-pmm.fw" ] && {
[ -z "$(grep -e 'Nokia N810' /proc/cpuinfo)" ] || {
[ -e /lib/firmware/n810-cal-bme-pmm.fw ] ||\
n810_cal_bme_pmm_extract
}
}

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@ -1,30 +0,0 @@
#!/bin/sh
p54spi_eeprom_clean() {
rm -f /tmp/wlan-iq-align /tmp/wlan-tx-gen2
}
p54spi_eeprom_die() {
echo "$*"
p54spi_eeprom_clean
exit 1
}
p54spi_eeprom_extract() {
[ -x /usr/bin/calvaria -a -x /usr/bin/cal2p54 ] && {
/usr/bin/calvaria -p -n wlan-iq-align -i last /dev/mtdblock1 >/tmp/wlan-iq-align ||\
p54spi_eeprom_die "p54spi EEPROM: Failed to extract wlan-iq-align"
/usr/bin/calvaria -p -n wlan-tx-gen2 -i last /dev/mtdblock1 >/tmp/wlan-tx-gen2 ||\
p54spi_eeprom_die "p54spi EEPROM: Failed to extract wlan-tx-gen2"
/usr/bin/cal2p54 /tmp/wlan-tx-gen2 /tmp/wlan-iq-align >/lib/firmware/3826.eeprom ||\
p54spi_eeprom_die "p54spi EEPROM: Failed to generate EEPROM"
p54spi_eeprom_clean
}
}
[ "$FIRMWARE" = "3826.eeprom" ] && {
[ -z "$(grep -e 'Nokia N810' /proc/cpuinfo)" ] || {
[ -e /lib/firmware/3826.eeprom ] ||\
p54spi_eeprom_extract
}
}

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@ -1,17 +0,0 @@
#!/bin/sh /etc/rc.common
# Copyright (C) 2008-2010 OpenWrt.org
START=25
start() {
[ -c /dev/watchdog -a -x /sbin/watchdog ] || {
echo "WARNING: Watchdog not available. System will reboot soon!"
return 1
}
/sbin/watchdog -T 63 -t 50 /dev/watchdog
[ -x /usr/bin/schedtool ] && /usr/bin/schedtool -R -p 60 -n -20 $(pidof watchdog)
}
stop() {
killall -q watchdog
}

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@ -1,5 +0,0 @@
::sysinit:/etc/init.d/rcS S boot
::shutdown:/etc/init.d/rcS K shutdown
tts/0::askfirst:/bin/ash --login
ttyO2::askfirst:/bin/ash --login
tty1::askfirst:/bin/ash --login

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@ -1 +0,0 @@
14706 -12 -3754952 36 -9898 35656000 65536

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@ -1,27 +0,0 @@
#
# Copyright (C) 2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/image.mk
NAND_BLOCKSIZE=2048-128k
define Image/BuildKernel
$(CP) $(KDIR)/zImage $(BIN_DIR)/$(IMG_PREFIX)-zImage
chmod 0644 $(BIN_DIR)/$(IMG_PREFIX)-zImage
endef
define Image/Build/squashfs
$(call prepare_generic_squashfs,$(BIN_DIR)/$(IMG_PREFIX)-root.$(1))
endef
define Image/Build
$(CP) $(KDIR)/root.$(1) $(BIN_DIR)/$(IMG_PREFIX)-root.$(1)
$(call Image/Build/$(1),$(1))
endef
$(eval $(call BuildImage))

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@ -1,83 +0,0 @@
#
# Copyright (C) 2012 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define KernelPackage/sound-soc-omap
TITLE:=OMAP SoC sound support
KCONFIG:= \
CONFIG_SND_OMAP_SOC
FILES:=$(LINUX_DIR)/sound/soc/omap/snd-soc-omap.ko
AUTOLOAD:=$(call AutoLoad,60,snd-soc-omap)
DEPENDS:=@TARGET_omap24xx +kmod-sound-soc-core
$(call AddDepends/sound)
endef
$(eval $(call KernelPackage,sound-soc-omap))
define KernelPackage/sound-soc-omap-mcbsp
TITLE:=OMAP SoC MCBSP support
KCONFIG:= \
CONFIG_SND_OMAP_SOC_MCBSP
FILES:=$(LINUX_DIR)/sound/soc/omap/snd-soc-omap-mcbsp.ko
AUTOLOAD:=$(call AutoLoad,61,snd-soc-omap-mcbsp)
DEPENDS:=@TARGET_omap24xx +kmod-sound-soc-omap
$(call AddDepends/sound)
endef
$(eval $(call KernelPackage,sound-soc-omap-mcbsp))
define KernelPackage/sound-soc-n810
TITLE:=Nokia n810 SoC sound support
KCONFIG:= \
CONFIG_SND_OMAP_SOC_N810
FILES:= \
$(LINUX_DIR)/sound/soc/codecs/snd-soc-tlv320aic3x.ko \
$(LINUX_DIR)/sound/soc/omap/snd-soc-n810.ko
AUTOLOAD:=$(call AutoLoad,65,snd-soc-tlv320aic3x snd-soc-n810)
DEPENDS:=@TARGET_omap24xx +kmod-sound-soc-omap +kmod-sound-soc-omap-mcbsp
$(call AddDepends/sound)
endef
$(eval $(call KernelPackage,sound-soc-n810))
define KernelPackage/n810bm
SUBMENU:=$(OTHER_MENU)
TITLE:=Nokia N810 battery management driver
DEPENDS:=@TARGET_omap24xx
KCONFIG:=CONFIG_N810BM
FILES:=$(LINUX_DIR)/drivers/cbus/n810bm.ko
AUTOLOAD:=$(call AutoLoad,01,n810bm)
endef
define KernelPackage/n810bm/description
Nokia N810 battery management driver.
Controls battery power management and battery charging.
endef
$(eval $(call KernelPackage,n810bm))
define KernelPackage/usb-tahvo
TITLE:=Support for Tahvo (Nokia n810) USB
KCONFIG:= \
CONFIG_TAHVO_USB \
CONFIG_TAHVO_USB_HOST_BY_DEFAULT=n \
CONFIG_USB_OHCI_HCD_OMAP1=y \
CONFIG_USB_GADGET_DEBUG_FS=n
DEPENDS:=@TARGET_omap24xx +kmod-usb-musb-tusb6010
FILES:=$(LINUX_DIR)/drivers/usb/phy/phy-tahvo.ko
AUTOLOAD:=$(call AutoLoad,45,phy-tahvo)
$(call AddDepends/usb)
endef
define KernelPackage/usb-tahvo/description
Kernel support for Nokia n810 USB OHCI controller.
endef
$(eval $(call KernelPackage,usb-tahvo))

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@ -1,897 +0,0 @@
--- /dev/null
+++ b/arch/arm/plat-omap/bootreason.c
@@ -0,0 +1,79 @@
+/*
+ * linux/arch/arm/plat-omap/bootreason.c
+ *
+ * OMAP Bootreason passing
+ *
+ * Copyright (c) 2004 Nokia
+ *
+ * Written by David Weinehall <david.weinehall@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/proc_fs.h>
+#include <linux/errno.h>
+#include <plat/board.h>
+
+static char boot_reason[16];
+
+static int omap_bootreason_read_proc(char *page, char **start, off_t off,
+ int count, int *eof, void *data)
+{
+ int len = 0;
+
+ len += sprintf(page + len, "%s\n", boot_reason);
+
+ *start = page + off;
+
+ if (len > off)
+ len -= off;
+ else
+ len = 0;
+
+ return len < count ? len : count;
+}
+
+static int __init bootreason_init(void)
+{
+ const struct omap_boot_reason_config *cfg;
+ int reason_valid = 0;
+
+ cfg = omap_get_config(OMAP_TAG_BOOT_REASON, struct omap_boot_reason_config);
+ if (cfg != NULL) {
+ strncpy(boot_reason, cfg->reason_str, sizeof(cfg->reason_str));
+ boot_reason[sizeof(cfg->reason_str)] = 0;
+ reason_valid = 1;
+ } else {
+ /* Read the boot reason from the OMAP registers */
+ }
+
+ if (!reason_valid)
+ return -ENOENT;
+
+ printk(KERN_INFO "Bootup reason: %s\n", boot_reason);
+
+ if (!create_proc_read_entry("bootreason", S_IRUGO, NULL,
+ omap_bootreason_read_proc, NULL))
+ return -ENOMEM;
+
+ return 0;
+}
+
+late_initcall(bootreason_init);
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -24,18 +24,90 @@
#include <plat/omap-secure.h>
+#include <asm/setup.h>
+
#define NO_LENGTH_CHECK 0xffffffff
struct omap_board_config_kernel *omap_board_config __initdata;
int omap_board_config_size;
+unsigned char omap_bootloader_tag[1024];
+int omap_bootloader_tag_len;
+
+/* used by omap-smp.c and board-4430sdp.c */
+void __iomem *gic_cpu_base_addr;
+
+#ifdef CONFIG_OMAP_BOOT_TAG
+
+static int __init parse_tag_omap(const struct tag *tag)
+{
+ u32 size = tag->hdr.size - (sizeof(tag->hdr) >> 2);
+
+ size <<= 2;
+ if (size > sizeof(omap_bootloader_tag))
+ return -1;
+
+ memcpy(omap_bootloader_tag, tag->u.omap.data, size);
+ omap_bootloader_tag_len = size;
+
+ return 0;
+}
+
+__tagtable(ATAG_BOARD, parse_tag_omap);
+
+#endif
+
static const void *__init get_config(u16 tag, size_t len,
int skip, size_t *len_out)
{
struct omap_board_config_kernel *kinfo = NULL;
int i;
+#ifdef CONFIG_OMAP_BOOT_TAG
+ struct omap_board_config_entry *info = NULL;
+
+ if (omap_bootloader_tag_len > 4)
+ info = (struct omap_board_config_entry *) omap_bootloader_tag;
+ while (info != NULL) {
+ u8 *next;
+
+ if (info->tag == tag) {
+ if (skip == 0)
+ break;
+ skip--;
+ }
+
+ if ((info->len & 0x03) != 0) {
+ /* We bail out to avoid an alignment fault */
+ printk(KERN_ERR "OMAP peripheral config: Length (%d) not word-aligned (tag %04x)\n",
+ info->len, info->tag);
+ return NULL;
+ }
+ next = (u8 *) info + sizeof(*info) + info->len;
+ if (next >= omap_bootloader_tag + omap_bootloader_tag_len)
+ info = NULL;
+ else
+ info = (struct omap_board_config_entry *) next;
+ }
+ if (info != NULL) {
+ /* Check the length as a lame attempt to check for
+ * binary inconsistency. */
+ if (len != NO_LENGTH_CHECK) {
+ /* Word-align len */
+ if (len & 0x03)
+ len = (len + 3) & ~0x03;
+ if (info->len != len) {
+ printk(KERN_ERR "OMAP peripheral config: Length mismatch with tag %x (want %d, got %d)\n",
+ tag, len, info->len);
+ return NULL;
+ }
+ }
+ if (len_out != NULL)
+ *len_out = info->len;
+ return info->data;
+ }
+#endif
/* Try to find the config from the board-specific structures
* in the kernel. */
for (i = 0; i < omap_board_config_size; i++) {
--- /dev/null
+++ b/arch/arm/plat-omap/component-version.c
@@ -0,0 +1,64 @@
+/*
+ * linux/arch/arm/plat-omap/component-version.c
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Written by Juha Yrjölä <juha.yrjola@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/proc_fs.h>
+#include <plat/board.h>
+
+static int component_version_read_proc(char *page, char **start, off_t off,
+ int count, int *eof, void *data)
+{
+ int len, i;
+ const struct omap_version_config *ver;
+ char *p;
+
+ i = 0;
+ p = page;
+ while ((ver = omap_get_nr_config(OMAP_TAG_VERSION_STR,
+ struct omap_version_config, i)) != NULL) {
+ p += sprintf(p, "%-12s%s\n", ver->component, ver->version);
+ i++;
+ }
+
+ len = (p - page) - off;
+ if (len < 0)
+ len = 0;
+
+ *eof = (len <= count) ? 1 : 0;
+ *start = page + off;
+
+ return len;
+}
+
+static int __init component_version_init(void)
+{
+ if (omap_get_config(OMAP_TAG_VERSION_STR, struct omap_version_config) == NULL)
+ return -ENODEV;
+ if (!create_proc_read_entry("component_version", S_IRUGO, NULL,
+ component_version_read_proc, NULL))
+ return -ENOMEM;
+
+ return 0;
+}
+
+static void __exit component_version_exit(void)
+{
+ remove_proc_entry("component_version", NULL);
+}
+
+late_initcall(component_version_init);
+module_exit(component_version_exit);
+
+MODULE_AUTHOR("Juha Yrjölä <juha.yrjola@nokia.com>");
+MODULE_DESCRIPTION("Component version driver");
+MODULE_LICENSE("GPL");
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -84,6 +84,38 @@ config OMAP_RESET_CLOCKS
probably do not want this option enabled until your
device drivers work properly.
+config OMAP_BOOT_TAG
+ bool "OMAP bootloader information passing"
+ depends on ARCH_OMAP
+ default n
+ help
+ Say Y, if you have a bootloader which passes information
+ about your board and its peripheral configuration.
+
+config OMAP_BOOT_REASON
+ bool "Support for boot reason"
+ depends on OMAP_BOOT_TAG
+ default n
+ help
+ Say Y, if you want to have a procfs entry for reading the boot
+ reason in user-space.
+
+config OMAP_COMPONENT_VERSION
+ bool "Support for component version display"
+ depends on OMAP_BOOT_TAG && PROC_FS
+ default n
+ help
+ Say Y, if you want to have a procfs entry for reading component
+ versions (supplied by the bootloader) in user-space.
+
+config OMAP_GPIO_SWITCH
+ bool "GPIO switch support"
+ help
+ Say Y, if you want to have support for reporting of GPIO
+ switches (e.g. cover switches) via sysfs. Your bootloader has
+ to provide information about the switches to the kernel via the
+ ATAG_BOARD mechanism if they're not defined by the board config.
+
config OMAP_MUX
bool "OMAP multiplexing support"
depends on ARCH_OMAP
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -20,6 +20,9 @@ obj-$(CONFIG_ARCH_OMAP4) += omap_device.
obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
+obj-$(CONFIG_OMAP_BOOT_REASON) += bootreason.o
+obj-$(CONFIG_OMAP_COMPONENT_VERSION) += component-version.o
+obj-$(CONFIG_OMAP_GPIO_SWITCH) += gpio-switch.o
obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -136,6 +136,13 @@ struct tag_acorn {
__u8 adfsdrives;
};
+/* TI OMAP specific information */
+#define ATAG_BOARD 0x414f4d50
+
+struct tag_omap {
+ u8 data[0];
+};
+
/* footbridge memory clock, see arch/arm/mach-footbridge/arch.c */
#define ATAG_MEMCLK 0x41000402
@@ -162,6 +169,11 @@ struct tag {
struct tag_acorn acorn;
/*
+ * OMAP specific
+ */
+ struct tag_omap omap;
+
+ /*
* DC21285 specific
*/
struct tag_memclk memclk;
--- /dev/null
+++ b/arch/arm/plat-omap/gpio-switch.c
@@ -0,0 +1,554 @@
+/*
+ * linux/arch/arm/plat-omap/gpio-switch.c
+ *
+ * Copyright (C) 2004-2006 Nokia Corporation
+ * Written by Juha Yrjölä <juha.yrjola@nokia.com>
+ * and Paul Mundt <paul.mundt@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/timer.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/gpio.h>
+#include <plat/hardware.h>
+#include <plat/irqs.h>
+#include <plat/mux.h>
+#include <plat/board.h>
+#include <plat/gpio-switch.h>
+
+struct gpio_switch {
+ char name[14];
+ u16 gpio;
+ unsigned flags:4;
+ unsigned type:4;
+ unsigned state:1;
+ unsigned both_edges:1;
+
+ u16 debounce_rising;
+ u16 debounce_falling;
+
+ void (* notify)(void *data, int state);
+ void *notify_data;
+
+ struct work_struct work;
+ struct timer_list timer;
+ struct platform_device pdev;
+
+ struct list_head node;
+};
+
+static LIST_HEAD(gpio_switches);
+static struct platform_device *gpio_sw_platform_dev;
+static struct platform_driver gpio_sw_driver;
+
+static const struct omap_gpio_switch *board_gpio_sw_table;
+static int board_gpio_sw_count;
+
+static const char *cover_str[2] = { "open", "closed" };
+static const char *connection_str[2] = { "disconnected", "connected" };
+static const char *activity_str[2] = { "inactive", "active" };
+
+/*
+ * GPIO switch state default debounce delay in ms
+ */
+#define OMAP_GPIO_SW_DEFAULT_DEBOUNCE 10
+
+static const char **get_sw_str(struct gpio_switch *sw)
+{
+ switch (sw->type) {
+ case OMAP_GPIO_SWITCH_TYPE_COVER:
+ return cover_str;
+ case OMAP_GPIO_SWITCH_TYPE_CONNECTION:
+ return connection_str;
+ case OMAP_GPIO_SWITCH_TYPE_ACTIVITY:
+ return activity_str;
+ default:
+ BUG();
+ return NULL;
+ }
+}
+
+static const char *get_sw_type(struct gpio_switch *sw)
+{
+ switch (sw->type) {
+ case OMAP_GPIO_SWITCH_TYPE_COVER:
+ return "cover";
+ case OMAP_GPIO_SWITCH_TYPE_CONNECTION:
+ return "connection";
+ case OMAP_GPIO_SWITCH_TYPE_ACTIVITY:
+ return "activity";
+ default:
+ BUG();
+ return NULL;
+ }
+}
+
+static void print_sw_state(struct gpio_switch *sw, int state)
+{
+ const char **str;
+
+ str = get_sw_str(sw);
+ if (str != NULL)
+ printk(KERN_INFO "%s (GPIO %d) is now %s\n", sw->name, sw->gpio, str[state]);
+}
+
+static int gpio_sw_get_state(struct gpio_switch *sw)
+{
+ int state;
+
+ state = gpio_get_value(sw->gpio);
+ if (sw->flags & OMAP_GPIO_SWITCH_FLAG_INVERTED)
+ state = !state;
+
+ return state;
+}
+
+static ssize_t gpio_sw_state_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t count)
+{
+ struct gpio_switch *sw = dev_get_drvdata(dev);
+ const char **str;
+ char state[16];
+ int enable;
+
+ if (!(sw->flags & OMAP_GPIO_SWITCH_FLAG_OUTPUT))
+ return -EPERM;
+
+ if (sscanf(buf, "%15s", state) != 1)
+ return -EINVAL;
+
+ str = get_sw_str(sw);
+ if (strcmp(state, str[0]) == 0)
+ sw->state = enable = 0;
+ else if (strcmp(state, str[1]) == 0)
+ sw->state = enable = 1;
+ else
+ return -EINVAL;
+
+ if (sw->flags & OMAP_GPIO_SWITCH_FLAG_INVERTED)
+ enable = !enable;
+ gpio_set_value(sw->gpio, enable);
+
+ return count;
+}
+
+static ssize_t gpio_sw_state_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct gpio_switch *sw = dev_get_drvdata(dev);
+ const char **str;
+
+ str = get_sw_str(sw);
+ return sprintf(buf, "%s\n", str[sw->state]);
+}
+
+static DEVICE_ATTR(state, S_IRUGO | S_IWUSR, gpio_sw_state_show,
+ gpio_sw_state_store);
+
+static ssize_t gpio_sw_type_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct gpio_switch *sw = dev_get_drvdata(dev);
+
+ return sprintf(buf, "%s\n", get_sw_type(sw));
+}
+
+static DEVICE_ATTR(type, S_IRUGO, gpio_sw_type_show, NULL);
+
+static ssize_t gpio_sw_direction_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct gpio_switch *sw = dev_get_drvdata(dev);
+ int is_output;
+
+ is_output = sw->flags & OMAP_GPIO_SWITCH_FLAG_OUTPUT;
+ return sprintf(buf, "%s\n", is_output ? "output" : "input");
+}
+
+static DEVICE_ATTR(direction, S_IRUGO, gpio_sw_direction_show, NULL);
+
+
+static irqreturn_t gpio_sw_irq_handler(int irq, void *arg)
+{
+ struct gpio_switch *sw = arg;
+ unsigned long timeout;
+ int state;
+
+ if (!sw->both_edges) {
+ if (gpio_get_value(sw->gpio))
+ irq_set_irq_type(OMAP_GPIO_IRQ(sw->gpio), IRQ_TYPE_EDGE_FALLING);
+ else
+ irq_set_irq_type(OMAP_GPIO_IRQ(sw->gpio), IRQ_TYPE_EDGE_RISING);
+ }
+
+ state = gpio_sw_get_state(sw);
+ if (sw->state == state)
+ return IRQ_HANDLED;
+
+ if (state)
+ timeout = sw->debounce_rising;
+ else
+ timeout = sw->debounce_falling;
+ if (!timeout)
+ schedule_work(&sw->work);
+ else
+ mod_timer(&sw->timer, jiffies + msecs_to_jiffies(timeout));
+
+ return IRQ_HANDLED;
+}
+
+static void gpio_sw_timer(unsigned long arg)
+{
+ struct gpio_switch *sw = (struct gpio_switch *) arg;
+
+ schedule_work(&sw->work);
+}
+
+static void gpio_sw_handler(struct work_struct *work)
+{
+ struct gpio_switch *sw = container_of(work, struct gpio_switch, work);
+ int state;
+
+ state = gpio_sw_get_state(sw);
+ if (sw->state == state)
+ return;
+
+ sw->state = state;
+ if (sw->notify != NULL)
+ sw->notify(sw->notify_data, state);
+ sysfs_notify(&sw->pdev.dev.kobj, NULL, "state");
+ print_sw_state(sw, state);
+}
+
+static int __init can_do_both_edges(struct gpio_switch *sw)
+{
+ if (!cpu_class_is_omap1())
+ return 1;
+ if (OMAP_GPIO_IS_MPUIO(sw->gpio))
+ return 0;
+ else
+ return 1;
+}
+
+static void gpio_sw_release(struct device *dev)
+{
+}
+
+static int __init new_switch(struct gpio_switch *sw)
+{
+ int r, direction, trigger;
+
+ switch (sw->type) {
+ case OMAP_GPIO_SWITCH_TYPE_COVER:
+ case OMAP_GPIO_SWITCH_TYPE_CONNECTION:
+ case OMAP_GPIO_SWITCH_TYPE_ACTIVITY:
+ break;
+ default:
+ printk(KERN_ERR "invalid GPIO switch type: %d\n", sw->type);
+ return -EINVAL;
+ }
+
+ sw->pdev.name = sw->name;
+ sw->pdev.id = -1;
+
+ sw->pdev.dev.parent = &gpio_sw_platform_dev->dev;
+ sw->pdev.dev.driver = &gpio_sw_driver.driver;
+ sw->pdev.dev.release = gpio_sw_release;
+
+ r = platform_device_register(&sw->pdev);
+ if (r) {
+ printk(KERN_ERR "gpio-switch: platform device registration "
+ "failed for %s", sw->name);
+ return r;
+ }
+ dev_set_drvdata(&sw->pdev.dev, sw);
+
+ r = gpio_request(sw->gpio, "gpio-switch");
+ if (r < 0) {
+ platform_device_unregister(&sw->pdev);
+ return r;
+ }
+
+ /* input: 1, output: 0 */
+ direction = !(sw->flags & OMAP_GPIO_SWITCH_FLAG_OUTPUT);
+ if (direction)
+ gpio_direction_input(sw->gpio);
+ else
+ gpio_direction_output(sw->gpio, 0);
+
+ sw->state = gpio_sw_get_state(sw);
+
+ r = 0;
+ r |= device_create_file(&sw->pdev.dev, &dev_attr_state);
+ r |= device_create_file(&sw->pdev.dev, &dev_attr_type);
+ r |= device_create_file(&sw->pdev.dev, &dev_attr_direction);
+ if (r)
+ printk(KERN_ERR "gpio-switch: attribute file creation "
+ "failed for %s\n", sw->name);
+
+ if (!direction)
+ return 0;
+
+ if (can_do_both_edges(sw)) {
+ trigger = IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING;
+ sw->both_edges = 1;
+ } else {
+ if (gpio_get_value(sw->gpio))
+ trigger = IRQF_TRIGGER_FALLING;
+ else
+ trigger = IRQF_TRIGGER_RISING;
+ }
+ r = request_irq(OMAP_GPIO_IRQ(sw->gpio), gpio_sw_irq_handler,
+ IRQF_SHARED | trigger, sw->name, sw);
+ if (r < 0) {
+ printk(KERN_ERR "gpio-switch: request_irq() failed "
+ "for GPIO %d\n", sw->gpio);
+ platform_device_unregister(&sw->pdev);
+ gpio_free(sw->gpio);
+ return r;
+ }
+
+ INIT_WORK(&sw->work, gpio_sw_handler);
+ init_timer(&sw->timer);
+
+ sw->timer.function = gpio_sw_timer;
+ sw->timer.data = (unsigned long)sw;
+
+ list_add(&sw->node, &gpio_switches);
+
+ return 0;
+}
+
+static int __init add_atag_switches(void)
+{
+ const struct omap_gpio_switch_config *cfg;
+ struct gpio_switch *sw;
+ int i, r;
+
+ for (i = 0; ; i++) {
+ cfg = omap_get_nr_config(OMAP_TAG_GPIO_SWITCH,
+ struct omap_gpio_switch_config, i);
+ if (cfg == NULL)
+ break;
+ sw = kzalloc(sizeof(*sw), GFP_KERNEL);
+ if (sw == NULL) {
+ printk(KERN_ERR "gpio-switch: kmalloc failed\n");
+ return -ENOMEM;
+ }
+ strncpy(sw->name, cfg->name, sizeof(cfg->name));
+ sw->gpio = cfg->gpio;
+ sw->flags = cfg->flags;
+ sw->type = cfg->type;
+ sw->debounce_rising = OMAP_GPIO_SW_DEFAULT_DEBOUNCE;
+ sw->debounce_falling = OMAP_GPIO_SW_DEFAULT_DEBOUNCE;
+ if ((r = new_switch(sw)) < 0) {
+ kfree(sw);
+ return r;
+ }
+ }
+ return 0;
+}
+
+static struct gpio_switch * __init find_switch(int gpio, const char *name)
+{
+ struct gpio_switch *sw;
+
+ list_for_each_entry(sw, &gpio_switches, node) {
+ if ((gpio < 0 || sw->gpio != gpio) &&
+ (name == NULL || strcmp(sw->name, name) != 0))
+ continue;
+
+ if (gpio < 0 || name == NULL)
+ goto no_check;
+
+ if (strcmp(sw->name, name) != 0)
+ printk("gpio-switch: name mismatch for %d (%s, %s)\n",
+ gpio, name, sw->name);
+ else if (sw->gpio != gpio)
+ printk("gpio-switch: GPIO mismatch for %s (%d, %d)\n",
+ name, gpio, sw->gpio);
+no_check:
+ return sw;
+ }
+ return NULL;
+}
+
+static int __init add_board_switches(void)
+{
+ int i;
+
+ for (i = 0; i < board_gpio_sw_count; i++) {
+ const struct omap_gpio_switch *cfg;
+ struct gpio_switch *sw;
+ int r;
+
+ cfg = board_gpio_sw_table + i;
+ if (strlen(cfg->name) > sizeof(sw->name) - 1)
+ return -EINVAL;
+ /* Check whether we only update an existing switch
+ * or add a new switch. */
+ sw = find_switch(cfg->gpio, cfg->name);
+ if (sw != NULL) {
+ sw->debounce_rising = cfg->debounce_rising;
+ sw->debounce_falling = cfg->debounce_falling;
+ sw->notify = cfg->notify;
+ sw->notify_data = cfg->notify_data;
+ continue;
+ } else {
+ if (cfg->gpio < 0 || cfg->name == NULL) {
+ printk("gpio-switch: required switch not "
+ "found (%d, %s)\n", cfg->gpio,
+ cfg->name);
+ continue;
+ }
+ }
+ sw = kzalloc(sizeof(*sw), GFP_KERNEL);
+ if (sw == NULL) {
+ printk(KERN_ERR "gpio-switch: kmalloc failed\n");
+ return -ENOMEM;
+ }
+ strlcpy(sw->name, cfg->name, sizeof(sw->name));
+ sw->gpio = cfg->gpio;
+ sw->flags = cfg->flags;
+ sw->type = cfg->type;
+ sw->debounce_rising = cfg->debounce_rising;
+ sw->debounce_falling = cfg->debounce_falling;
+ sw->notify = cfg->notify;
+ sw->notify_data = cfg->notify_data;
+ if ((r = new_switch(sw)) < 0) {
+ kfree(sw);
+ return r;
+ }
+ }
+ return 0;
+}
+
+static void gpio_sw_cleanup(void)
+{
+ struct gpio_switch *sw = NULL, *old = NULL;
+
+ list_for_each_entry(sw, &gpio_switches, node) {
+ if (old != NULL)
+ kfree(old);
+ flush_scheduled_work();
+ del_timer_sync(&sw->timer);
+
+ free_irq(OMAP_GPIO_IRQ(sw->gpio), sw);
+
+ device_remove_file(&sw->pdev.dev, &dev_attr_state);
+ device_remove_file(&sw->pdev.dev, &dev_attr_type);
+ device_remove_file(&sw->pdev.dev, &dev_attr_direction);
+
+ platform_device_unregister(&sw->pdev);
+ gpio_free(sw->gpio);
+ old = sw;
+ }
+ kfree(old);
+}
+
+static void __init report_initial_state(void)
+{
+ struct gpio_switch *sw;
+
+ list_for_each_entry(sw, &gpio_switches, node) {
+ int state;
+
+ state = gpio_get_value(sw->gpio);
+ if (sw->flags & OMAP_GPIO_SWITCH_FLAG_INVERTED)
+ state = !state;
+ if (sw->notify != NULL)
+ sw->notify(sw->notify_data, state);
+ print_sw_state(sw, state);
+ }
+}
+
+static int gpio_sw_remove(struct platform_device *dev)
+{
+ return 0;
+}
+
+static struct platform_driver gpio_sw_driver = {
+ .remove = gpio_sw_remove,
+ .driver = {
+ .name = "gpio-switch",
+ },
+};
+
+void __init omap_register_gpio_switches(const struct omap_gpio_switch *tbl,
+ int count)
+{
+ BUG_ON(board_gpio_sw_table != NULL);
+
+ board_gpio_sw_table = tbl;
+ board_gpio_sw_count = count;
+}
+
+static int __init gpio_sw_init(void)
+{
+ int r;
+
+ printk(KERN_INFO "OMAP GPIO switch handler initializing\n");
+
+ r = platform_driver_register(&gpio_sw_driver);
+ if (r)
+ return r;
+
+ gpio_sw_platform_dev = platform_device_register_simple("gpio-switch",
+ -1, NULL, 0);
+ if (IS_ERR(gpio_sw_platform_dev)) {
+ r = PTR_ERR(gpio_sw_platform_dev);
+ goto err1;
+ }
+
+ r = add_atag_switches();
+ if (r < 0)
+ goto err2;
+
+ r = add_board_switches();
+ if (r < 0)
+ goto err2;
+
+ report_initial_state();
+
+ return 0;
+err2:
+ gpio_sw_cleanup();
+ platform_device_unregister(gpio_sw_platform_dev);
+err1:
+ platform_driver_unregister(&gpio_sw_driver);
+ return r;
+}
+
+static void __exit gpio_sw_exit(void)
+{
+ gpio_sw_cleanup();
+ platform_device_unregister(gpio_sw_platform_dev);
+ platform_driver_unregister(&gpio_sw_driver);
+}
+
+#ifndef MODULE
+late_initcall(gpio_sw_init);
+#else
+module_init(gpio_sw_init);
+#endif
+module_exit(gpio_sw_exit);
+
+MODULE_AUTHOR("Juha Yrjölä <juha.yrjola@nokia.com>, Paul Mundt <paul.mundt@nokia.com");
+MODULE_DESCRIPTION("GPIO switch driver");
+MODULE_LICENSE("GPL");
--- a/arch/arm/plat-omap/include/plat/board.h
+++ b/arch/arm/plat-omap/include/plat/board.h
@@ -151,6 +151,14 @@ struct omap_board_config_kernel {
const void *data;
};
+struct omap_gpio_switch_config {
+ char name[12];
+ u16 gpio;
+ int flags:4;
+ int type:4;
+ int key_code:24; /* Linux key code */
+};
+
extern const void *__init __omap_get_config(u16 tag, size_t len, int nr);
#define omap_get_config(tag, type) \

File diff suppressed because it is too large Load Diff

View File

@ -1,12 +0,0 @@
--- a/drivers/cbus/tahvo.c
+++ b/drivers/cbus/tahvo.c
@@ -104,7 +104,9 @@ void tahvo_write_reg(struct device *chil
{
struct tahvo *tahvo = dev_get_drvdata(child->parent);
+ mutex_lock(&tahvo->mutex);
__tahvo_write_reg(tahvo, reg, val);
+ mutex_unlock(&tahvo->mutex);
}
EXPORT_SYMBOL(tahvo_write_reg);

View File

@ -1,142 +0,0 @@
--- a/drivers/cbus/retu.c
+++ b/drivers/cbus/retu.c
@@ -53,9 +53,6 @@ struct retu {
int irq;
- int ack;
- bool ack_pending;
-
int mask;
bool mask_pending;
@@ -191,9 +188,10 @@ static irqreturn_t retu_irq_handler(int
mutex_lock(&retu->mutex);
idr = __retu_read_reg(retu, RETU_REG_IDR);
imr = __retu_read_reg(retu, RETU_REG_IMR);
+ idr &= ~imr;
+ __retu_write_reg(retu, RETU_REG_IDR, idr);
mutex_unlock(&retu->mutex);
- idr &= ~imr;
if (!idr) {
dev_vdbg(retu->dev, "No IRQ, spurious?\n");
return IRQ_NONE;
@@ -232,15 +230,6 @@ static void retu_irq_unmask(struct irq_d
}
-static void retu_irq_ack(struct irq_data *data)
-{
- struct retu *retu = irq_data_get_irq_chip_data(data);
- int irq = data->irq;
-
- retu->ack |= (1 << (irq - retu->irq_base));
- retu->ack_pending = true;
-}
-
static void retu_bus_lock(struct irq_data *data)
{
struct retu *retu = irq_data_get_irq_chip_data(data);
@@ -257,11 +246,6 @@ static void retu_bus_sync_unlock(struct
retu->mask_pending = false;
}
- if (retu->ack_pending) {
- __retu_write_reg(retu, RETU_REG_IDR, retu->ack);
- retu->ack_pending = false;
- }
-
mutex_unlock(&retu->mutex);
}
@@ -271,7 +255,6 @@ static struct irq_chip retu_irq_chip = {
.irq_bus_sync_unlock = retu_bus_sync_unlock,
.irq_mask = retu_irq_mask,
.irq_unmask = retu_irq_unmask,
- .irq_ack = retu_irq_ack,
};
static inline void retu_irq_setup(int irq)
@@ -291,8 +274,7 @@ static void retu_irq_init(struct retu *r
for (irq = base; irq < end; irq++) {
irq_set_chip_data(irq, retu);
- irq_set_chip_and_handler(irq, &retu_irq_chip,
- handle_simple_irq);
+ irq_set_chip(irq, &retu_irq_chip);
irq_set_nested_thread(irq, 1);
retu_irq_setup(irq);
}
--- a/drivers/cbus/tahvo.c
+++ b/drivers/cbus/tahvo.c
@@ -48,11 +48,9 @@ struct tahvo {
int irq_end;
int irq;
- int ack;
int mask;
unsigned int mask_pending:1;
- unsigned int ack_pending:1;
unsigned int is_betty:1;
};
@@ -138,9 +136,12 @@ static irqreturn_t tahvo_irq_handler(int
u16 id;
u16 im;
+ mutex_lock(&tahvo->mutex);
id = __tahvo_read_reg(tahvo, TAHVO_REG_IDR);
im = __tahvo_read_reg(tahvo, TAHVO_REG_IMR);
id &= ~im;
+ __tahvo_write_reg(tahvo, TAHVO_REG_IDR, id);
+ mutex_unlock(&tahvo->mutex);
if (!id) {
dev_vdbg(tahvo->dev, "No IRQ, spurious ?\n");
@@ -177,11 +178,6 @@ static void tahvo_irq_bus_sync_unlock(st
tahvo->mask_pending = false;
}
- if (tahvo->ack_pending) {
- __tahvo_write_reg(tahvo, TAHVO_REG_IDR, tahvo->ack);
- tahvo->ack_pending = false;
- }
-
mutex_unlock(&tahvo->mutex);
}
@@ -203,22 +199,12 @@ static void tahvo_irq_unmask(struct irq_
tahvo->mask_pending = true;
}
-static void tahvo_irq_ack(struct irq_data *data)
-{
- struct tahvo *tahvo = irq_data_get_irq_chip_data(data);
- int irq = data->irq;
-
- tahvo->ack |= (1 << (irq - tahvo->irq_base));
- tahvo->ack_pending = true;
-}
-
static struct irq_chip tahvo_irq_chip = {
.name = "tahvo",
.irq_bus_lock = tahvo_irq_bus_lock,
.irq_bus_sync_unlock = tahvo_irq_bus_sync_unlock,
.irq_mask = tahvo_irq_mask,
.irq_unmask = tahvo_irq_unmask,
- .irq_ack = tahvo_irq_ack,
};
static inline void tahvo_irq_setup(int irq)
@@ -238,8 +224,7 @@ static void tahvo_irq_init(struct tahvo
for (irq = base; irq < end; irq++) {
irq_set_chip_data(irq, tahvo);
- irq_set_chip_and_handler(irq, &tahvo_irq_chip,
- handle_simple_irq);
+ irq_set_chip(irq, &tahvo_irq_chip);
irq_set_nested_thread(irq, 1);
tahvo_irq_setup(irq);
}

View File

@ -1,24 +0,0 @@
--- a/drivers/cbus/retu.c
+++ b/drivers/cbus/retu.c
@@ -451,7 +451,8 @@ static int __devinit retu_probe(struct p
(rev >> 4) & 0x07, rev & 0x0f);
/* Mask all RETU interrupts */
- __retu_write_reg(retu, RETU_REG_IMR, 0xffff);
+ retu->mask = 0xFFFF;
+ __retu_write_reg(retu, RETU_REG_IMR, retu->mask);
ret = request_threaded_irq(retu->irq, NULL, retu_irq_handler,
IRQF_ONESHOT, "retu", retu);
--- a/drivers/cbus/tahvo.c
+++ b/drivers/cbus/tahvo.c
@@ -346,7 +346,8 @@ static int __devinit tahvo_probe(struct
(rev >> 4) & 0x0f, rev & 0x0f);
/* Mask all TAHVO interrupts */
- __tahvo_write_reg(tahvo, TAHVO_REG_IMR, 0xffff);
+ tahvo->mask = 0xFFFF;
+ __tahvo_write_reg(tahvo, TAHVO_REG_IMR, tahvo->mask);
ret = request_threaded_irq(irq, NULL, tahvo_irq_handler,
IRQF_TRIGGER_RISING | IRQF_ONESHOT,

View File

@ -1,175 +0,0 @@
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -15,8 +15,11 @@
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/init.h>
+#include <linux/irq.h>
#include <linux/io.h>
#include <linux/stddef.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/cbus.h>
#include <linux/i2c.h>
#include <linux/spi/spi.h>
#include <linux/usb/musb.h>
@@ -193,6 +196,110 @@ static struct omap_onenand_platform_data
};
#endif
+#if defined(CONFIG_CBUS) || defined(CONFIG_CBUS_MODULE)
+
+static struct cbus_host_platform_data n8x0_cbus_data = {
+ .clk_gpio = 66,
+ .dat_gpio = 65,
+ .sel_gpio = 64,
+};
+
+static struct platform_device n8x0_cbus_device = {
+ .name = "cbus",
+ .id = -1,
+ .dev = {
+ .platform_data = &n8x0_cbus_data,
+ },
+};
+
+static struct resource retu_resource[] = {
+ {
+ .start = -EINVAL, /* set later */
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct cbus_retu_platform_data n8x0_retu_data = {
+ .devid = CBUS_RETU_DEVICE_ID,
+};
+
+static struct platform_device retu_device = {
+ .name = "retu",
+ .id = -1,
+ .resource = retu_resource,
+ .num_resources = ARRAY_SIZE(retu_resource),
+ .dev = {
+ .platform_data = &n8x0_retu_data,
+ .parent = &n8x0_cbus_device.dev,
+ },
+};
+
+static struct resource tahvo_resource[] = {
+ {
+ .start = -EINVAL, /* set later */
+ .flags = IORESOURCE_IRQ,
+ }
+};
+
+static struct platform_device tahvo_device = {
+ .name = "tahvo",
+ .id = -1,
+ .resource = tahvo_resource,
+ .num_resources = ARRAY_SIZE(tahvo_resource),
+ .dev = {
+ .parent = &n8x0_cbus_device.dev,
+ },
+};
+
+static void __init n8x0_cbus_init(void)
+{
+ int ret;
+
+ platform_device_register(&n8x0_cbus_device);
+
+ ret = gpio_request(108, "RETU irq");
+ if (ret < 0) {
+ pr_err("retu: Unable to reserve IRQ GPIO\n");
+ return;
+ }
+
+ ret = gpio_direction_input(108);
+ if (ret < 0) {
+ pr_err("retu: Unable to change gpio direction\n");
+ gpio_free(108);
+ return;
+ }
+
+ irq_set_irq_type(gpio_to_irq(108), IRQ_TYPE_EDGE_RISING);
+ retu_resource[0].start = gpio_to_irq(108);
+ platform_device_register(&retu_device);
+
+ ret = gpio_request(111, "TAHVO irq");
+ if (ret) {
+ pr_err("tahvo: Unable to reserve IRQ GPIO\n");
+ gpio_free(108);
+ return;
+ }
+
+ /* Set the pin as input */
+ ret = gpio_direction_input(111);
+ if (ret) {
+ pr_err("tahvo: Unable to change direction\n");
+ gpio_free(108);
+ gpio_free(111);
+ return;
+ }
+
+ tahvo_resource[0].start = gpio_to_irq(111);
+ platform_device_register(&tahvo_device);
+}
+
+#else
+static inline void __init n8x0_cbus_init(void)
+{
+}
+#endif
+
#if defined(CONFIG_MENELAUS) && \
(defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE))
@@ -671,6 +778,8 @@ static inline void board_serial_init(voi
static void __init n8x0_init_machine(void)
{
omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAC);
+ n8x0_cbus_init();
+
/* FIXME: add n810 spi devices */
spi_register_board_info(n800_spi_board_info,
ARRAY_SIZE(n800_spi_board_info));
--- /dev/null
+++ b/include/linux/platform_data/cbus.h
@@ -0,0 +1,38 @@
+/*
+ * cbus.h - CBUS platform_data definition
+ *
+ * Copyright (C) 2004 - 2009 Nokia Corporation
+ *
+ * Written by Felipe Balbi <felipe.balbi@nokia.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file "COPYING" in the main directory of this
+ * archive for more details.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __INCLUDE_LINUX_CBUS_H
+#define __INCLUDE_LINUX_CBUS_H
+
+#define CBUS_RETU_DEVICE_ID 0x01
+#define CBUS_TAHVO_DEVICE_ID 0x02
+
+struct cbus_host_platform_data {
+ int dat_gpio;
+ int clk_gpio;
+ int sel_gpio;
+};
+
+struct cbus_retu_platform_data {
+ int devid;
+};
+
+#endif /* __INCLUDE_LINUX_CBUS_H */

View File

@ -1,41 +0,0 @@
--- a/drivers/video/omap/omapfb_main.c
+++ b/drivers/video/omap/omapfb_main.c
@@ -420,10 +420,10 @@ static void set_fb_fix(struct fb_info *f
fbi->screen_base = rg->vaddr;
if (!from_init) {
- mutex_lock(&fbi->mm_lock);
+ preempt_disable();
fix->smem_start = rg->paddr;
fix->smem_len = rg->size;
- mutex_unlock(&fbi->mm_lock);
+ preempt_enable();
} else {
fix->smem_start = rg->paddr;
fix->smem_len = rg->size;
@@ -933,10 +933,10 @@ static int omapfb_setup_mem(struct fb_in
* plane memory is dealloce'd, the other
* screen parameters in var / fix are invalid.
*/
- mutex_lock(&fbi->mm_lock);
+ preempt_disable();
fbi->fix.smem_start = 0;
fbi->fix.smem_len = 0;
- mutex_unlock(&fbi->mm_lock);
+ preempt_enable();
}
}
}
--- a/drivers/video/fbmem.c
+++ b/drivers/video/fbmem.c
@@ -1383,8 +1383,10 @@ fb_mmap(struct file *file, struct vm_are
}
/* frame buffer memory */
+ preempt_disable();
start = info->fix.smem_start;
len = PAGE_ALIGN((start & ~PAGE_MASK) + info->fix.smem_len);
+ preempt_enable();
if (off >= len) {
/* memory mapped io */
off -= len;

View File

@ -1,368 +0,0 @@
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -24,6 +24,7 @@
#include <linux/spi/spi.h>
#include <linux/usb/musb.h>
#include <sound/tlv320aic3x.h>
+#include <linux/spi/tsc2005.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
@@ -43,6 +44,66 @@ static int slot1_cover_open;
static int slot2_cover_open;
static struct device *mmc_device;
+#define RX51_TSC2005_RESET_GPIO 94
+#define RX51_TSC2005_IRQ_GPIO 106
+
+#ifdef CONFIG_TOUCHSCREEN_TSC2005
+static struct tsc2005_platform_data tsc2005_config;
+static void rx51_tsc2005_set_reset(bool enable)
+{
+ gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
+}
+
+static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
+ .turbo_mode = 0,
+ .single_channel = 1,
+};
+#endif
+
+static void __init tsc2005_set_config(void)
+{
+ const struct omap_lcd_config *conf;
+
+ conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
+ if (conf != NULL) {
+#ifdef CONFIG_TOUCHSCREEN_TSC2005
+ if (strcmp(conf->panel_name, "lph8923") == 0) {
+ tsc2005_config.ts_x_plate_ohm = 180;
+ tsc2005_config.ts_pressure_max = 2048;
+ tsc2005_config.ts_pressure_fudge = 2;
+ tsc2005_config.ts_x_max = 4096;
+ tsc2005_config.ts_x_fudge = 4;
+ tsc2005_config.ts_y_max = 4096;
+ tsc2005_config.ts_y_fudge = 7;
+ tsc2005_config.set_reset = rx51_tsc2005_set_reset;
+ } else if (strcmp(conf->panel_name, "ls041y3") == 0) {
+ tsc2005_config.ts_x_plate_ohm = 280;
+ tsc2005_config.ts_pressure_max = 2048;
+ tsc2005_config.ts_pressure_fudge = 2;
+ tsc2005_config.ts_x_max = 4096;
+ tsc2005_config.ts_x_fudge = 4;
+ tsc2005_config.ts_y_max = 4096;
+ tsc2005_config.ts_y_fudge = 7;
+ tsc2005_config.set_reset = rx51_tsc2005_set_reset;
+ } else {
+ printk(KERN_ERR "Unknown panel type, set default "
+ "touchscreen configuration\n");
+ tsc2005_config.ts_x_plate_ohm = 200;
+ }
+#endif
+ }
+}
+
+static struct omap2_mcspi_device_config mipid_mcspi_config = {
+ .turbo_mode = 0,
+ .single_channel = 1,
+};
+
+extern struct mipid_platform_data n8x0_mipid_platform_data;
+
+extern void n8x0_mipid_init(void);
+extern void n8x0_blizzard_init(void);
+
#define TUSB6010_ASYNC_CS 1
#define TUSB6010_SYNC_CS 4
#define TUSB6010_GPIO_INT 58
@@ -145,12 +206,29 @@ static struct omap2_mcspi_device_config
static struct spi_board_info n800_spi_board_info[] __initdata = {
{
+ .modalias = "lcd_mipid",
+ .bus_num = 1,
+ .chip_select = 1,
+ .max_speed_hz = 4000000,
+ .controller_data= &mipid_mcspi_config,
+ .platform_data = &n8x0_mipid_platform_data,
+ },
+ {
.modalias = "p54spi",
.bus_num = 2,
.chip_select = 0,
.max_speed_hz = 48000000,
.controller_data = &p54spi_mcspi_config,
},
+ {
+ .modalias = "tsc2005",
+ .bus_num = 1,
+ .chip_select = 0,
+ .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),
+ .max_speed_hz = 6000000,
+ .controller_data = &tsc2005_mcspi_config,
+ .platform_data = &tsc2005_config,
+ },
};
#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
@@ -781,6 +859,7 @@ static void __init n8x0_init_machine(voi
n8x0_cbus_init();
/* FIXME: add n810 spi devices */
+ tsc2005_set_config();
spi_register_board_info(n800_spi_board_info,
ARRAY_SIZE(n800_spi_board_info));
omap_register_i2c_bus(1, 400, n8x0_i2c_board_info_1,
@@ -790,6 +869,8 @@ static void __init n8x0_init_machine(voi
i2c_register_board_info(2, n810_i2c_board_info_2,
ARRAY_SIZE(n810_i2c_board_info_2));
board_serial_init();
+ n8x0_mipid_init();
+ n8x0_blizzard_init();
omap_sdrc_init(NULL, NULL);
gpmc_onenand_init(board_onenand_data);
n8x0_mmc_init();
--- /dev/null
+++ b/arch/arm/mach-omap2/board-n8x0-lcd.c
@@ -0,0 +1,231 @@
+/*
+ * linux/arch/arm/mach-omap2/board-n8x0.c
+ *
+ * Copyright (C) 2005-2009 Nokia Corporation
+ * Author: Juha Yrjola <juha.yrjola@nokia.com>
+ *
+ * Modified from mach-omap2/board-generic.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/omapfb.h>
+
+#include <plat/lcd_mipid.h>
+#include <plat/blizzard.h>
+
+#include "../../../drivers/cbus/tahvo.h"
+
+
+struct tahvo_pwm_device {
+ struct device *dev;
+ int tahvo_7bit_backlight;
+};
+
+static struct tahvo_pwm_device *tahvo_pwm;
+
+static unsigned int tahvo_pwm_get_backlight_level(struct tahvo_pwm_device *pd)
+{
+ unsigned int mask;
+
+ if (pd->tahvo_7bit_backlight)
+ mask = 0x7f;
+ else
+ mask = 0x0f;
+ return tahvo_read_reg(pd->dev, TAHVO_REG_LEDPWMR) & mask;
+}
+
+static unsigned int tahvo_pwm_get_max_backlight_level(struct tahvo_pwm_device *pd)
+{
+ if (pd->tahvo_7bit_backlight)
+ return 0x7f;
+ return 0x0f;
+}
+
+static void tahvo_pwm_set_backlight_level(struct tahvo_pwm_device *pd, unsigned int level)
+{
+ unsigned int max_level;
+
+ max_level = tahvo_pwm_get_max_backlight_level(pd);
+ if (level > max_level)
+ level = max_level;
+ tahvo_write_reg(pd->dev, TAHVO_REG_LEDPWMR, level);
+}
+
+static int __init n8x0_tahvo_pwm_probe(struct platform_device *pdev)
+{
+ struct tahvo_pwm_device *pd;
+ unsigned int rev, id;
+
+ pd = kzalloc(sizeof(*pd), GFP_KERNEL);
+ if (WARN_ON(!pd))
+ return -ENOMEM;
+ pd->dev = &pdev->dev;
+
+ rev = tahvo_read_reg(pd->dev, TAHVO_REG_ASICR);
+ id = (rev >> 8) & 0xff;
+ if (id == 0x03) {
+ if ((rev & 0xff) >= 0x50)
+ pd->tahvo_7bit_backlight = 1;
+ } else if (id == 0x0b)
+ pd->tahvo_7bit_backlight = 1;
+
+ dev_set_drvdata(pd->dev, pd);
+ tahvo_pwm = pd;
+
+ return 0;
+}
+
+static struct platform_driver n8x0_tahvo_pwm_driver = {
+ .driver = {
+ .name = "tahvo-pwm",
+ },
+};
+
+static int __init n8x0_tahvo_pwm_init(void)
+{
+ return platform_driver_probe(&n8x0_tahvo_pwm_driver, n8x0_tahvo_pwm_probe);
+}
+fs_initcall(n8x0_tahvo_pwm_init);
+
+static int n8x0_get_backlight_level(struct mipid_platform_data *pdata)
+{
+ return tahvo_pwm_get_backlight_level(tahvo_pwm);
+}
+
+static int n8x0_get_max_backlight_level(struct mipid_platform_data *pdata)
+{
+ return tahvo_pwm_get_max_backlight_level(tahvo_pwm);
+}
+
+static void n8x0_set_backlight_level(struct mipid_platform_data *pdata, int level)
+{
+ tahvo_pwm_set_backlight_level(tahvo_pwm, level);
+}
+
+#define N8X0_BLIZZARD_POWERDOWN_GPIO 15
+
+// MIPID LCD Panel
+
+static void mipid_shutdown(struct mipid_platform_data *pdata)
+{
+ if (pdata->nreset_gpio != -1) {
+ pr_info("shutdown LCD\n");
+ gpio_set_value(pdata->nreset_gpio, 0);
+ msleep(120);
+ }
+}
+
+struct mipid_platform_data n8x0_mipid_platform_data = {
+ .shutdown = mipid_shutdown,
+ .get_bklight_level = n8x0_get_backlight_level,
+ .set_bklight_level = n8x0_set_backlight_level,
+ .get_bklight_max = n8x0_get_max_backlight_level,
+};
+
+void __init n8x0_mipid_init(void)
+{
+ const struct omap_lcd_config *conf;
+ int err;
+
+ conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
+ if (conf != NULL) {
+ n8x0_mipid_platform_data.nreset_gpio = conf->nreset_gpio;
+ n8x0_mipid_platform_data.data_lines = conf->data_lines;
+ if (conf->nreset_gpio != -1) {
+ err = gpio_request(conf->nreset_gpio, "MIPID nreset");
+ if (err) {
+ printk(KERN_ERR "N8x0 MIPID failed to request nreset GPIO %d\n",
+ conf->nreset_gpio);
+ } else {
+ err = gpio_direction_output(conf->nreset_gpio, 1);
+ if (err) {
+ printk(KERN_ERR "N8x0 MIPID failed to set nreset GPIO %d\n",
+ conf->nreset_gpio);
+ }
+ }
+ }
+ printk(KERN_INFO "N8x0 MIPID config loaded");
+ }
+ else
+ printk(KERN_INFO "N8x0 MIPID config not provided");
+}
+
+
+// Epson Blizzard LCD Controller
+
+static struct {
+ struct clk *sys_ck;
+} blizzard;
+
+static int blizzard_get_clocks(void)
+{
+ blizzard.sys_ck = clk_get(0, "osc_ck");
+ if (IS_ERR(blizzard.sys_ck)) {
+ printk(KERN_ERR "can't get Blizzard clock\n");
+ return PTR_ERR(blizzard.sys_ck);
+ }
+ return 0;
+}
+
+static unsigned long blizzard_get_clock_rate(struct device *dev)
+{
+ return clk_get_rate(blizzard.sys_ck);
+}
+
+static void blizzard_enable_clocks(int enable)
+{
+ if (enable)
+ clk_enable(blizzard.sys_ck);
+ else
+ clk_disable(blizzard.sys_ck);
+}
+
+static void blizzard_power_up(struct device *dev)
+{
+ /* Vcore to 1.475V */
+ tahvo_set_clear_reg_bits(tahvo_pwm->dev, 0x07, 0, 0xf);
+ msleep(10);
+
+ blizzard_enable_clocks(1);
+ gpio_set_value(N8X0_BLIZZARD_POWERDOWN_GPIO, 1);
+}
+
+static void blizzard_power_down(struct device *dev)
+{
+ gpio_set_value(N8X0_BLIZZARD_POWERDOWN_GPIO, 0);
+ blizzard_enable_clocks(0);
+
+ /* Vcore to 1.005V */
+ tahvo_set_clear_reg_bits(tahvo_pwm->dev, 0x07, 0xf, 0);
+}
+
+static struct blizzard_platform_data n8x0_blizzard_data = {
+ .power_up = blizzard_power_up,
+ .power_down = blizzard_power_down,
+ .get_clock_rate = blizzard_get_clock_rate,
+ .te_connected = 1,
+};
+
+void __init n8x0_blizzard_init(void)
+{
+ int r;
+
+ r = gpio_request(N8X0_BLIZZARD_POWERDOWN_GPIO, "Blizzard pd");
+ if (r < 0)
+ {
+ printk(KERN_ERR "Can't get N8x0 Blizzard powerdown GPIO %d\n", N8X0_BLIZZARD_POWERDOWN_GPIO);
+ return;
+ }
+ gpio_direction_output(N8X0_BLIZZARD_POWERDOWN_GPIO, 1);
+
+ blizzard_get_clocks();
+ omapfb_set_ctrl_platform_data(&n8x0_blizzard_data);
+
+ printk(KERN_INFO "N8x0 Blizzard initialized");
+}
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -205,6 +205,7 @@ obj-$(CONFIG_MACH_OMAP3EVM) += board-om
obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o
obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o
obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o
+obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0-lcd.o
obj-$(CONFIG_MACH_NOKIA_RM680) += board-rm680.o \
sdram-nokia.o
obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \

View File

@ -1,30 +0,0 @@
--- a/drivers/video/omap/dispc.c
+++ b/drivers/video/omap/dispc.c
@@ -923,14 +923,14 @@ static int get_dss_clocks(void)
return PTR_ERR(dispc.dss_ick);
}
- dispc.dss1_fck = clk_get(&dispc.fbdev->dssdev->dev, "fck");
+ dispc.dss1_fck = clk_get(&dispc.fbdev->dssdev->dev, "dss1_fck");
if (IS_ERR(dispc.dss1_fck)) {
dev_err(dispc.fbdev->dev, "can't get dss1_fck\n");
clk_put(dispc.dss_ick);
return PTR_ERR(dispc.dss1_fck);
}
- dispc.dss_54m_fck = clk_get(&dispc.fbdev->dssdev->dev, "tv_clk");
+ dispc.dss_54m_fck = clk_get(&dispc.fbdev->dssdev->dev, "dss_54m_fck");
if (IS_ERR(dispc.dss_54m_fck)) {
dev_err(dispc.fbdev->dev, "can't get tv_fck\n");
clk_put(dispc.dss_ick);
--- a/drivers/video/omap/rfbi.c
+++ b/drivers/video/omap/rfbi.c
@@ -90,7 +90,7 @@ static int rfbi_get_clocks(void)
return PTR_ERR(rfbi.dss_ick);
}
- rfbi.dss1_fck = clk_get(&rfbi.fbdev->dssdev->dev, "fck");
+ rfbi.dss1_fck = clk_get(&rfbi.fbdev->dssdev->dev, "dss1_fck");
if (IS_ERR(rfbi.dss1_fck)) {
dev_err(rfbi.fbdev->dev, "can't get dss1_fck\n");
clk_put(rfbi.dss_ick);

View File

@ -1,28 +0,0 @@
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -146,6 +146,8 @@
#include <plat/omap_hwmod.h>
#include <plat/prcm.h>
+#include <asm/mach-types.h>
+
#include "cm2xxx_3xxx.h"
#include "cminst44xx.h"
#include "prm2xxx_3xxx.h"
@@ -1769,6 +1771,16 @@ static int _setup(struct omap_hwmod *oh,
oh->_state = _HWMOD_STATE_INITIALIZED;
+ if (machine_is_nokia770() ||
+ machine_is_nokia_n800() ||
+ machine_is_nokia_n810() ||
+ machine_is_nokia_n810_wimax()) {
+ /* Nokia N-series workaround: Don't reset any hwmod. Some drivers expect
+ * the NOLO bootloader initializations to be effective. */
+ oh->flags |= HWMOD_INIT_NO_RESET;
+ printk_once(KERN_INFO "Nokia N-series HWMOD_INIT_NO_RESET workaround enabled\n");
+ }
+
/*
* In the case of hwmod with hardreset that should not be
* de-assert at boot time, we have to keep the module

View File

@ -1,194 +0,0 @@
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -25,6 +25,8 @@
#include <linux/usb/musb.h>
#include <sound/tlv320aic3x.h>
#include <linux/spi/tsc2005.h>
+#include <linux/input.h>
+#include <linux/i2c/lm8323.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
@@ -37,6 +39,7 @@
#include <plat/onenand.h>
#include <plat/mmc.h>
#include <plat/serial.h>
+#include <plat/gpio-switch.h>
#include "mux.h"
@@ -104,6 +107,152 @@ extern struct mipid_platform_data n8x0_m
extern void n8x0_mipid_init(void);
extern void n8x0_blizzard_init(void);
+/* We map the FN key as LALT to workaround an X keycode problem.
+ * The XKB map needs to be adjusted to support this. */
+#define MAP_FN_AS_LEFTALT
+
+static s16 rx44_keymap[LM8323_KEYMAP_SIZE] = {
+ [0x01] = KEY_Q,
+ [0x02] = KEY_K,
+ [0x03] = KEY_O,
+ [0x04] = KEY_P,
+ [0x05] = KEY_BACKSPACE,
+ [0x06] = KEY_A,
+ [0x07] = KEY_S,
+ [0x08] = KEY_D,
+ [0x09] = KEY_F,
+ [0x0a] = KEY_G,
+ [0x0b] = KEY_H,
+ [0x0c] = KEY_J,
+
+ [0x11] = KEY_W,
+ [0x12] = KEY_F4,
+ [0x13] = KEY_L,
+ [0x14] = KEY_APOSTROPHE,
+ [0x16] = KEY_Z,
+ [0x17] = KEY_X,
+ [0x18] = KEY_C,
+ [0x19] = KEY_V,
+ [0x1a] = KEY_B,
+ [0x1b] = KEY_N,
+ [0x1c] = KEY_LEFTSHIFT, /* Actually, this is both shift keys */
+ [0x1f] = KEY_F7,
+
+ [0x21] = KEY_E,
+ [0x22] = KEY_SEMICOLON,
+ [0x23] = KEY_MINUS,
+ [0x24] = KEY_EQUAL,
+#ifdef MAP_FN_AS_LEFTALT
+ [0x2b] = KEY_LEFTALT,
+#else
+ [0x2b] = KEY_FN,
+#endif
+ [0x2c] = KEY_M,
+ [0x2f] = KEY_F8,
+
+ [0x31] = KEY_R,
+ [0x32] = KEY_RIGHTCTRL,
+ [0x34] = KEY_SPACE,
+ [0x35] = KEY_COMMA,
+ [0x37] = KEY_UP,
+ [0x3c] = KEY_COMPOSE,
+ [0x3f] = KEY_F6,
+
+ [0x41] = KEY_T,
+ [0x44] = KEY_DOT,
+ [0x46] = KEY_RIGHT,
+ [0x4f] = KEY_F5,
+ [0x51] = KEY_Y,
+ [0x53] = KEY_DOWN,
+ [0x55] = KEY_ENTER,
+ [0x5f] = KEY_ESC,
+
+ [0x61] = KEY_U,
+ [0x64] = KEY_LEFT,
+
+ [0x71] = KEY_I,
+ [0x75] = KEY_KPENTER,
+};
+
+static struct lm8323_platform_data lm8323_pdata = {
+ .repeat = 0, /* Repeat is handled in userspace for now. */
+ .keymap = rx44_keymap,
+ .size_x = 8,
+ .size_y = 12,
+ .debounce_time = 12,
+ .active_time = 500,
+
+ .name = "Internal keyboard",
+ .pwm_names[0] = "n810::keyboard",
+ .pwm_names[1] = "n810::cover",
+};
+
+#define OMAP_TAG_NOKIA_BT 0x4e01
+
+struct omap_bluetooth_config {
+ u8 chip_type;
+ u8 bt_wakeup_gpio;
+ u8 host_wakeup_gpio;
+ u8 reset_gpio;
+ u8 bt_uart;
+ u8 bd_addr[6];
+ u8 bt_sysclk;
+};
+
+static struct platform_device n8x0_bt_device = {
+ .name = "hci_h4p",
+ .id = -1,
+ .num_resources = 0,
+};
+
+void __init n8x0_bt_init(void)
+{
+ const struct omap_bluetooth_config *bt_config;
+
+ bt_config = (void *) omap_get_config(OMAP_TAG_NOKIA_BT,
+ struct omap_bluetooth_config);
+ n8x0_bt_device.dev.platform_data = (void *) bt_config;
+ if (platform_device_register(&n8x0_bt_device) < 0)
+ BUG();
+}
+
+static struct omap_gpio_switch n8x0_gpio_switches[] __initdata = {
+ {
+ .name = "headphone",
+ .gpio = -1,
+ .debounce_rising = 200,
+ .debounce_falling = 200,
+ }, {
+ .name = "cam_act",
+ .gpio = -1,
+ .debounce_rising = 200,
+ .debounce_falling = 200,
+ }, {
+ .name = "cam_turn",
+ .gpio = -1,
+ .debounce_rising = 100,
+ .debounce_falling = 100,
+ }, {
+ .name = "slide",
+ .gpio = -1,
+ .debounce_rising = 200,
+ .debounce_falling = 200,
+ }, {
+ .name = "kb_lock",
+ .gpio = -1,
+ .debounce_rising = 200,
+ .debounce_falling = 200,
+ },
+};
+
+static void __init n8x0_gpio_switches_init(void)
+{
+ /* The switches are actually registered through ATAG mechanism.
+ * This just updates the parameters (thus .gpio is -1) */
+ omap_register_gpio_switches(n8x0_gpio_switches,
+ ARRAY_SIZE(n8x0_gpio_switches));
+}
+
#define TUSB6010_ASYNC_CS 1
#define TUSB6010_SYNC_CS 4
#define TUSB6010_GPIO_INT 58
@@ -799,6 +948,11 @@ static struct aic3x_pdata n810_aic33_dat
};
static struct i2c_board_info n810_i2c_board_info_2[] __initdata = {
+ {
+ I2C_BOARD_INFO("lm8323", 0x45),
+ .irq = OMAP_GPIO_IRQ(109),
+ .platform_data = &lm8323_pdata,
+ },
{
I2C_BOARD_INFO("tlv320aic3x", 0x18),
.platform_data = &n810_aic33_data,
@@ -856,7 +1010,9 @@ static inline void board_serial_init(voi
static void __init n8x0_init_machine(void)
{
omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAC);
+ n8x0_gpio_switches_init();
n8x0_cbus_init();
+ n8x0_bt_init();
/* FIXME: add n810 spi devices */
tsc2005_set_config();

View File

@ -1,212 +0,0 @@
From f0bb9e67f0f13021e5033fed3dfe8ef78fe6a538 Mon Sep 17 00:00:00 2001
From: Marat Radchenko <marat@slonopotamus.org>
Date: Tue, 18 Oct 2011 21:52:56 +0400
Subject: [PATCH 2/2] N800: add TSC2301 board info
This patch adds TSC2301 init logic to N800 board file
---
arch/arm/mach-omap2/board-n8x0.c | 141 ++++++++++++++++++++++++++++++++++++--
1 files changed, 135 insertions(+), 6 deletions(-)
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -27,6 +27,7 @@
#include <linux/spi/tsc2005.h>
#include <linux/input.h>
#include <linux/i2c/lm8323.h>
+#include <linux/spi/tsc2301.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
@@ -63,7 +64,75 @@ static struct omap2_mcspi_device_config
};
#endif
-static void __init tsc2005_set_config(void)
+#ifdef CONFIG_TOUCHSCREEN_TSC2301
+
+#define N800_KEYB_IRQ_GPIO 109
+
+static struct tsc2301_platform_data tsc2301_config = {
+ .reset_gpio = 118,
+ .keymap = {
+ -1, /* Event for bit 0 */
+ KEY_UP, /* Event for bit 1 (up) */
+ KEY_F5, /* Event for bit 2 (home) */
+ -1, /* Event for bit 3 */
+ KEY_LEFT, /* Event for bit 4 (left) */
+ KEY_ENTER, /* Event for bit 5 (enter) */
+ KEY_RIGHT, /* Event for bit 6 (right) */
+ -1, /* Event for bit 7 */
+ KEY_ESC, /* Event for bit 8 (cycle) */
+ KEY_DOWN, /* Event for bit 9 (down) */
+ KEY_F4, /* Event for bit 10 (menu) */
+ -1, /* Event for bit 11 */
+ KEY_F8, /* Event for bit 12 (Zoom-) */
+ KEY_F6, /* Event for bit 13 (FS) */
+ KEY_F7, /* Event for bit 14 (Zoom+) */
+ -1, /* Event for bit 15 */
+ },
+ .kp_rep = 0,
+ .keyb_name = "Internal keypad",
+};
+
+static struct omap2_mcspi_device_config tsc2301_mcspi_config = {
+ .turbo_mode = 0,
+ .single_channel = 1,
+};
+
+/*
+ TODO(Marat Radchenko): better pass GPIO to tsc2301 driver and let it
+ allocate irq itself (as it is already done for touchscreen)
+ */
+static void tsc2301_dev_init(void)
+{
+ int r;
+ int gpio = N800_KEYB_IRQ_GPIO;
+
+ r = gpio_request(gpio, "tsc2301 KBD IRQ");
+ if (r >= 0) {
+ gpio_direction_input(gpio);
+ tsc2301_config.keyb_int = gpio_to_irq(gpio);
+ } else {
+ printk(KERN_ERR "unable to get KBD GPIO");
+ }
+
+ gpio = 103;
+ r = gpio_request(gpio, "tsc2301 DAV IRQ");
+ if (r >= 0) {
+ gpio_direction_input(gpio);
+ tsc2301_config.dav_int = gpio_to_irq(gpio);
+ } else {
+ printk(KERN_ERR "unable to get DAV GPIO");
+ }
+}
+
+#else
+
+static void __init tsc2301_dev_init(void)
+{
+}
+
+#endif
+
+static void __init n8x0_ts_set_config(void)
{
const struct omap_lcd_config *conf;
@@ -94,6 +163,37 @@ static void __init tsc2005_set_config(vo
tsc2005_config.ts_x_plate_ohm = 200;
}
#endif
+
+#ifdef CONFIG_TOUCHSCREEN_TSC2301
+ if (strcmp(conf->panel_name, "lph8923") == 0) {
+ tsc2301_config.ts_x_plate_ohm = 180;
+ tsc2301_config.ts_hw_avg = 8;
+ tsc2301_config.ts_max_pressure = 2048;
+ tsc2301_config.ts_touch_pressure = 400;
+ tsc2301_config.ts_stab_time = 100;
+ tsc2301_config.ts_pressure_fudge = 2;
+ tsc2301_config.ts_x_max = 4096;
+ tsc2301_config.ts_x_fudge = 4;
+ tsc2301_config.ts_y_max = 4096;
+ tsc2301_config.ts_y_fudge = 7;
+ } else if (strcmp(conf->panel_name, "ls041y3") == 0) {
+ tsc2301_config.ts_x_plate_ohm = 280;
+ tsc2301_config.ts_hw_avg = 8;
+ tsc2301_config.ts_touch_pressure = 400;
+ tsc2301_config.ts_max_pressure = 2048;
+ tsc2301_config.ts_stab_time = 1000;
+ tsc2301_config.ts_pressure_fudge = 2;
+ tsc2301_config.ts_x_max = 4096;
+ tsc2301_config.ts_x_fudge = 4;
+ tsc2301_config.ts_y_max = 4096;
+ tsc2301_config.ts_y_fudge = 7;
+ } else {
+ printk(KERN_ERR "Unknown panel type, set default "
+ "touchscreen configuration\n");
+ tsc2301_config.ts_x_plate_ohm = 200;
+ tsc2301_config.ts_stab_time = 100;
+ }
+#endif
}
}
@@ -347,13 +447,12 @@ static void __init n8x0_usb_init(void) {
#endif /*CONFIG_USB_MUSB_TUSB6010 */
-
static struct omap2_mcspi_device_config p54spi_mcspi_config = {
.turbo_mode = 0,
.single_channel = 1,
};
-static struct spi_board_info n800_spi_board_info[] __initdata = {
+static struct spi_board_info n8x0_common_spi_board_info[] __initdata = {
{
.modalias = "lcd_mipid",
.bus_num = 1,
@@ -369,6 +468,10 @@ static struct spi_board_info n800_spi_bo
.max_speed_hz = 48000000,
.controller_data = &p54spi_mcspi_config,
},
+};
+
+static struct spi_board_info n810_spi_board_info[] __initdata = {
+#ifdef CONFIG_TOUCHSCREEN_TSC2005
{
.modalias = "tsc2005",
.bus_num = 1,
@@ -378,6 +481,20 @@ static struct spi_board_info n800_spi_bo
.controller_data = &tsc2005_mcspi_config,
.platform_data = &tsc2005_config,
},
+#endif
+};
+
+static struct spi_board_info n800_spi_board_info[] __initdata = {
+#if defined(CONFIG_TOUCHSCREEN_TSC2301)
+ {
+ .modalias = "tsc2301",
+ .bus_num = 1,
+ .chip_select = 0,
+ .max_speed_hz = 6000000,
+ .controller_data = &tsc2301_mcspi_config,
+ .platform_data = &tsc2301_config,
+ },
+#endif
};
#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
@@ -1015,9 +1132,17 @@ static void __init n8x0_init_machine(voi
n8x0_bt_init();
/* FIXME: add n810 spi devices */
- tsc2005_set_config();
- spi_register_board_info(n800_spi_board_info,
- ARRAY_SIZE(n800_spi_board_info));
+ n8x0_ts_set_config();
+
+ spi_register_board_info(n8x0_common_spi_board_info,
+ ARRAY_SIZE(n8x0_common_spi_board_info));
+ if (machine_is_nokia_n800())
+ spi_register_board_info(n800_spi_board_info,
+ ARRAY_SIZE(n800_spi_board_info));
+ else
+ spi_register_board_info(n810_spi_board_info,
+ ARRAY_SIZE(n810_spi_board_info));
+
omap_register_i2c_bus(1, 400, n8x0_i2c_board_info_1,
ARRAY_SIZE(n8x0_i2c_board_info_1));
omap_register_i2c_bus(2, 400, NULL, 0);
@@ -1027,6 +1152,8 @@ static void __init n8x0_init_machine(voi
board_serial_init();
n8x0_mipid_init();
n8x0_blizzard_init();
+ if (machine_is_nokia_n800())
+ tsc2301_dev_init();
omap_sdrc_init(NULL, NULL);
gpmc_onenand_init(board_onenand_data);
n8x0_mmc_init();

View File

@ -1,98 +0,0 @@
---
arch/arm/mach-omap2/board-n8x0.c | 73 +++++++++++++++++++++++++++++++++++++++
1 file changed, 73 insertions(+)
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -316,6 +316,77 @@ void __init n8x0_bt_init(void)
BUG();
}
+struct gpio_switch_input_dev {
+ struct input_dev *idev;
+ unsigned int swcode;
+};
+
+static struct gpio_switch_input_dev *slide_input;
+static struct gpio_switch_input_dev *kblock_input;
+
+static void n8x0_gpio_switch_input_notify(struct gpio_switch_input_dev *gdev,
+ int state)
+{
+ if (gdev) {
+ input_report_switch(gdev->idev, gdev->swcode, state);
+ input_sync(gdev->idev);
+ }
+}
+
+static void n8x0_slide_notify(void *data, int state)
+{
+ n8x0_gpio_switch_input_notify(slide_input, state);
+}
+
+static void n8x0_kb_lock_notify(void *data, int state)
+{
+ n8x0_gpio_switch_input_notify(kblock_input, state);
+}
+
+static struct gpio_switch_input_dev * __init gpioswitch_input_init(
+ const char *name,
+ unsigned int swcode)
+{
+ struct gpio_switch_input_dev *gdev;
+ int err;
+
+ gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
+ if (!gdev)
+ goto error;
+ gdev->swcode = swcode;
+
+ gdev->idev = input_allocate_device();
+ if (!gdev->idev)
+ goto err_free;
+
+ gdev->idev->evbit[0] = BIT_MASK(EV_SW);
+ gdev->idev->swbit[BIT_WORD(swcode)] = BIT_MASK(swcode);
+ gdev->idev->name = name;
+
+ err = input_register_device(gdev->idev);
+ if (err)
+ goto err_free_idev;
+
+ return gdev;
+
+err_free_idev:
+ input_free_device(gdev->idev);
+err_free:
+ kfree(gdev);
+error:
+ return NULL;
+}
+
+static int __init n8x0_gpio_switches_input_init(void)
+{
+ slide_input = gpioswitch_input_init("slide", SW_KEYPAD_SLIDE);
+ kblock_input = gpioswitch_input_init("kb_lock", SW_LID);
+ if (WARN_ON(!slide_input || !kblock_input))
+ return -ENODEV;
+ return 0;
+}
+late_initcall(n8x0_gpio_switches_input_init);
+
static struct omap_gpio_switch n8x0_gpio_switches[] __initdata = {
{
.name = "headphone",
@@ -337,11 +408,13 @@ static struct omap_gpio_switch n8x0_gpio
.gpio = -1,
.debounce_rising = 200,
.debounce_falling = 200,
+ .notify = n8x0_slide_notify,
}, {
.name = "kb_lock",
.gpio = -1,
.debounce_rising = 200,
.debounce_falling = 200,
+ .notify = n8x0_kb_lock_notify,
},
};

File diff suppressed because it is too large Load Diff

View File

@ -1,46 +0,0 @@
--- a/drivers/bluetooth/hci_h4p/core.c
+++ b/drivers/bluetooth/hci_h4p/core.c
@@ -36,9 +36,9 @@
#include <linux/clk.h>
#include <linux/gpio.h>
-#include <mach/hardware.h>
-#include <mach/board.h>
-#include <mach/irqs.h>
+#include <plat/hardware.h>
+#include <plat/board.h>
+#include <plat/irqs.h>
#include <plat/serial.h>
#include <net/bluetooth/bluetooth.h>
--- a/drivers/bluetooth/hci_h4p/hci_h4p.h
+++ b/drivers/bluetooth/hci_h4p/hci_h4p.h
@@ -21,7 +21,7 @@
*
*/
-#include <mach/board.h>
+#include <plat/board.h>
#include <net/bluetooth/bluetooth.h>
#include <net/bluetooth/hci_core.h>
--- a/drivers/bluetooth/hci_h4p/sysfs.c
+++ b/drivers/bluetooth/hci_h4p/sysfs.c
@@ -48,15 +48,8 @@ static ssize_t hci_h4p_store_bdaddr(stru
return -EINVAL;
}
- //for (i = 0; i < 6; i++)
- //info->bdaddr[i] = bdaddr[i] & 0xff;
-
- info->bdaddr[0] = 0x00;
- info->bdaddr[1] = 0x1D;
- info->bdaddr[2] = 0x6E;
- info->bdaddr[3] = 0xD4;
- info->bdaddr[4] = 0xF0;
- info->bdaddr[5] = 0x37;
+ for (i = 0; i < 6; i++)
+ info->bdaddr[i] = bdaddr[i] & 0xff;
return count;
}

View File

@ -1,36 +0,0 @@
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -235,7 +235,7 @@ struct omap_hwmod_irq_info omap2_timer11
};
struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[] = {
- { .irq = INT_24XX_UART1_IRQ, },
+ { .irq = 0, },
{ .irq = -1 }
};
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -517,8 +517,10 @@ static int serial_omap_startup(struct ua
/*
* Allocate the IRQ
*/
- retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags,
- up->name, up);
+ retval = 0;
+ if (up->port.irq)
+ retval = request_irq(up->port.irq, serial_omap_irq,
+ up->port.irqflags, up->name, up);
if (retval)
return retval;
@@ -629,7 +631,8 @@ static void serial_omap_shutdown(struct
}
pm_runtime_put(&up->pdev->dev);
- free_irq(up->port.irq, up);
+ if (up->port.irq)
+ free_irq(up->port.irq, up);
}
static inline void

View File

@ -1,34 +0,0 @@
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -41,6 +41,7 @@
#include <plat/mmc.h>
#include <plat/serial.h>
#include <plat/gpio-switch.h>
+#include <plat/usb.h>
#include "mux.h"
@@ -486,6 +487,14 @@ static struct musb_hdrc_platform_data tu
.config = &musb_config,
};
+static struct omap_usb_config n8x0_omap_usb_config __initdata = {
+ .otg = 1,
+ .register_host = 1,
+ .register_dev = 1,
+ .hmc_mode = 16,
+ .pins[0] = 6,
+};
+
static void __init n8x0_usb_init(void)
{
int ret = 0;
@@ -507,6 +516,8 @@ static void __init n8x0_usb_init(void)
if (ret != 0)
goto err;
+ omap2_usbfs_init(&n8x0_omap_usb_config);
+
printk(announce);
return;

View File

@ -1,31 +0,0 @@
---
drivers/input/evdev.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
--- a/drivers/input/evdev.c
+++ b/drivers/input/evdev.c
@@ -92,7 +92,7 @@ static void evdev_event(struct input_han
unsigned int type, unsigned int code, int value)
{
struct evdev *evdev = handle->private;
- struct evdev_client *client;
+ struct evdev_client *client, *c;
struct input_event event;
do_gettimeofday(&event.time);
@@ -103,9 +103,13 @@ static void evdev_event(struct input_han
rcu_read_lock();
client = rcu_dereference(evdev->grab);
- if (client)
+ if (client) {
evdev_pass_event(client, &event);
- else
+ /* Also pass events to clients that did not grab the device. */
+ list_for_each_entry_rcu(c, &evdev->client_list, node)
+ if (c != client)
+ evdev_pass_event(c, &event);
+ } else
list_for_each_entry_rcu(client, &evdev->client_list, node)
evdev_pass_event(client, &event);

View File

@ -1,50 +0,0 @@
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -1456,6 +1456,7 @@ static int __init mmc_omap_probe(struct
host->dma_ch = -1;
host->irq = irq;
+ host->reg_shift = (cpu_is_omap7xx() ? 1 : 2);
host->phys_base = host->mem_res->start;
host->virt_base = ioremap(res->start, resource_size(res));
if (!host->virt_base)
@@ -1495,7 +1496,9 @@ static int __init mmc_omap_probe(struct
}
}
- host->reg_shift = (cpu_is_omap7xx() ? 1 : 2);
+ /* Make sure the detect workqueue was run at least once. */
+ printk(KERN_INFO "OMAP-mmc: waiting for cards...\n");
+ mmc_flush_scheduled_work();
return 0;
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -78,12 +78,13 @@ static int mmc_schedule_delayed_work(str
}
/*
- * Internal function. Flush all scheduled work from the MMC work queue.
+ * Flush all scheduled work from the MMC work queue.
*/
-static void mmc_flush_scheduled_work(void)
+void mmc_flush_scheduled_work(void)
{
flush_workqueue(workqueue);
}
+EXPORT_SYMBOL(mmc_flush_scheduled_work);
#ifdef CONFIG_FAIL_MMC_REQUEST
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -445,6 +445,8 @@ static inline int mmc_boot_partition_acc
return !(host->caps2 & MMC_CAP2_BOOTPART_NOACC);
}
+void mmc_flush_scheduled_work(void);
+
#ifdef CONFIG_MMC_CLKGATE
void mmc_host_clk_hold(struct mmc_host *host);
void mmc_host_clk_release(struct mmc_host *host);

View File

@ -1,23 +0,0 @@
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -258,6 +258,8 @@ char *cmdline_find_option(char *str)
return strstr(saved_command_line, str);
}
+static struct omap_uart_state statebuf[4];
+
static int __init omap_serial_early_init(void)
{
do {
@@ -272,9 +274,9 @@ static int __init omap_serial_early_init
if (!oh)
break;
- uart = kzalloc(sizeof(struct omap_uart_state), GFP_KERNEL);
- if (WARN_ON(!uart))
+ if (WARN_ON(num_uarts >= ARRAY_SIZE(statebuf)))
return -ENODEV;
+ uart = &statebuf[num_uarts];
uart->oh = oh;
uart->num = num_uarts++;

View File

@ -1,135 +0,0 @@
--- a/drivers/usb/musb/tusb6010.c
+++ b/drivers/usb/musb/tusb6010.c
@@ -221,6 +221,7 @@ void musb_write_fifo(struct musb_hw_ep *
if (len > 0)
tusb_fifo_write_unaligned(fifo, buf, len);
}
+EXPORT_SYMBOL(musb_write_fifo);
void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *buf)
{
@@ -268,6 +269,7 @@ void musb_read_fifo(struct musb_hw_ep *h
if (len > 0)
tusb_fifo_read_unaligned(fifo, buf, len);
}
+EXPORT_SYMBOL(musb_read_fifo);
static struct musb *the_musb;
@@ -1165,7 +1167,7 @@ static const struct musb_platform_ops tu
static u64 tusb_dmamask = DMA_BIT_MASK(32);
-static int __init tusb_probe(struct platform_device *pdev)
+static int tusb_probe(struct platform_device *pdev)
{
struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
struct platform_device *musb;
@@ -1245,18 +1247,18 @@ static struct platform_driver tusb_drive
},
};
-MODULE_DESCRIPTION("TUSB6010 MUSB Glue Layer");
-MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
-MODULE_LICENSE("GPL v2");
+//MODULE_DESCRIPTION("TUSB6010 MUSB Glue Layer");
+//MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
+//MODULE_LICENSE("GPL v2");
-static int __init tusb_init(void)
+int musb_hdrc_glue_init(void)
{
return platform_driver_probe(&tusb_driver, tusb_probe);
}
-subsys_initcall(tusb_init);
+EXPORT_SYMBOL(musb_hdrc_glue_init);
-static void __exit tusb_exit(void)
+void musb_hdrc_glue_exit(void)
{
platform_driver_unregister(&tusb_driver);
}
-module_exit(tusb_exit);
+EXPORT_SYMBOL(musb_hdrc_glue_exit);
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -207,7 +207,7 @@ static struct otg_io_access_ops musb_ulp
/*-------------------------------------------------------------------------*/
-#if !defined(CONFIG_USB_MUSB_TUSB6010) && !defined(CONFIG_USB_MUSB_BLACKFIN)
+#if !defined(CONFIG_USB_MUSB_TUSB6010) && !defined(CONFIG_USB_MUSB_TUSB6010_MODULE) && !defined(CONFIG_USB_MUSB_BLACKFIN)
/*
* Load an endpoint's FIFO
@@ -250,7 +250,7 @@ void musb_write_fifo(struct musb_hw_ep *
}
}
-#if !defined(CONFIG_USB_MUSB_AM35X)
+#if !defined(CONFIG_USB_MUSB_AM35X) && !defined(CONFIG_USB_MUSB_TUSB6010) && !defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
/*
* Unload an endpoint's FIFO
*/
@@ -2370,8 +2370,13 @@ static struct platform_driver musb_drive
/*-------------------------------------------------------------------------*/
+extern int musb_hdrc_glue_init(void);
+extern void musb_hdrc_glue_exit(void);
+
static int __init musb_init(void)
{
+ int err;
+
if (usb_disabled())
return 0;
@@ -2380,7 +2385,17 @@ static int __init musb_init(void)
", "
"otg (peripheral+host)",
musb_driver_name);
- return platform_driver_probe(&musb_driver, musb_probe);
+
+ err = musb_hdrc_glue_init();
+ if (err)
+ return err;
+ err = platform_driver_probe(&musb_driver, musb_probe);
+ if (err) {
+ musb_hdrc_glue_exit();
+ return err;
+ }
+
+ return 0;
}
/* make us init after usbcore and i2c (transceivers, regulators, etc)
@@ -2391,5 +2406,6 @@ fs_initcall(musb_init);
static void __exit musb_cleanup(void)
{
platform_driver_unregister(&musb_driver);
+ musb_hdrc_glue_exit();
}
module_exit(musb_cleanup);
--- a/drivers/usb/Makefile
+++ b/drivers/usb/Makefile
@@ -51,7 +51,7 @@ obj-$(CONFIG_EARLY_PRINTK_DBGP) += early
obj-$(CONFIG_USB_ATM) += atm/
obj-$(CONFIG_USB_SPEEDTOUCH) += atm/
-obj-$(CONFIG_USB_MUSB_HDRC) += musb/
+obj-y += musb/
obj-$(CONFIG_USB_RENESAS_USBHS) += renesas_usbhs/
obj-$(CONFIG_USB_GADGET) += gadget/
--- a/drivers/usb/musb/Makefile
+++ b/drivers/usb/musb/Makefile
@@ -13,7 +13,7 @@ musb_hdrc-$(CONFIG_DEBUG_FS) += musb_d
# Hardware Glue Layer
obj-$(CONFIG_USB_MUSB_OMAP2PLUS) += omap2430.o
obj-$(CONFIG_USB_MUSB_AM35X) += am35x.o
-obj-$(CONFIG_USB_MUSB_TUSB6010) += tusb6010.o
+musb_hdrc-$(subst m,y,$(CONFIG_USB_MUSB_TUSB6010)) += tusb6010.o
obj-$(CONFIG_USB_MUSB_DAVINCI) += davinci.o
obj-$(CONFIG_USB_MUSB_DA8XX) += da8xx.o
obj-$(CONFIG_USB_MUSB_BLACKFIN) += blackfin.o

View File

@ -1,116 +0,0 @@
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -619,7 +619,7 @@ static void omap_device_delete(struct om
* information. Returns ERR_PTR(-EINVAL) if @oh is NULL; otherwise,
* passes along the return value of omap_device_build_ss().
*/
-struct platform_device *omap_device_build(const char *pdev_name, int pdev_id,
+struct platform_device *__init omap_device_build(const char *pdev_name, int pdev_id,
struct omap_hwmod *oh, void *pdata,
int pdata_len,
struct omap_device_pm_latency *pm_lats,
@@ -652,7 +652,7 @@ struct platform_device *omap_device_buil
* platform_device record. Returns an ERR_PTR() on error, or passes
* along the return value of omap_device_register().
*/
-struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
+struct platform_device *__init omap_device_build_ss(const char *pdev_name, int pdev_id,
struct omap_hwmod **ohs, int oh_cnt,
void *pdata, int pdata_len,
struct omap_device_pm_latency *pm_lats,
@@ -717,7 +717,7 @@ odbs_exit:
* platform_early_add_device() on the underlying platform_device.
* Returns 0 by default.
*/
-static int omap_early_device_register(struct platform_device *pdev)
+static int __init omap_early_device_register(struct platform_device *pdev)
{
struct platform_device *devices[1];
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -29,7 +29,7 @@
#define NO_LENGTH_CHECK 0xffffffff
-struct omap_board_config_kernel *omap_board_config __initdata;
+struct omap_board_config_kernel *omap_board_config;
int omap_board_config_size;
unsigned char omap_bootloader_tag[1024];
@@ -58,7 +58,7 @@ __tagtable(ATAG_BOARD, parse_tag_omap);
#endif
-static const void *__init get_config(u16 tag, size_t len,
+static const void *get_config(u16 tag, size_t len,
int skip, size_t *len_out)
{
struct omap_board_config_kernel *kinfo = NULL;
@@ -125,12 +125,12 @@ static const void *__init get_config(u16
return kinfo->data;
}
-const void *__init __omap_get_config(u16 tag, size_t len, int nr)
+const void *__omap_get_config(u16 tag, size_t len, int nr)
{
return get_config(tag, len, nr, NULL);
}
-const void *__init omap_get_var_config(u16 tag, size_t *len)
+const void *omap_get_var_config(u16 tag, size_t *len)
{
return get_config(tag, NO_LENGTH_CHECK, 0, len);
}
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -380,7 +380,7 @@ static inline void omap_init_dmic(void)
#include <plat/mcspi.h>
-static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
+static int __init omap_mcspi_init(struct omap_hwmod *oh, void *unused)
{
struct platform_device *pdev;
char *name = "omap2_mcspi";
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -24,7 +24,7 @@
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
-static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
+static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
{
struct platform_device *pdev;
struct omap_gpio_platform_data *pdata;
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -122,7 +122,7 @@ static int omap3_enable_st_clock(unsigne
return 0;
}
-static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
+static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
{
int id, count = 1;
char *name = "omap-mcbsp";
--- a/arch/arm/plat-omap/include/plat/board.h
+++ b/arch/arm/plat-omap/include/plat/board.h
@@ -159,14 +159,14 @@ struct omap_gpio_switch_config {
int key_code:24; /* Linux key code */
};
-extern const void *__init __omap_get_config(u16 tag, size_t len, int nr);
+extern const void * __omap_get_config(u16 tag, size_t len, int nr);
#define omap_get_config(tag, type) \
((const type *) __omap_get_config((tag), sizeof(type), 0))
#define omap_get_nr_config(tag, type, nr) \
((const type *) __omap_get_config((tag), sizeof(type), (nr)))
-extern const void *__init omap_get_var_config(u16 tag, size_t *len);
+extern const void * omap_get_var_config(u16 tag, size_t *len);
extern struct omap_board_config_kernel *omap_board_config;
extern int omap_board_config_size;

View File

@ -1,31 +0,0 @@
#
# Copyright (C) 2010-2011 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/n810-base
NAME:=Nokia n810 (base)
PACKAGES:= \
block-mount \
gpsd \
ip iw kmod-p54-spi wpa-supplicant \
dnsmasq dropbear \
pwrtray-backend \
kmod-fs-vfat kmod-fs-msdos \
kmod-input-evdev \
kmod-leds-gpio \
kmod-usb-tahvo kmod-usb-eth-gadget \
kmod-usb-net kmod-usb-net-cdc-ether kmod-usb-net-pegasus kmod-usb-net-rndis \
kmod-usb-storage kmod-usb-hid \
kmod-bluetooth kmod-bluetooth-hci-h4p bluez-utils bluez-hcidump \
kmod-n810bm maemo-kexec calvaria \
schedtool
endef
define Profile/n810-base/Description
Minimal package set for Nokia n810 hardware.
endef
$(eval $(call Profile,n810-base))

View File

@ -1,22 +0,0 @@
#
# Copyright (C) 2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/n810-gui
$(call Profile/n810-base)
NAME:=Nokia n810 (GUI)
PACKAGES+= \
xserver-xorg xinit xauth xkeyboard-config xkbdata xterm \
xf86-video-omapfb xf86-input-tslib xf86-input-evdev \
openbox tint2 matchbox-keyboard \
pwrtray
endef
define Profile/n810-gui/Description
Graphical user interface package set for Nokia n810 hardware.
endef
$(eval $(call Profile,n810-gui))

View File

@ -1,24 +0,0 @@
#
# Copyright (C) 2008-2015 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
ARCH:=arm
BOARD:=orion
BOARDNAME:=Marvell Orion
FEATURES:=broken
SUBTARGETS:=generic harddisk
MAINTAINER:=Imre Kaloz <kaloz@openwrt.org>
KERNEL_PATCHVER:=3.18
include $(INCLUDE_DIR)/target.mk
KERNELNAME:=zImage
DEFAULT_PACKAGES += kmod-ath9k kmod-crypto-mv-cesa wpad-mini kmod-i2c-core kmod-i2c-mv64xxx kmod-rtc-isl1208
$(eval $(call BuildTarget))

View File

@ -1,54 +0,0 @@
#!/bin/sh
#
# Copyright (C) 2009-2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
usb_led=''
usb_device=''
led_set_attr() {
[ -f "/sys/class/leds/$1/$2" ] && echo "$3" > "/sys/class/leds/$1/$2"
}
usb_led_set_timer() {
led_set_attr "${usb_led}" 'trigger' 'timer'
led_set_attr "${usb_led}" 'delay_on' "$1"
led_set_attr "${usb_led}" 'delay_off' "$2"
}
usb_led_on() {
led_set_attr "${usb_led}" 'trigger' 'none'
led_set_attr "${usb_led}" 'brightness' 255
}
usb_led_off() {
led_set_attr "${usb_led}" 'trigger' 'none'
led_set_attr "${usb_led}" 'brightness' 0
}
get_usb_led() {
local hardware=`sed -n /Hardware/s/.*:.//p /proc/cpuinfo`
case "${hardware}" in
'Linksys WRT350N v2')
usb_led='wrt350nv2:green:usb'
usb_device='1-1:1.0'
;;
esac;
}
get_usb_led
case "${ACTION}" in
add)
# update LEDs
[ "${usb_device}" = "${DEVICENAME}" ] && usb_led_on
;;
remove)
# update LEDs
[ "${usb_device}" = "${DEVICENAME}" ] && usb_led_off
;;
esac

View File

@ -1,53 +0,0 @@
config_simple() {
cat >> /etc/config/network <<EOF
config interface lan
option ifname eth0
option type bridge
option proto static
option ipaddr 192.168.1.1
option netmask 255.255.255.0
option ip6assign 60
EOF
}
config_dsa() {
cat >> /etc/config/network <<EOF
config interface eth0
option ifname eth0
config interface wan
option ifname wan
option proto dhcp
option hostname openwrt
config interface lan
option ifname "lan1 lan2 lan3 lan4"
option type bridge
option proto static
option ipaddr 192.168.1.1
option netmask 255.255.255.0
option ip6assign 60
config interface wan6
option ifname wan
option proto dhcpv6
config globals globals
option ula_prefix auto
EOF
}
cat > /etc/config/network <<EOF
config interface loopback
option ifname lo
option proto static
option ipaddr 127.0.0.1
option netmask 255.0.0.0
EOF
if grep -q lan /proc/net/dev; then
config_dsa
else
config_simple
fi

View File

@ -1,188 +0,0 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_ORION5X=y
# CONFIG_ARCH_ORION5X_DT is not set
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_ARM=y
# CONFIG_ARM_CPU_SUSPEND is not set
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_ARM_NR_BANKS=8
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARM_THUMB is not set
# CONFIG_ARPD is not set
CONFIG_ATAGS=y
CONFIG_AUTO_ZRELADDR=y
# CONFIG_CACHE_L2X0 is not set
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"
CONFIG_CMDLINE_FORCE=y
CONFIG_COMMON_CLK=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_FEROCEON=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_FEROCEON=y
CONFIG_CPU_FEROCEON_OLD_ID=y
# CONFIG_CPU_ICACHE_DISABLE is not set
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_TLB_FEROCEON=y
CONFIG_CPU_USE_DOMAINS=y
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_DEV_MV_CESA=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set
CONFIG_DEBUG_UART_8250_SHIFT=2
# CONFIG_DEBUG_UART_8250_WORD is not set
CONFIG_DEBUG_UART_PHYS=0xf1012000
CONFIG_DEBUG_UART_VIRT=0xfe012000
# CONFIG_DEBUG_USER is not set
CONFIG_DNOTIFY=y
CONFIG_FRAME_POINTER=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IO=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_DEVRES=y
CONFIG_GPIO_SYSFS=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_PFN_VALID=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_HAVE_BPF_JIT=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DMA_ATTRS=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_GENERIC_HARDIRQS=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_UID16=y
CONFIG_HZ_PERIODIC=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_WORK=y
CONFIG_KTIME_SCALAR=y
CONFIG_LEDS_GPIO=y
# CONFIG_MACH_BIGDISK is not set
# CONFIG_MACH_D2NET is not set
# CONFIG_MACH_D2NET_DT is not set
# CONFIG_MACH_DB88F5281 is not set
# CONFIG_MACH_DNS323 is not set
# CONFIG_MACH_DT2 is not set
# CONFIG_MACH_EDMINI_V2_DT is not set
# CONFIG_MACH_KUROBOX_PRO is not set
# CONFIG_MACH_LINKSTATION_LSCHL is not set
# CONFIG_MACH_LINKSTATION_LS_HGL is not set
# CONFIG_MACH_LINKSTATION_MINI is not set
# CONFIG_MACH_LINKSTATION_PRO is not set
# CONFIG_MACH_MSS2 is not set
# CONFIG_MACH_MSS2_DT is not set
# CONFIG_MACH_MV2120 is not set
# CONFIG_MACH_NET2BIG is not set
# CONFIG_MACH_RD88F5181L_FXO is not set
# CONFIG_MACH_RD88F5181L_GE is not set
# CONFIG_MACH_RD88F5182 is not set
# CONFIG_MACH_RD88F5182_DT is not set
# CONFIG_MACH_RD88F6183AP_GE is not set
# CONFIG_MACH_TERASTATION_PRO2 is not set
# CONFIG_MACH_TS209 is not set
# CONFIG_MACH_TS409 is not set
# CONFIG_MACH_TS78XX is not set
CONFIG_MACH_WN802T=y
CONFIG_MACH_WNR854T=y
CONFIG_MACH_WRT350N_V2=y
CONFIG_MDIO_BOARDINFO=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MV643XX_ETH=y
CONFIG_MVEBU_MBUS=y
CONFIG_MVMDIO=y
# CONFIG_MVNETA is not set
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_KUSER_HELPERS=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_MV88E6131=y
CONFIG_NET_DSA_MV88E6XXX=y
CONFIG_NET_DSA_MV88E6XXX_NEED_PPU=y
CONFIG_NET_DSA_TAG_DSA=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PCI=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PHYLIB=y
CONFIG_PLAT_ORION=y
CONFIG_PLAT_ORION_LEGACY=y
# CONFIG_PREEMPT_RCU is not set
# CONFIG_RCU_STALL_COMMON is not set
CONFIG_SCHED_HRTICK=y
# CONFIG_SCSI_DMA is not set
CONFIG_SPLIT_PTLOCK_CPUS=999999
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_UID16=y
CONFIG_UIDGID_CONVERTED=y
CONFIG_UNCOMPRESS_INCLUDE="mach/uncompress.h"
CONFIG_USB_ARCH_HAS_XHCI=y
CONFIG_USB_SUPPORT=y
CONFIG_VECTORS_BASE=0xffff0000
# CONFIG_VFP is not set
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZONE_DMA_FLAG=0

View File

@ -1,82 +0,0 @@
#ifndef __INC_DT2_COMMON_H
#define __INC_DT2_COMMON_H
#define ATAG_MV_UBOOT 0x41000403
struct tag_mv_uboot {
u32 uboot_version;
u32 tclk;
u32 sysclk;
u32 isUsbHost;
u32 overEthAddr;
u8 dt2_eeprom[256];
};
#define DT2_EEPROM_ADDR 0x50
#define DT2_EEPROM_OFFSET 0
#define DT2_EEPROM_LENGTH 256
#define DT2_SERIAL_NUMBER_DEFAULT "run on default\0"
#define DT2_REVISION_DEFAULT_INIT 0xFF
#define DT2_CONFIG_FLAGS_DEFAULT 0x00
#define _PACKED_ __attribute__((packed))
struct DT2_EEPROM_SD_CONFIG {
unsigned int ram_1;
unsigned int ram_2;
unsigned int ram_3;
unsigned int ram_4;
unsigned char ram_5;
unsigned char ram_6;
unsigned short ram_7;
unsigned int magic_id;
} _PACKED_; // 24 Bytes in total
struct DT2_EEPROM_FC_CONFIG {
unsigned char rtc_sts_mask;
unsigned char rtc_sts_init;
unsigned char rtc_int_mask;
unsigned char rtc_int_init;
unsigned char rtc_atrim_init;
unsigned char rtc_dtrim_init;
unsigned char dummy1;
unsigned char dummy2;
unsigned char dt2_config_flags; /* 0x80 to load rtc_values to RTC */
unsigned char dt2_revision; /* upper nibble is HW, lower nibble is FW */
unsigned char dt2_serial_number[16]; /* Serial number of DT-2 */
} _PACKED_; // 26 Bytes in total
#define CFG_LOAD_RTC_VALUES 0x80
struct DT2_EEPROM_GW_CONFIG {
unsigned int dummy1;
unsigned int dummy2;
unsigned int dummy3;
unsigned char dummy4;
unsigned char tos_video_val1;
unsigned char tos_video_val2;
unsigned char tos_voip_val;
unsigned char qos_igmp_cfg;
unsigned char num_of_ifs;
unsigned short vlan_ports_if[3];
unsigned char mac_addr[3][6];
} _PACKED_; // 42 Bytes in total
#define _SIZE_OF_ALL_STRUCTS_ (sizeof(struct DT2_EEPROM_SD_CONFIG) + sizeof(struct DT2_EEPROM_FC_CONFIG) + sizeof(struct DT2_EEPROM_GW_CONFIG))
// MV = EEPROM - SD - FC - GW - CRC
struct DT2_EEPROM_MV_CONFIG {
unsigned int reg_addr[(DT2_EEPROM_LENGTH - _SIZE_OF_ALL_STRUCTS_ - sizeof(unsigned int)) / (sizeof(unsigned int) * 2)];
unsigned int reg_data[(DT2_EEPROM_LENGTH - _SIZE_OF_ALL_STRUCTS_ - sizeof(unsigned int)) / (sizeof(unsigned int) * 2)];
} _PACKED_;
struct DT2_EEPROM_STRUCT {
struct DT2_EEPROM_MV_CONFIG mv;
struct DT2_EEPROM_SD_CONFIG sd;
struct DT2_EEPROM_FC_CONFIG fc;
struct DT2_EEPROM_GW_CONFIG gw;
unsigned int crc;
} _PACKED_;
#endif

View File

@ -1,445 +0,0 @@
/*
* arch/arm/mach-orion5x/dt2-setup.c
*
* Freecom DataTank Gateway Setup
*
* Copyright (C) 2009 Zintis Petersons <Zintis.Petersons@abcsolutions.lv>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/pci.h>
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/mv643xx_eth.h>
#include <linux/ethtool.h>
#include <linux/if_ether.h>
#include <net/dsa.h>
#include <linux/ata_platform.h>
#include <linux/i2c.h>
#include <linux/reboot.h>
#include <linux/interrupt.h>
#include <asm/mach-types.h>
#include <asm/gpio.h>
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
#include "common.h"
#include "mpp.h"
/*****************************************************************************
* DT2 local
****************************************************************************/
#include <asm/setup.h>
#include "dt2-common.h"
u32 mvUbootVer = 0;
u32 mvTclk = 166666667;
u32 mvSysclk = 200000000;
u32 mvIsUsbHost = 1;
u32 overEthAddr = 0;
u32 gBoardId = -1;
struct DT2_EEPROM_STRUCT dt2_eeprom;
/*****************************************************************************
* DT2 Info
****************************************************************************/
/*
* PCI
*/
#define DT2_PCI_SLOT0_OFFS 7
#define DT2_PCI_SLOT0_IRQ_A_PIN 3
#define DT2_PCI_SLOT0_IRQ_B_PIN 2
#define DT2_PIN_GPIO_SYNC 25
#define DT2_PIN_GPIO_POWER 24
#define DT2_PIN_GPIO_UNPLUG1 23
#define DT2_PIN_GPIO_UNPLUG2 22
#define DT2_PIN_GPIO_RESET 4
#define DT2_NOR_BOOT_BASE 0xf4000000
#define DT2_NOR_BOOT_SIZE SZ_512K
#define DT2_LEDS_BASE 0xfa000000
#define DT2_LEDS_SIZE SZ_1K
/*****************************************************************************
* 512K NOR Flash on Device bus Boot CS
****************************************************************************/
static struct mtd_partition dt2_partitions[] = {
{
.name = "u-boot",
.size = 0x00080000,
.offset = 0,
},
};
static struct physmap_flash_data dt2_nor_flash_data = {
.width = 1, /* 8 bit bus width */
.parts = dt2_partitions,
.nr_parts = ARRAY_SIZE(dt2_partitions)
};
static struct resource dt2_nor_flash_resource = {
.flags = IORESOURCE_MEM,
.start = DT2_NOR_BOOT_BASE,
.end = DT2_NOR_BOOT_BASE + DT2_NOR_BOOT_SIZE - 1,
};
static struct platform_device dt2_nor_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &dt2_nor_flash_data,
},
.resource = &dt2_nor_flash_resource,
.num_resources = 1,
};
/*****************************************************************************
* PCI
****************************************************************************/
void __init dt2_pci_preinit(void)
{
int pin, irq;
/*
* Configure PCI GPIO IRQ pins
*/
pin = DT2_PCI_SLOT0_IRQ_A_PIN;
if (gpio_request(pin, "PCI IntA") == 0) {
if (gpio_direction_input(pin) == 0) {
irq = gpio_to_irq(pin);
irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
printk (KERN_INFO "PCI IntA IRQ: %d\n", irq);
} else {
printk(KERN_ERR "dt2_pci_preinit failed to "
"irq_set_irq_type pin %d\n", pin);
gpio_free(pin);
}
} else {
printk(KERN_ERR "dt2_pci_preinit failed to request gpio %d\n", pin);
}
pin = DT2_PCI_SLOT0_IRQ_B_PIN;
if (gpio_request(pin, "PCI IntB") == 0) {
if (gpio_direction_input(pin) == 0) {
irq = gpio_to_irq(pin);
irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
printk (KERN_INFO "PCI IntB IRQ: %d\n", irq);
} else {
printk(KERN_ERR "dt2_pci_preinit failed to "
"irq_set_irq_type pin %d\n", pin);
gpio_free(pin);
}
} else {
printk(KERN_ERR "dt2_pci_preinit failed to gpio_request %d\n", pin);
}
}
static int __init dt2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
int irq;
/*
* Check for devices with hard-wired IRQs.
*/
irq = orion5x_pci_map_irq(dev, slot, pin);
if (irq != -1){
printk(KERN_INFO "orion5x_pci_map_irq: %d\n", irq);
return irq;
}
/*
* PCI IRQs are connected via GPIOs
*/
switch (slot - DT2_PCI_SLOT0_OFFS) {
case 0:
if (pin == 1){
irq = gpio_to_irq(DT2_PCI_SLOT0_IRQ_A_PIN);
printk(KERN_INFO "dt2_pci_map_irq DT2_PCI_SLOT0_IRQ_A_PIN: %d\n", irq);
}
else {
irq = gpio_to_irq(DT2_PCI_SLOT0_IRQ_B_PIN);
printk(KERN_INFO "dt2_pci_map_irq DT2_PCI_SLOT0_IRQ_B_PIN: %d\n", irq);
}
default:
irq = -1;
printk(KERN_INFO "dt2_pci_map_irq IRQ: %d\n", irq);
}
return irq;
}
static struct hw_pci dt2_pci __initdata = {
.nr_controllers = 2,
.preinit = dt2_pci_preinit,
.setup = orion5x_pci_sys_setup,
.scan = orion5x_pci_sys_scan_bus,
.map_irq = dt2_pci_map_irq,
};
static int __init dt2_pci_init(void)
{
if (machine_is_dt2())
pci_common_init(&dt2_pci);
return 0;
}
subsys_initcall(dt2_pci_init);
/*****************************************************************************
* Ethernet
****************************************************************************/
static struct mv643xx_eth_platform_data dt2_eth_data = {
.phy_addr = MV643XX_ETH_PHY_NONE,
.speed = SPEED_1000,
.duplex = DUPLEX_FULL,
};
static struct dsa_chip_data dt2_switch_chip_data = {
.port_names[0] = "wan",
.port_names[1] = "lan1",
.port_names[2] = "lan2",
.port_names[3] = "cpu",
.port_names[4] = "lan3",
.port_names[5] = "lan4",
};
static struct dsa_platform_data dt2_switch_plat_data = {
.nr_chips = 1,
.chip = &dt2_switch_chip_data,
};
/*****************************************************************************
* RTC ISL1208 on I2C bus
****************************************************************************/
static struct i2c_board_info __initdata dt2_i2c_rtc = {
I2C_BOARD_INFO("isl1208", 0x6F),
};
/*****************************************************************************
* Sata
****************************************************************************/
static struct mv_sata_platform_data dt2_sata_data = {
.n_ports = 2,
};
/*****************************************************************************
* General Setup
****************************************************************************/
static unsigned int dt2_mpp_modes[] __initdata = {
MPP0_GPIO, // RTC interrupt
MPP1_GPIO, // 88e6131 interrupt
MPP2_GPIO, // PCI_intB
MPP3_GPIO, // PCI_intA
MPP4_GPIO, // reset button switch
MPP5_GPIO,
MPP6_GPIO,
MPP7_GPIO,
MPP8_GPIO,
MPP9_GIGE, /* GE_RXERR */
MPP10_GPIO, // usb
MPP11_GPIO, // usb
MPP12_GIGE, // GE_TXD[4]
MPP13_GIGE, // GE_TXD[5]
MPP14_GIGE, // GE_TXD[6]
MPP15_GIGE, // GE_TXD[7]
MPP16_GIGE, // GE_RXD[4]
MPP17_GIGE, // GE_RXD[5]
MPP18_GIGE, // GE_RXD[6]
MPP19_GIGE, // GE_RXD[7]
0,
};
/*****************************************************************************
* LEDS
****************************************************************************/
static struct platform_device dt2_leds = {
.name = "dt2-led",
.id = -1,
};
/****************************************************************************
* GPIO key
****************************************************************************/
static irqreturn_t dt2_reset_handler(int irq, void *dev_id)
{
/* This is the paper-clip reset which does an emergency reboot. */
printk(KERN_INFO "Restarting system.\n");
machine_restart(NULL);
/* This should never be reached. */
return IRQ_HANDLED;
}
static irqreturn_t dt2_power_handler(int irq, void *dev_id)
{
printk(KERN_INFO "Shutting down system.\n");
machine_power_off();
return IRQ_HANDLED;
}
static void __init dt2_init(void)
{
/*
* Setup basic Orion functions. Need to be called early.
*/
orion5x_init();
orion5x_mpp_conf(dt2_mpp_modes);
/*
* Configure peripherals.
*/
orion5x_uart0_init();
orion5x_ehci0_init();
orion5x_ehci1_init();
orion5x_i2c_init();
orion5x_sata_init(&dt2_sata_data);
orion5x_xor_init();
printk(KERN_INFO "U-Boot parameters:\n");
printk(KERN_INFO "Sys Clk = %d, Tclk = %d, BoardID = 0x%02x\n", mvSysclk, mvTclk, gBoardId);
printk(KERN_INFO "Serial: %s\n", dt2_eeprom.fc.dt2_serial_number);
printk(KERN_INFO "Revision: %016x\n", dt2_eeprom.fc.dt2_revision);
printk(KERN_INFO "DT2: Using MAC address %pM for port 0\n",
dt2_eeprom.gw.mac_addr[0]);
printk(KERN_INFO "DT2: Using MAC address %pM for port 1\n",
dt2_eeprom.gw.mac_addr[1]);
orion5x_eth_init(&dt2_eth_data);
memcpy(dt2_eth_data.mac_addr, dt2_eeprom.gw.mac_addr[0], 6);
orion5x_eth_switch_init(&dt2_switch_plat_data, NO_IRQ);
i2c_register_board_info(0, &dt2_i2c_rtc, 1);
mvebu_mbus_add_window("devbus-boot", DT2_NOR_BOOT_BASE,
DT2_NOR_BOOT_SIZE);
platform_device_register(&dt2_nor_flash);
mvebu_mbus_add_window("devbus-cs0", DT2_LEDS_BASE, DT2_LEDS_SIZE);
platform_device_register(&dt2_leds);
if (request_irq(gpio_to_irq(DT2_PIN_GPIO_RESET), &dt2_reset_handler,
IRQF_DISABLED | IRQF_TRIGGER_LOW,
"DT2: Reset button", NULL) < 0) {
printk("DT2: Reset Button IRQ %d not available\n",
gpio_to_irq(DT2_PIN_GPIO_RESET));
}
if (request_irq(gpio_to_irq(DT2_PIN_GPIO_POWER), &dt2_power_handler,
IRQF_DISABLED | IRQF_TRIGGER_LOW,
"DT2: Power button", NULL) < 0) {
printk(KERN_DEBUG "DT2: Power Button IRQ %d not available\n",
gpio_to_irq(DT2_PIN_GPIO_POWER));
}
}
static int __init parse_tag_dt2_uboot(const struct tag *t)
{
struct tag_mv_uboot *mv_uboot;
// Get pointer to our block
mv_uboot = (struct tag_mv_uboot*)&t->u;
mvTclk = mv_uboot->tclk;
mvSysclk = mv_uboot->sysclk;
mvUbootVer = mv_uboot->uboot_version;
mvIsUsbHost = mv_uboot->isUsbHost;
// Some clock fixups
if(mvTclk == 166000000) mvTclk = 166666667;
else if(mvTclk == 133000000) mvTclk = 133333333;
else if(mvSysclk == 166000000) mvSysclk = 166666667;
gBoardId = (mvUbootVer & 0xff);
//DT2 specific data
memcpy(&dt2_eeprom, mv_uboot->dt2_eeprom, sizeof(struct DT2_EEPROM_STRUCT));
return 0;
}
__tagtable(ATAG_MV_UBOOT, parse_tag_dt2_uboot);
/*
* This is OpenWrt specific fixup. It includes code from original "tag_fixup_mem32" to
* fixup bogus memory tags and also fixes kernel cmdline by adding " init=/etc/preinit"
* at the end. It is important to flash OpenWrt image from original Freecom firmware.
*
* Vanilla kernel should use "tag_fixup_mem32" function.
*/
void __init openwrt_fixup(struct tag *t, char **from, struct meminfo *meminfo)
{
char *p = NULL;
static char openwrt_init_tag[] __initdata = " init=/etc/preinit";
for (; t->hdr.size; t = tag_next(t)){
/* Locate the Freecom cmdline */
if (t->hdr.tag == ATAG_CMDLINE) {
p = t->u.cmdline.cmdline;
printk("%s(%d): Found cmdline '%s' at 0x%0lx\n",
__FUNCTION__, __LINE__, p, (unsigned long)p);
}
/*
* Many orion-based systems have buggy bootloader implementations.
* This is a common fixup for bogus memory tags.
*/
if (t->hdr.tag == ATAG_MEM &&
(!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
t->u.mem.start & ~PAGE_MASK)) {
printk(KERN_WARNING
"Clearing invalid memory bank %dKB@0x%08x\n",
t->u.mem.size / 1024, t->u.mem.start);
t->hdr.tag = 0;
}
}
printk("%s(%d): End of table at 0x%0lx\n", __FUNCTION__, __LINE__, (unsigned long)t);
/* Overwrite the end of the table with a new cmdline tag. */
t->hdr.tag = ATAG_CMDLINE;
t->hdr.size =
(sizeof (struct tag_header) +
strlen(p) + strlen(openwrt_init_tag) + 1 + 4) >> 2;
strlcpy(t->u.cmdline.cmdline, p, COMMAND_LINE_SIZE);
strlcpy(t->u.cmdline.cmdline + strlen(p), openwrt_init_tag,
COMMAND_LINE_SIZE - strlen(p));
printk("%s(%d): New cmdline '%s' at 0x%0lx\n",
__FUNCTION__, __LINE__,
t->u.cmdline.cmdline, (unsigned long)t->u.cmdline.cmdline);
t = tag_next(t);
printk("%s(%d): New end of table at 0x%0lx\n", __FUNCTION__, __LINE__, (unsigned long)t);
t->hdr.tag = ATAG_NONE;
t->hdr.size = 0;
}
/* Warning: Freecom uses their own custom bootloader with mach-type (=1500) */
MACHINE_START(DT2, "Freecom DataTank Gateway")
/* Maintainer: Zintis Petersons <Zintis.Petersons@abcsolutions.lv> */
.atag_offset = 0x100,
.init_machine = dt2_init,
.map_io = orion5x_map_io,
.init_irq = orion5x_init_irq,
.init_time = orion5x_timer_init,
.fixup = openwrt_fixup, //tag_fixup_mem32,
MACHINE_END

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@ -1,54 +0,0 @@
#!/bin/sh
#
# Copyright (C) 2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
#
# This script sets system defaults for the hardware on firstboot
#
local hardware=`sed -n /Hardware/s/.*:.//p /proc/cpuinfo`
wrt350nv2_default() {
# leds
uci batch <<__EOF
set system.power_led=led
set system.power_led.name='Power LED (green)'
set system.power_led.sysfs='wrt350nv2:green:power'
set system.power_led.default='1'
set system.wifi_led=led
set system.wifi_led.name='Wireless LED (green)'
set system.wifi_led.sysfs='wrt350nv2:green:wireless'
set system.wifi_led.trigger='netdev'
set system.wifi_led.dev='wlan0'
set system.wifi_led.mode='link tx rx'
set system.wifi_led.default='0'
commit system
__EOF
# add mac address from U-Boot partition to lan and wan devices
MTD=`grep -e 'u-boot' /proc/mtd`
MTD=`echo ${MTD} | sed 's/[a-z]*\([0-9]*\):.*/\1/'`
[ -n "${MTD}" ] && {
MACADDR=`dd if=/dev/mtdblock${MTD} bs=1 skip=262048 count=6 2>/dev/null | hexdump -e '1/1 "%02x"'`
MACADDR2=$(( 0x${MACADDR} + 1))
MACADDR2=`printf "%012x" ${MACADDR2}`
MACADDR=`echo ${MACADDR} | sed 's/\(..\)/\1:/g' | sed 's/:$//'`
MACADDR2=`echo ${MACADDR2} | sed 's/\(..\)/\1:/g' | sed 's/:$//'`
uci set network.eth0.macaddr=${MACADDR}
uci set network.lan.macaddr=${MACADDR}
uci set network.wan.macaddr=${MACADDR2}
uci commit network
}
}
case "${hardware}" in
'Linksys WRT350N v2')
wrt350nv2_default
;;
esac

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@ -1,38 +0,0 @@
#
# Copyright (C) 2010-2011 OpenWrt.org
#
# use default "image" for PART_NAME
# use default for platform_do_upgrade()
platform_check_image() {
[ "${ARGC}" -gt 1 ] && { echo 'Too many arguments. Only flash file expected.'; return 1; }
local hardware=`sed -n /Hardware/s/.*:.//p /proc/cpuinfo`
local magic="$(get_magic_word "$1")"
local magic_long="$(get_magic_long "$1")"
case "${hardware}" in
# hardware with a direct uImage partition
# image header format as described in U-Boot's include/image.h
# see http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=blob;f=include/image.h
'Linksys WRT350N v2')
[ "${magic_long}" != '27051956' ] && {
echo "Invalid image type ${magic_long}."
return 1
}
return 0
;;
# Netgear WNR854T (has uImage as file inside a JFFS2 partition)
'Netgear WNR854T')
[ "${magic}" != '8519' ] && {
echo "Invalid image type ${magic}."
return 1
}
return 0
;;
esac
echo "Sysupgrade is not yet supported on ${hardware}."
return 1
}

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@ -1,14 +0,0 @@
#
# Copyright (C) 2008-2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
BOARDNAME:=Generic
FEATURES:=squashfs
define Target/Description
Build firmware images for Marvell Orion based boards that boot from internal flash.
(e.g.: Linksys WRT350N v2, Netgear WNR854T, ...)
endef

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@ -1,38 +0,0 @@
CONFIG_ATA=y
CONFIG_BLK_DEV_DM=y
CONFIG_BLK_DEV_MD=y
CONFIG_BLK_DEV_SD=y
CONFIG_CRC16=y
# CONFIG_DM_CRYPT is not set
# CONFIG_DM_MIRROR is not set
# CONFIG_DM_SNAPSHOT is not set
CONFIG_EXT4_FS=y
CONFIG_FS_MBCACHE=y
CONFIG_HWMON=y
CONFIG_I2C_BOARDINFO=y
CONFIG_JBD2=y
CONFIG_MACH_DT2=y
CONFIG_MACH_NET2BIG=y
# CONFIG_MACH_WN802T is not set
# CONFIG_MACH_WNR854T is not set
# CONFIG_MACH_WRT350N_V2 is not set
CONFIG_MD=y
CONFIG_MD_AUTODETECT=y
CONFIG_MD_LINEAR=y
# CONFIG_MD_MULTIPATH is not set
CONFIG_MD_RAID0=y
CONFIG_MD_RAID1=y
# CONFIG_MD_RAID10 is not set
# CONFIG_MD_RAID456 is not set
CONFIG_NLS=y
CONFIG_RTC_CLASS=y
CONFIG_SATA_MV=y
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
CONFIG_USB=y
CONFIG_USB_COMMON=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_HCD_ORION=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_STORAGE=y
# CONFIG_USB_UHCI_HCD is not set

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@ -1,14 +0,0 @@
#
# Copyright (C) 2008-2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
BOARDNAME:=Internal Hard-Disk
FEATURES:=targz
define Target/Description
Build firmware images for Marvell Orion based boards that boot directly from internal disk storage.
(e.g.: Freecom DataTank 2, ...)
endef

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@ -1,12 +0,0 @@
#
# Copyright (C) 2008-2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/image.mk
include $(SUBTARGET).mk
$(eval $(call BuildImage))

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@ -1,230 +0,0 @@
#
# Copyright (C) 2008-2015 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
### DO NOT INDENT LINES CONTAINING $(call xyz) AS THIS MAY CHANGE THE CONTEXT
### OF THE FIRST LINE IN THE CALLED VARIABLE (NOTE: variable!)
### see http://www.gnu.org/software/make/manual/html_node/Call-Function.html#Call-Function
### ACTUALLY IT IS A SIMPLE MACRO EXPANSION
### use round brackets for make variables, and curly brackets for shell variables
## Kernel mtd partition size in KiB
KERNEL_MTD_SIZE:=1280
# Netgear WNR854T: erase size is 128KiB = 0x00020000 = 131072
ERASE_SIZE_128K:=128
# Linksys WRT350N v2: erase size is 64KiB = 0x00010000 = 65536
ERASE_SIZE_64K:=64
# define JFFS2 sizes for include/image.mk
JFFS2_BLOCKSIZE:=64k 128k
###
### Image/BuildKernel
###
define Image/BuildKernel
### Dummy comment for indented calls of Image/BuildKernel
## Netgear WN802T: mach id 3306 (0x0cea)
$(call Image/BuildKernel/ARM/zImage,wn802t,"\x0c\x1c\xa0\xe3\xea\x10\x81\xe3")
$(call Image/BuildKernel/ARM/uImage,wn802t)
ifeq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),y)
$(call Image/BuildKernel/ARM/zImage,wn802t,"\x0c\x1c\xa0\xe3\xea\x10\x81\xe3",-initramfs)
$(call Image/BuildKernel/ARM/uImage,wn802t,-initramfs)
endif
ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),y) # nothing more to do for a ramdisk build
$(call Image/BuildKernel/JFFS2uImage,wn802t,$(ERASE_SIZE_64K),uImage)
$(call Image/Default/FileSizeCheck,$(KDIR)/wn802t-uImage.jffs2,$(shell expr $(KERNEL_MTD_SIZE) \* 1024))
endif
## Netgear WNR854T: mach id 1801 (0x0709)
$(call Image/BuildKernel/ARM/zImage,wnr854t,"\x07\x1c\xa0\xe3\x09\x10\x81\xe3")
$(call Image/BuildKernel/ARM/uImage,wnr854t)
ifeq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),y)
$(call Image/BuildKernel/ARM/zImage,wnr854t,"\x07\x1c\xa0\xe3\x09\x10\x81\xe3",-initramfs)
$(call Image/BuildKernel/ARM/uImage,wnr854t,-initramfs)
endif
ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),y) # nothing more to do for a ramdisk build
$(call Image/BuildKernel/JFFS2uImage,wnr854t,$(ERASE_SIZE_128K),uImage)
$(call Image/Default/FileSizeCheck,$(KDIR)/wnr854t-uImage.jffs2,$(shell expr $(KERNEL_MTD_SIZE) \* 1024))
endif
## Linksys WRT350N v2: mach id 1633 (0x0661)
$(call Image/BuildKernel/ARM/zImage,wrt350nv2,"\x06\x1c\xa0\xe3\x61\x10\x81\xe3")
$(call Image/BuildKernel/ARM/uImage,wrt350nv2)
ifeq ($($CONFIG_TARGET_ROOTFS_INITRAMFS),y)
$(call Image/BuildKernel/ARM/zImage,wrt350nv2,"\x06\x1c\xa0\xe3\x61\x10\x81\xe3",-initramfs)
$(call Image/BuildKernel/ARM/uImage,wrt350nv2-initramfs)
endif
ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),y) # nothing more to do for a ramdisk build
$(call Image/Default/FileSizeCheck,$(KDIR)/wrt350nv2-uImage,$(shell expr $(KERNEL_MTD_SIZE) \* 1024))
endif
endef
define Image/BuildKernel/ARM/zImage
# merge machine id and regular zImage into one file
# parameters: 1 = machine name, 2 = machine id as string in quotes
# $(BOARD) kernel zImage for $(1)
echo -en $(2) > '$(KDIR)/$(1)-zImage$(3)'
cat '$(KDIR)/zImage$(3)' >> '$(KDIR)/$(1)-zImage$(3)'
endef
define Image/BuildKernel/ARM/uImage
# create uImage from zImage
# parameters: 1 = machine name
# $(BOARD) kernel uImage for $(1)
'$(STAGING_DIR_HOST)/bin/mkimage' -A arm -O linux -T kernel \
-C none -a 0x00008000 -e 0x00008000 -n 'Linux-$(LINUX_VERSION)' \
-d '$(KDIR)/$(1)-zImage$(2)' '$(KDIR)/$(1)-uImage$(2)'
ifeq ($(2),-initramfs) # only copy uImage for ramdisk build
cp '$(KDIR)/$(1)-uImage-initramfs' '$(BIN_DIR)/openwrt-$(1)-uImage-initramfs'
endif
endef
define Image/BuildKernel/JFFS2uImage
# create JFFS2 partition with uImage file (result is already padded to erase size)
# parameters: 1 = machine name, 2 = erase size in KiB, 3 = uImage file name
# $(BOARD) kernel uImage for $(1) in JFFS2-$(2)k partition
rm -rf '$(TMP_DIR)/$(1)_jffs2_uimage'
mkdir '$(TMP_DIR)/$(1)_jffs2_uimage'
cp '$(KDIR)/$(1)-uImage' '$(TMP_DIR)/$(1)_jffs2_uimage/$(3)'
$(STAGING_DIR_HOST)/bin/mkfs.jffs2 --compression-mode=none --pad --little-endian --squash -e $(2)KiB -o '$(KDIR)/$(1)-uImage.jffs2' -d '$(TMP_DIR)/$(1)_jffs2_uimage'
rm -rf '$(TMP_DIR)/$(1)_jffs2_uimage'
endef
define Image/Default/FileSizeCheck
# parameters: 1 = file path, 2 = maximum size in bytes
[ `stat -c %s '$(1)'` -le $(2) ] || { echo ' ERROR: $(1) too big (> $(2) bytes)'; exit 1; }
endef
###
### Image/Build
###
define Image/Build
### Dummy comment for indented calls of Image/Build with $(1)
## Prepare rootfs
$(call Image/Build/$(1),$(1))
## Netgear WN802T
$(call Image/Build/Default,$(1),wn802t,$(ERASE_SIZE_64K),$(KERNEL_MTD_SIZE),.jffs2,NG_WN802T)
## Netgear WNR854T
$(call Image/Build/Default,$(1),wnr854t,$(ERASE_SIZE_128K),$(KERNEL_MTD_SIZE),.jffs2,NG_WNR854T)
## Linksys WRT350N v2
$(call Image/Build/Linksys/wrt350nv2,$(1),wrt350nv2,$(ERASE_SIZE_64K),$(KERNEL_MTD_SIZE),)
endef
define Image/Build/squashfs
$(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
endef
## generate defines for all JFFS2 block sizes
define Image/Build/jffs2/sub
$(eval define Image/Build/jffs2-$(1)
cp '$$(KDIR)/root.jffs2-$(1)' '$$(BIN_DIR)/$$(IMG_PREFIX)-root.jffs2-$(1)'
endef)
endef
$(foreach SZ,$(JFFS2_BLOCKSIZE),$(call Image/Build/jffs2/sub,$(SZ)))
define Image/Build/Default
# parameters: 1 = rootfs type, 2 = machine name, 3 = erase size in KiB, 4 = kernel mtd size in KiB, 5 = kernel file suffix, 6 = header
ifeq ($(findstring jffs2-,$(1)),jffs2-) # JFFS2: build only image fitting to erase size
ifeq ($(1),jffs2-$(3)k)
$(call Image/Build/Default/sysupgrade,$(1),$(2),$(4),$(5))
$(call Image/Build/Default/factory,$(1),$(2),$(6))
endif
else
ifeq ($(1),ext4) # EXT4: ignore
# do nothing
else # do all other images
$(call Image/Build/Default/sysupgrade,$(1),$(2),$(4),$(5))
$(call Image/Build/Default/factory,$(1),$(2),$(6))
endif
endif
endef
define Image/Build/Default/sysupgrade
# parameters: 1 = rootfs type, 2 = machine name, 3 = pad size in KiB (kernel mtd size or erase size), 4 = kernel file suffix
# $(BOARD) $(1) sysupgrade image for $(2)
( \
dd if='$(KDIR)/$(2)-uImage$(4)' bs=$(3)k conv=sync; \
dd if='$(KDIR)/root.$(1)'; \
) > '$(BIN_DIR)/openwrt-$(2)-$(1)-sysupgrade.img'
endef
define Image/Build/Default/factory
# parameters: 1 = rootfs type, 2 = machine name, 3 = header
# $(BOARD) $(1) factory upgrade image for $(2)
'$(STAGING_DIR_HOST)/bin/add_header' $(3) '$(BIN_DIR)/openwrt-$(2)-$(1)-sysupgrade.img' '$(BIN_DIR)/openwrt-$(2)-$(1)-factory.img'
endef
##
## Image/Build/Linksys
##
define Image/Build/Linksys/wrt350nv2
# parameters: 1 = rootfs type, 2 = machine name, 3 = erase size in KiB, 4 = kernel mtd size in KiB, 5 = kernel file suffix
ifeq ($(findstring jffs2-,$(1)),jffs2-) # JFFS2: build only image fitting to erase size
ifeq ($(1),jffs2-$(3)k)
$(call Image/Build/Default/sysupgrade,$(1),$(2),$(4),$(5))
$(call Image/Build/Linksys/wrt350nv2-builder,$(1),$(2))
endif
else
ifeq ($(1),ext4) # EXT4: ignore
# do nothing
else # do all other images
$(call Image/Build/Default/sysupgrade,$(1),$(2),$(4),$(5))
$(call Image/Build/Linksys/wrt350nv2-builder,$(1),$(2))
endif
endif
endef
define Image/Build/Linksys/wrt350nv2-builder
# parameters: 1 = rootfs type, 2 = machine name
# $(BOARD) $(1) factory and recovery image for $(2) via wrt350nv2-builder
rm -rf '$(TMP_DIR)/$(2)_factory'
mkdir '$(TMP_DIR)/$(2)_factory'
# create parameter file
echo ':image 0 $(BIN_DIR)/openwrt-$(2)-$(1)-sysupgrade.img' > '$(TMP_DIR)/$(2)_factory/$(2).par'
[ ! -f '$(STAGING_DIR_HOST)/share/wrt350nv2-builder/u-boot.bin' ] || ( \
echo ':u-boot 0 $(STAGING_DIR_HOST)/share/wrt350nv2-builder/u-boot.bin' >> '$(TMP_DIR)/$(2)_factory/$(2).par'; \
)
echo '#version 0x2020' >> '$(TMP_DIR)/$(2)_factory/$(2).par'
# create bin file for recovery and factory image
( \
cd '$(TMP_DIR)/$(2)_factory'; \
'$(STAGING_DIR_HOST)/bin/wrt350nv2-builder' -b '$(TMP_DIR)/$(2)_factory/$(2).par'; \
)
# copy bin file as recovery image
$(CP) '$(TMP_DIR)/$(2)_factory/wrt350n.bin' '$(BIN_DIR)/openwrt-$(2)-$(1)-recovery.bin'
# create factory image for stock firmware update mechanism
( \
cd '$(TMP_DIR)/$(2)_factory'; \
zip 'wrt350n.zip' 'wrt350n.bin'; \
)
'$(STAGING_DIR_HOST)/bin/wrt350nv2-builder' -z '$(TMP_DIR)/$(2)_factory/wrt350n.zip' '$(BIN_DIR)/openwrt-$(2)-$(1)-factory.img'
rm -rf '$(TMP_DIR)/$(2)_factory'
endef
###
### Image/PreReq
###
## Dependency for WRT350N v2 factory image
$(eval $(call RequireCommand,zip, \
Please install zip. \
))

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@ -1,57 +0,0 @@
#
# Copyright (C) 2008-2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Image/BuildKernelMachId
echo -en "\x$(2)\x1c\xa0\xe3\x$(3)\x10\x81\xe3" > $(KDIR)/$(1)-zImage
cat $(LINUX_DIR)/arch/arm/boot/zImage >> $(KDIR)/$(1)-zImage
$(STAGING_DIR_HOST)/bin/mkimage -A arm -O linux -T kernel \
-C none -a 0x00008000 -e 0x00008000 -n 'Linux-$(LINUX_VERSION)' \
-d $(KDIR)/$(1)-zImage $(KDIR)/$(1)-uImage
cp $(KDIR)/$(1)-uImage $(BIN_DIR)/openwrt-$(1)-uImage
endef
define Image/BuildKernel
# Orion Kernel uImages
# DT2: mach id 1514 (0x5EA)
$(call Image/BuildKernelMachId,dt2,05,ea)
# LaCie 2big Network: mach id 2342 (0x926)
$(call Image/BuildKernelMachId,net2big,09,26)
endef
define Image/Build/Freecom
# Orion Freecom Images
# backup unwanted files
rm -rf ${TMP_DIR}/$2_backup
mkdir ${TMP_DIR}/$2_backup
-mv $(TARGET_DIR)/{var,jffs,rom} ${TMP_DIR}/$2_backup
# add extra files
$(INSTALL_DIR) $(TARGET_DIR)/boot
# TODO: Add special CMDLINE shim for webupgrade image here
$(CP) $(KDIR)/dt2-uImage $(TARGET_DIR)/boot/uImage
$(INSTALL_DIR) $(TARGET_DIR)/var
# create image
$(TAR) cfj $(BIN_DIR)/openwrt-$(2)-$(1).img --numeric-owner --owner=0 --group=0 -C $(TARGET_DIR)/ .
$(STAGING_DIR_HOST)/bin/encode_crc $(BIN_DIR)/openwrt-$(2)-$(1).img $(BIN_DIR)/openwrt-$(2)-$(1)-webupgrade.img $(3)
# remove extra files
rm -rf $(TARGET_DIR)/{boot,var}
# recover unwanted files
-mv ${TMP_DIR}/$2_backup/* $(TARGET_DIR)/
rm -rf ${TMP_DIR}/$2_backup
endef
define Image/Build
$(call Image/Build/$(1),$(1))
$(call Image/Build/Freecom,$(1),dt2,DT,$(1))
endef
define Image/Build/squashfs
$(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
( \
dd if=$(KDIR)/uImage bs=1024k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=128k conv=sync; \
) > $(BIN_DIR)/$(IMG_PREFIX)-$(1).img
endef

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@ -1,32 +0,0 @@
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -134,11 +134,11 @@ static struct mtd_partition wrt350n_v2_n
{
.name = "kernel",
.offset = 0x00000000,
- .size = 0x00760000,
+ .size = 0x00140000, // change to kernel mtd size here (1/3)
}, {
.name = "rootfs",
- .offset = 0x001a0000,
- .size = 0x005c0000,
+ .offset = 0x00140000, // change to kernel mtd size here (2/3)
+ .size = 0x00610000, // adopt to kernel mtd size here (3/3) = 0x00750000 - <kernel mtd size>
}, {
.name = "lang",
.offset = 0x00760000,
@@ -151,6 +151,14 @@ static struct mtd_partition wrt350n_v2_n
.name = "u-boot",
.offset = 0x007c0000,
.size = 0x00040000,
+ }, {
+ .name = "eRcOmM_do_not_touch",
+ .offset = 0x00750000,
+ .size = 0x00010000, // erasesize
+ }, {
+ .name = "image", // for sysupgrade
+ .offset = 0x00000000,
+ .size = 0x00750000,
},
};

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@ -1,25 +0,0 @@
--- a/arch/arm/mach-orion5x/wnr854t-setup.c
+++ b/arch/arm/mach-orion5x/wnr854t-setup.c
@@ -57,15 +57,19 @@ static struct mtd_partition wnr854t_nor_
{
.name = "kernel",
.offset = 0x00000000,
- .size = 0x00100000,
+ .size = 0x00140000,
}, {
.name = "rootfs",
- .offset = 0x00100000,
- .size = 0x00660000,
+ .offset = 0x00140000,
+ .size = 0x00620000,
}, {
.name = "uboot",
.offset = 0x00760000,
.size = 0x00040000,
+ }, {
+ .name = "image", // for sysupgrade
+ .offset = 0x00000000,
+ .size = 0x00760000,
},
};

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@ -1,26 +0,0 @@
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -36,6 +36,13 @@ config MACH_RD88F5182_DT
Say 'Y' here if you want your kernel to support the Marvell
Orion-NAS (88F5182) RD2, Flattened Device Tree.
+config MACH_DT2
+ bool "Freecom DataTank Gateway"
+ select I2C_BOARDINFO
+ help
+ Say 'Y' here if you want your kernel to support the
+ Freecom DataTank Gateway
+
config MACH_KUROBOX_PRO
bool "KuroBox Pro"
select I2C_BOARDINFO
--- a/arch/arm/mach-orion5x/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_MACH_TS78XX) += ts78xx-setu
obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o
obj-$(CONFIG_MACH_NET2BIG) += net2big-setup.o
obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o
+obj-$(CONFIG_MACH_DT2) += dt2-setup.o
obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o
obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o
obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o

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@ -1,78 +0,0 @@
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -144,10 +144,13 @@ config MACH_MSS2_DT
Maxtor Shared Storage II platform.
config MACH_WNR854T
- bool "Netgear WNR854T"
+ bool "Netgear WNR854T / WN802T"
help
Say 'Y' here if you want your kernel to support the
- Netgear WNR854T platform.
+ Netgear WNR854T or WN802T platform.
+
+config MACH_WN802T
+ def_bool MACH_WNR854T
config MACH_RD88F5181L_GE
bool "Marvell Orion-VoIP GE Reference Design"
--- a/arch/arm/mach-orion5x/wnr854t-setup.c
+++ b/arch/arm/mach-orion5x/wnr854t-setup.c
@@ -115,6 +115,15 @@ static struct dsa_platform_data wnr854t_
.chip = &wnr854t_switch_chip_data,
};
+static struct dsa_chip_data wn802t_switch_chip_data = {
+ .port_names[2] = "wan",
+ .port_names[3] = "cpu",
+};
+
+static struct dsa_platform_data wn802t_switch_plat_data = {
+ .nr_chips = 1,
+ .chip = &wn802t_switch_chip_data,
+};
static void __init wnr854t_init(void)
{
/*
@@ -128,7 +137,12 @@ static void __init wnr854t_init(void)
* Configure peripherals.
*/
orion5x_eth_init(&wnr854t_eth_data);
- orion5x_eth_switch_init(&wnr854t_switch_plat_data, NO_IRQ);
+
+ if (machine_is_wn802t())
+ orion5x_eth_switch_init(&wn802t_switch_plat_data, NO_IRQ);
+ else
+ orion5x_eth_switch_init(&wnr854t_switch_plat_data, NO_IRQ);
+
orion5x_uart0_init();
mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
@@ -168,7 +182,7 @@ static struct hw_pci wnr854t_pci __initd
static int __init wnr854t_pci_init(void)
{
- if (machine_is_wnr854t())
+ if (machine_is_wnr854t() || machine_is_wn802t())
pci_common_init(&wnr854t_pci);
return 0;
@@ -179,6 +193,18 @@ MACHINE_START(WNR854T, "Netgear WNR854T"
/* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
.atag_offset = 0x100,
.init_machine = wnr854t_init,
+ .map_io = orion5x_map_io,
+ .init_early = orion5x_init_early,
+ .init_irq = orion5x_init_irq,
+ .init_time = orion5x_timer_init,
+ .fixup = tag_fixup_mem32,
+ .restart = orion5x_restart,
+MACHINE_END
+
+MACHINE_START(WN802T, "Netgear WN802T")
+ /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
+ .atag_offset = 0x100,
+ .init_machine = wnr854t_init,
.map_io = orion5x_map_io,
.init_early = orion5x_init_early,
.init_irq = orion5x_init_irq,

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@ -1,26 +0,0 @@
#
# Copyright (C) 2008-2015 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
ARCH:=powerpc
BOARD:=ppc40x
BOARDNAME:=AMCC/IBM PPC40x
FEATURES:=squashfs broken
CPU_TYPE:=405
MAINTAINER:=Imre Kaloz <kaloz@openwrt.org>
KERNEL_PATCHVER:=3.18
include $(INCLUDE_DIR)/target.mk
define Target/Description
Build firmware images for AMCC/IBM PPC40x based boards.
endef
KERNELNAME:=uImage cuImage.magicbox cuImage.openrb
$(eval $(call BuildTarget))

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@ -1,11 +0,0 @@
#!/bin/sh
#
# Copyright (C) 2010 OpenWrt.org
#
ppc40x_board_name() {
local model
model=$(awk 'BEGIN{FS="[ \t]+:[ \t]"} /model/ {print $2}' /proc/cpuinfo)
echo $model
}

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@ -1,38 +0,0 @@
#
# Copyright (C) 2010 OpenWrt.org
#
. /lib/ppc40x.sh
PART_NAME=firmware
RAMFS_COPY_DATA=/lib/ppc40x.sh
platform_check_image() {
local board=$(ppc40x_board_name)
local magic="$(get_magic_word "$1")"
[ "$#" -gt 1 ] && return 1
case "$board" in
kilauea | openrb | magicbox)
[ "$magic" != "2705" ] && {
echo "Invalid image type."
return 1
}
return 0
;;
esac
echo "Sysupgrade is not yet supported on $board."
return 1
}
platform_do_upgrade() {
local board=$(ppc40x_board_name)
case "$board" in
*)
default_do_upgrade "$ARGV"
;;
esac
}

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@ -1,235 +0,0 @@
CONFIG_405EX=y
CONFIG_40x=y
# CONFIG_44x is not set
CONFIG_4xx=y
CONFIG_4xx_SOC=y
# CONFIG_ACADIA is not set
# CONFIG_ADVANCED_OPTIONS is not set
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
CONFIG_ARCH_HAS_ILOG2_U32=y
CONFIG_ARCH_HAS_SG_CHAIN=y
CONFIG_ARCH_HAS_WALK_MEMORY=y
CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
# CONFIG_ARCH_RANDOM is not set
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
CONFIG_AUDIT_ARCH=y
CONFIG_BOUNCE=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="console=ttyS0,115200 rootfstype=squashfs,jffs2 noinitrd"
CONFIG_CMDLINE_BOOL=y
CONFIG_CONSISTENT_SIZE=0x00200000
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CRYPTO_SHA1_PPC is not set
# CONFIG_DEFAULT_UIMAGE is not set
CONFIG_DTC=y
# CONFIG_E200 is not set
CONFIG_EARLY_PRINTK=y
# CONFIG_EP405 is not set
# CONFIG_EPAPR_BOOT is not set
CONFIG_EXTRA_TARGETS="uImage"
# CONFIG_FSL_ULI1575 is not set
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
# CONFIG_GENERIC_CSUM is not set
CONFIG_GENERIC_IO=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_ISA_DMA=y
CONFIG_GENERIC_NVRAM=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
# CONFIG_GENERIC_TBSYNC is not set
CONFIG_GENERIC_TIME_VSYSCALL_OLD=y
# CONFIG_GEN_RTC is not set
# CONFIG_GE_FPGA is not set
CONFIG_GPIOLIB=y
CONFIG_GPIO_DEVRES=y
CONFIG_GPIO_SYSFS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
# CONFIG_HAS_RAPIDIO is not set
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DMA_ATTRS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
# CONFIG_HOTFOOT is not set
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_HZ_PERIODIC=y
CONFIG_IBM_EMAC=y
CONFIG_IBM_EMAC_EMAC4=y
CONFIG_IBM_EMAC_POLL_WEIGHT=32
CONFIG_IBM_EMAC_RGMII=y
CONFIG_IBM_EMAC_RXB=256
CONFIG_IBM_EMAC_RX_COPY_THRESHOLD=256
CONFIG_IBM_EMAC_RX_SKB_HEADROOM=0
CONFIG_IBM_EMAC_TXB=256
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_IOMMU_HELPER is not set
# CONFIG_IPIC is not set
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_ISA_DMA_API=y
CONFIG_KERNEL_START=0xc0000000
CONFIG_KILAUEA=y
CONFIG_LIBFDT=y
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_MAGICBOX=y
# CONFIG_MAKALU is not set
# CONFIG_MATH_EMULATION is not set
# CONFIG_MMIO_NVRAM is not set
CONFIG_MODULES_USE_ELF_RELA=y
# CONFIG_MPIC is not set
# CONFIG_MPIC_U3_HT_IRQS is not set
# CONFIG_MPIC_WEIRD is not set
CONFIG_MTD_CFI_ADV_OPTIONS=y
# CONFIG_MTD_CFI_GEOMETRY is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_UIMAGE_FW=y
CONFIG_NEED_DMA_MAP_STATE=y
# CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK is not set
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NEED_SG_DMA_LENGTH=y
# CONFIG_NONSTATIC_KERNEL is not set
CONFIG_NOT_COHERENT_CACHE=y
CONFIG_NR_IRQS=512
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_ADDRESS_PCI=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_MTD=y
CONFIG_OF_NET=y
CONFIG_OF_PCI=y
CONFIG_OF_PCI_IRQ=y
CONFIG_OF_RESERVED_MEM=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND=y
CONFIG_OPENRB=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PAGE_OFFSET=0xc0000000
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_MSI=y
CONFIG_PHYSICAL_START=0x00000000
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_PPC40x_SIMPLE=y
# CONFIG_PPC4xx_HSTA_MSI is not set
CONFIG_PPC4xx_MSI=y
# CONFIG_PPC4xx_OCM is not set
CONFIG_PPC4xx_PCI_EXPRESS=y
# CONFIG_PPC64 is not set
# CONFIG_PPC_85xx is not set
# CONFIG_PPC_8xx is not set
# CONFIG_PPC_970_NAP is not set
CONFIG_PPC_ADV_DEBUG_DACS=2
CONFIG_PPC_ADV_DEBUG_DVCS=0
CONFIG_PPC_ADV_DEBUG_IACS=2
CONFIG_PPC_ADV_DEBUG_REGS=y
# CONFIG_PPC_BOOK3S_32 is not set
# CONFIG_PPC_CELL is not set
# CONFIG_PPC_CELL_NATIVE is not set
# CONFIG_PPC_COPRO_BASE is not set
CONFIG_PPC_DCR=y
# CONFIG_PPC_DCR_MMIO is not set
CONFIG_PPC_DCR_NATIVE=y
# CONFIG_PPC_DOORBELL is not set
# CONFIG_PPC_EARLY_DEBUG is not set
# CONFIG_PPC_EPAPR_HV_PIC is not set
# CONFIG_PPC_I8259 is not set
# CONFIG_PPC_ICP_HV is not set
# CONFIG_PPC_ICP_NATIVE is not set
# CONFIG_PPC_ICS_RTAS is not set
CONFIG_PPC_INDIRECT_PCI=y
CONFIG_PPC_MMU_NOHASH=y
# CONFIG_PPC_MM_SLICES is not set
# CONFIG_PPC_MPC106 is not set
CONFIG_PPC_MSI_BITMAP=y
CONFIG_PPC_OF=y
# CONFIG_PPC_P7_NAP is not set
CONFIG_PPC_PCI_CHOICE=y
# CONFIG_PPC_RTAS is not set
CONFIG_PPC_UDBG_16550=y
CONFIG_PPC_WERROR=y
# CONFIG_PPC_XICS is not set
# CONFIG_PQ2ADS is not set
# CONFIG_PREEMPT_RCU is not set
CONFIG_RAS=y
# CONFIG_RCU_STALL_COMMON is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_SCHED_HRTICK=y
# CONFIG_SCSI_DMA is not set
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_SLAB is not set
CONFIG_SLUB=y
CONFIG_SPARSE_IRQ=y
# CONFIG_SWIOTLB is not set
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_TASK_SIZE=0xc0000000
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_USB_SUPPORT=y
# CONFIG_WALNUT is not set
CONFIG_WORD_SIZE=32
# CONFIG_XILINX_SYSACE is not set
# CONFIG_XILINX_VIRTEX_GENERIC_BOARD is not set
CONFIG_XZ_DEC_BCJ=y
CONFIG_XZ_DEC_POWERPC=y

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@ -1,72 +0,0 @@
#
# Copyright (C) 2008-2013 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/image.mk
JFFS2_BLOCKSIZE=128k 64k
define Image/Prepare
$(LINUX_DIR)/scripts/dtc/dtc -O dtb -R 4 -S 0x20000 $(DTS_DIR)/kilauea.dts > $(KDIR)/openwrt-kilauea.dtb
endef
define Image/BuildKernel
cp $(KDIR)/uImage $(BIN_DIR)/$(IMG_PREFIX)-uImage
$(call Image/Build/Initramfs)
endef
define Image/Build
$(call Image/Build/$(1),$(1))
endef
define Image/Build/ext2
cp $(KDIR)/root.$(1) $(BIN_DIR)/$(IMG_PREFIX)-ext2.img
endef
define Image/Build/jffs2-128k
( \
dd if=$(KDIR)/uImage bs=1920k conv=sync; \
dd if=$(KDIR)/openwrt-kilauea.dtb bs=128k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=128k conv=sync; \
) > $(BIN_DIR)/$(IMG_PREFIX)-kilauea-jffs2.img
endef
define Image/Build/jffs2-64k
( \
dd if=$(KDIR)/cuImage.magicbox bs=1408k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=64k conv=sync; \
) > $(BIN_DIR)/$(IMG_PREFIX)-magicbox-jffs2.img
( \
dd if=$(KDIR)/cuImage.openrb bs=1408k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=64k conv=sync; \
) > $(BIN_DIR)/$(IMG_PREFIX)-openrb-jffs2.img
endef
define Image/Build/squashfs
$(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
( \
dd if=$(KDIR)/uImage bs=1920k conv=sync; \
dd if=$(KDIR)/openwrt-kilauea.dtb bs=128k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=128k conv=sync; \
) > $(BIN_DIR)/$(IMG_PREFIX)-kilauea-$(1).img
( \
dd if=$(KDIR)/cuImage.magicbox bs=64k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=64k conv=sync; \
) > $(BIN_DIR)/$(IMG_PREFIX)-magicbox-$(1).img
( \
dd if=$(KDIR)/cuImage.openrb bs=1408k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=64k conv=sync; \
) > $(BIN_DIR)/$(IMG_PREFIX)-openrb-$(1).img
endef
ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
define Image/Build/Initramfs
cp $(KDIR)/cuImage.magicbox-initramfs $(BIN_DIR)/openwrt-$(BOARD)-magicbox-initramfs.bin
cp $(KDIR)/cuImage.openrb-initramfs $(BIN_DIR)/openwrt-$(BOARD)-openrb-initramfs.bin
endef
endif
$(eval $(call BuildImage))

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@ -1,41 +0,0 @@
#
# Copyright (C) 2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define KernelPackage/ata-magicbox-cf
SUBMENU:=$(BLOCK_MENU)
TITLE:=Magicbox v2/OpenRB Compact flash support
DEPENDS:=@TARGET_ppc40x
KCONFIG:=CONFIG_PATA_MAGICBOX_CF
FILES:=$(LINUX_DIR)/drivers/ata/pata_magicbox_cf.ko
AUTOLOAD:=$(call AutoLoad,41,pata_magicbox_cf,1)
$(call AddDepends/ata)
endef
define KernelPackage/ata-magicbox-cf/description
Support for Magicbox v2/OpenRB on-board CF slot.
endef
$(eval $(call KernelPackage,ata-magicbox-cf))
define KernelPackage/usb-isp116x-hcd
TITLE:=Support for the ISP116x USB Host Controller
DEPENDS:=@TARGET_ppc40x
KCONFIG:= \
CONFIG_USB_ISP116X_HCD \
CONFIG_USB_ISP116X_HCD_OF=y \
CONFIG_USB_ISP116X_HCD_PLATFORM=n
FILES:=$(LINUX_DIR)/drivers/usb/host/isp116x-hcd.ko
AUTOLOAD:=$(call AutoLoad,50,isp116x-hcd)
$(call AddDepends/usb)
endef
define KernelPackage/usb-isp116x-hcd/description
Kernel support for the ISP116X USB Host Controller
endef
$(eval $(call KernelPackage,usb-isp116x-hcd))

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@ -1,27 +0,0 @@
--- a/arch/powerpc/boot/dcr.h
+++ b/arch/powerpc/boot/dcr.h
@@ -59,6 +59,14 @@ static const unsigned long sdram_bxcr[]
#define EBC_BXCR(n) (n)
#define EBC_BXCR_BAS 0xfff00000
#define EBC_BXCR_BS 0x000e0000
+#define EBC_BXCR_BS_1M 0x00000000
+#define EBC_BXCR_BS_2M 0x00020000
+#define EBC_BXCR_BS_4M 0x00040000
+#define EBC_BXCR_BS_8M 0x00060000
+#define EBC_BXCR_BS_16M 0x00080000
+#define EBC_BXCR_BS_32M 0x000a0000
+#define EBC_BXCR_BS_64M 0x000c0000
+#define EBC_BXCR_BS_128M 0x000e0000
#define EBC_BXCR_BANK_SIZE(reg) \
(0x100000 << (((reg) & EBC_BXCR_BS) >> 17))
#define EBC_BXCR_BU 0x00018000
@@ -67,6 +75,9 @@ static const unsigned long sdram_bxcr[]
#define EBC_BXCR_BU_WO 0x00010000
#define EBC_BXCR_BU_RW 0x00018000
#define EBC_BXCR_BW 0x00006000
+#define EBC_BXCR_BW_8 0x00000000
+#define EBC_BXCR_BW_16 0x00002000
+#define EBC_BXCR_BW_32 0x00006000
#define EBC_B0AP 0x10
#define EBC_B1AP 0x11
#define EBC_B2AP 0x12

View File

@ -1,446 +0,0 @@
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-magicbox.c
@@ -0,0 +1,98 @@
+/*
+ * Old U-boot compatibility for Magicbox boards
+ *
+ * Author: Imre Kaloz <kaloz@openwrt.org>
+ * Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "io.h"
+#include "dcr.h"
+#include "stdio.h"
+#include "4xx.h"
+#include "44x.h"
+#include "cuboot.h"
+
+#define TARGET_4xx
+#define TARGET_405EP
+#include "ppcboot.h"
+
+static bd_t bd;
+
+static void fixup_perwe(void)
+{
+
+#define DCRN_CPC0_PCI_BASE 0xf9
+
+ /* Turn on PerWE instead of PCIINT */
+ mtdcr(DCRN_CPC0_PCI_BASE,
+ mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
+
+#undef DCRN_CPC0_PCI_BASE
+}
+
+static void fixup_cf_card(void)
+{
+
+#define CF_CS0_BASE 0xff100000
+#define CF_CS1_BASE 0xff200000
+
+ /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BS_1M |
+ EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1AP);
+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
+
+ /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2CR);
+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BS_1M |
+ EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
+
+#undef CF_CS0_BASE
+#undef CF_CS1_BASE
+}
+
+static void magicbox_fixups(void)
+{
+ ibm405ep_fixup_clocks(bd.bi_procfreq / 8);
+ ibm4xx_sdram_fixup_memsize();
+
+ /* Magicbox v1 has only one ethernet, one serial and no
+ * CF slot -- detect it using it's fake enet1addr
+ */
+ if ((bd.bi_enet1addr[2] == 0x02) &&
+ (bd.bi_enet1addr[3] == 0xfa) &&
+ (bd.bi_enet1addr[4] == 0xf0) &&
+ (bd.bi_enet1addr[5] == 0x80)) {
+ void *devp;
+ devp = finddevice("/plb/opb/ethernet@ef600900");
+ del_node(devp);
+ devp = finddevice("/plb/opb/serial@ef600400");
+ del_node(devp);
+ devp = finddevice("/plb/ebc/cf_card@ff100000");
+ del_node(devp);
+
+ } else {
+ fixup_perwe();
+ fixup_cf_card();
+ }
+
+ dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+ CUBOOT_INIT();
+ platform_ops.fixups = magicbox_fixups;
+ platform_ops.exit = ibm40x_dbcr_reset;
+ fdt_init(_dtb_start);
+ serial_console_init();
+}
--- /dev/null
+++ b/arch/powerpc/boot/dts/magicbox.dts
@@ -0,0 +1,285 @@
+/*
+ * Device Tree Source for Magicbox boards
+ *
+ * Copyright 2008-2009 Imre Kaloz <kaloz@openwrt.org>
+ * Copyright 2009 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Based on walnut.dts
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "magicbox";
+ compatible = "magicbox";
+ dcr-parent = <&{/cpus/cpu@0}>;
+
+ aliases {
+ ethernet0 = &EMAC0;
+ ethernet1 = &EMAC1;
+ serial0 = &UART0;
+ serial1 = &UART1;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ model = "PowerPC,405EP";
+ reg = <0x00000000>;
+ clock-frequency = <0>; /* Filled in by zImage */
+ timebase-frequency = <0>; /* Filled in by zImage */
+ i-cache-line-size = <0x20>;
+ d-cache-line-size = <0x20>;
+ i-cache-size = <0x4000>;
+ d-cache-size = <0x4000>;
+ dcr-controller;
+ dcr-access-method = "native";
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x00000000>; /* Filled in by zImage */
+ };
+
+ UIC0: interrupt-controller {
+ compatible = "ibm,uic";
+ interrupt-controller;
+ cell-index = <0>;
+ dcr-reg = <0x0c0 0x009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ };
+
+ plb {
+ compatible = "ibm,plb3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ clock-frequency = <0>; /* Filled in by zImage */
+
+ SDRAM0: memory-controller {
+ compatible = "ibm,sdram-405ep";
+ dcr-reg = <0x010 0x002>;
+ };
+
+ MAL: mcmal {
+ compatible = "ibm,mcmal-405ep", "ibm,mcmal";
+ dcr-reg = <0x180 0x062>;
+ num-tx-chans = <4>;
+ num-rx-chans = <2>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <
+ 0xb 0x4 /* TXEOB */
+ 0xc 0x4 /* RXEOB */
+ 0xa 0x4 /* SERR */
+ 0xd 0x4 /* TXDE */
+ 0xe 0x4 /* RXDE */>;
+ };
+
+ POB0: opb {
+ compatible = "ibm,opb-405ep", "ibm,opb";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0xef600000 0xef600000 0x00a00000>;
+ dcr-reg = <0x0a0 0x005>;
+ clock-frequency = <0>; /* Filled in by zImage */
+
+ UART0: serial@ef600300 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
+ clock-frequency = <0>; /* Filled in by zImage */
+ current-speed = <115200>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x0 0x4>;
+ };
+
+ UART1: serial@ef600400 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0xef600400 0x00000008>;
+ virtual-reg = <0xef600400>;
+ clock-frequency = <0>; /* Filled in by zImage */
+ current-speed = <115200>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x1 0x4>;
+ };
+
+ IIC: i2c@ef600500 {
+ compatible = "ibm,iic-405ep", "ibm,iic";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xef600500 0x00000011>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x2 0x4>;
+
+ dtt@48 {
+ compatible = "national,lm75";
+ reg = <0x48>;
+ };
+
+ eeprom@50 {
+ compatible = "at24,24c16";
+ reg = <0x50>;
+ };
+ };
+
+ GPIO0: gpio-controller@ef600700 {
+ compatible = "ibm,ppc4xx-gpio";
+ reg = <0xef600700 0x00000020>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ EMAC0: ethernet@ef600800 {
+ linux,network-index = <0x0>;
+ device_type = "network";
+ compatible = "ibm,emac-405ep", "ibm,emac";
+ interrupt-parent = <&UIC0>;
+ interrupts = <
+ 0xf 0x4 /* Ethernet */
+ 0x9 0x4 /* Ethernet Wake Up */>;
+ local-mac-address = [000000000000]; /* Filled in by zImage */
+ reg = <0xef600800 0x00000070>;
+ mal-device = <&MAL>;
+ mal-tx-channel = <0>;
+ mal-rx-channel = <0>;
+ cell-index = <0>;
+ max-frame-size = <0x5dc>;
+ rx-fifo-size = <0x1000>;
+ tx-fifo-size = <0x800>;
+ phy-mode = "mii";
+ phy-map = <0x00000000>;
+ };
+
+ EMAC1: ethernet@ef600900 {
+ linux,network-index = <0x1>;
+ device_type = "network";
+ compatible = "ibm,emac-405ep", "ibm,emac";
+ interrupt-parent = <&UIC0>;
+ interrupts = <
+ 0x11 0x4 /* Ethernet */
+ 0x09 0x4 /* Ethernet Wake Up */>;
+ local-mac-address = [000000000000]; /* Filled in by zImage */
+ reg = <0xef600900 0x00000070>;
+ mal-device = <&MAL>;
+ mal-tx-channel = <2>;
+ mal-rx-channel = <1>;
+ cell-index = <1>;
+ max-frame-size = <0x5dc>;
+ rx-fifo-size = <0x1000>;
+ tx-fifo-size = <0x800>;
+ mdio-device = <&EMAC0>;
+ phy-mode = "mii";
+ phy-map = <0x00000001>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ user {
+ label = "magicbox:red:user";
+ gpios = <&GPIO0 2 1>;
+ };
+ };
+ };
+
+ EBC0: ebc {
+ compatible = "ibm,ebc-405ep", "ibm,ebc";
+ dcr-reg = <0x012 0x002>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ /* The ranges property is supplied by the bootwrapper
+ * and is based on the firmware's configuration of the
+ * EBC bridge
+ */
+ clock-frequency = <0>; /* Filled in by zImage */
+
+ cf_card@ff100000 {
+ compatible = "magicbox-cf", "pata-magicbox-cf";
+ reg = <0x00000000 0xff100000 0x00001000
+ 0x00000000 0xff200000 0x00001000>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x19 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
+ };
+
+ nor_flash@ffc00000 {
+ compatible = "cfi-flash";
+ bank-width = <2>;
+ reg = <0x00000000 0xffc00000 0x00400000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition0@0 {
+ label = "linux";
+ reg = <0x0 0x160000>;
+ };
+ partition1@120000 {
+ label = "rootfs";
+ reg = <0x160000 0x260000>;
+ };
+ partition2@3c0000 {
+ label = "u-boot";
+ reg = <0x3c0000 0x30000>;
+ read-only;
+ };
+ partition3@0 {
+ label = "firmware";
+ reg = <0x0 0x3c0000>;
+ };
+ };
+ };
+
+ PCI0: pci@ec000000 {
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
+ primary;
+ reg = <0xeec00000 0x00000008 /* Config space access */
+ 0xeed80000 0x00000004 /* IACK */
+ 0xeed80000 0x00000004 /* Special cycle */
+ 0xef480000 0x00000040>; /* Internal registers */
+
+ /* Outbound ranges, one memory and one IO,
+ * later cannot be changed. Chip supports a second
+ * IO range but we don't use it for now
+ */
+ ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
+ 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
+
+ interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
+ interrupt-map = <
+ /* IDSEL 1 */
+ 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
+
+ /* IDSEL 2 */
+ 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
+
+ /* IDSEL 3 */
+ 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
+
+ /* IDSEL 4 */
+ 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
+ >;
+ };
+ };
+
+ chosen {
+ linux,stdout-path = "/plb/opb/serial@ef600300";
+ };
+};
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -50,6 +50,7 @@ $(obj)/cuboot-hotfoot.o: BOOTCFLAGS += -
$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=440
$(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=440
$(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
+$(obj)/cuboot-magicbox.o: BOOTCFLAGS += -mcpu=405
$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
$(obj)/treeboot-iss4xx.o: BOOTCFLAGS += -mcpu=405
$(obj)/treeboot-currituck.o: BOOTCFLAGS += -mcpu=405
@@ -86,7 +87,8 @@ src-plat-y := of.c epapr.c
src-plat-$(CONFIG_40x) += fixed-head.S ep405.c cuboot-hotfoot.c \
treeboot-walnut.c cuboot-acadia.c \
cuboot-kilauea.c simpleboot.c \
- virtex405-head.S virtex.c
+ virtex405-head.S virtex.c \
+ cuboot-magicbox.c
src-plat-$(CONFIG_44x) += treeboot-ebony.c cuboot-ebony.c treeboot-bamboo.c \
cuboot-bamboo.c cuboot-sam440ep.c \
cuboot-sequoia.c cuboot-rainier.c \
@@ -238,6 +240,7 @@ image-$(CONFIG_HOTFOOT) += cuImage.hot
image-$(CONFIG_WALNUT) += treeImage.walnut
image-$(CONFIG_ACADIA) += cuImage.acadia
image-$(CONFIG_OBS600) += uImage.obs600
+image-$(CONFIG_MAGICBOX) += cuImage.magicbox
# Board ports in arch/powerpc/platform/44x/Kconfig
image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
--- a/arch/powerpc/platforms/40x/Kconfig
+++ b/arch/powerpc/platforms/40x/Kconfig
@@ -37,6 +37,16 @@ config KILAUEA
help
This option enables support for the AMCC PPC405EX evaluation board.
+config MAGICBOX
+ bool "Magicbox"
+ depends on 40x
+ default n
+ select PPC40x_SIMPLE
+ select 405EP
+ select PCI
+ help
+ This option enables support for the Magicbox boards.
+
config MAKALU
bool "Makalu"
depends on 40x
--- a/arch/powerpc/platforms/40x/ppc40x_simple.c
+++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
@@ -58,6 +58,7 @@ static const char * const board[] __init
"apm,klondike",
"est,hotfoot",
"plathome,obs600",
+ "magicbox",
NULL
};

View File

@ -1,447 +0,0 @@
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-openrb.c
@@ -0,0 +1,94 @@
+/*
+ * Old U-boot compatibility for OpenRB boards
+ *
+ * Author: Gabor Juhos <juhosg@openwrt.org>
+ * Imre Kaloz <kaloz@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "io.h"
+#include "dcr.h"
+#include "stdio.h"
+#include "4xx.h"
+#include "44x.h"
+#include "cuboot.h"
+
+#define TARGET_4xx
+#define TARGET_405EP
+#include "ppcboot.h"
+
+static bd_t bd;
+
+static void fixup_perwe(void)
+{
+#define DCRN_CPC0_PCI_BASE 0xf9
+
+ /* Turn on PerWE instead of PCIINT */
+ mtdcr(DCRN_CPC0_PCI_BASE,
+ mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
+
+#undef DCRN_CPC0_PCI_BASE
+}
+
+static void fixup_cf_card(void)
+{
+#define CF_CS0_BASE 0xff100000
+#define CF_CS1_BASE 0xff200000
+
+ /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BS_1M |
+ EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1AP);
+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
+
+ /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2CR);
+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BS_1M |
+ EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
+
+#undef CF_CS0_BASE
+#undef CF_CS1_BASE
+}
+
+static void fixup_isp116x(void)
+{
+#define ISP116X_CS_BASE 0xf0000000
+
+ /* PerCS3 (ISP1160's CS): base 0xf0000000, size 32MB, 16-bit, rw */
+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B3CR);
+ mtdcr(DCRN_EBC0_CFGDATA, ISP116X_CS_BASE | EBC_BXCR_BS_32M |
+ EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B3AP);
+ mtdcr(DCRN_EBC0_CFGDATA, 0x03016600);
+
+#undef ISP116X_CS_BASE
+}
+
+static void openrb_fixups(void)
+{
+ ibm405ep_fixup_clocks(bd.bi_procfreq / 8);
+ ibm4xx_sdram_fixup_memsize();
+
+ fixup_perwe();
+ fixup_cf_card();
+ fixup_isp116x();
+
+ dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+ CUBOOT_INIT();
+ platform_ops.fixups = openrb_fixups;
+ platform_ops.exit = ibm40x_dbcr_reset;
+ fdt_init(_dtb_start);
+ serial_console_init();
+}
--- /dev/null
+++ b/arch/powerpc/boot/dts/openrb.dts
@@ -0,0 +1,291 @@
+/*
+ * Device Tree Source for OpenRB boards
+ *
+ * Copyright 2009 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright 2009 Imre Kaloz <kaloz@openwrt.org>
+ *
+ * Based on walnut.dts
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "openrb";
+ compatible = "openrb";
+ dcr-parent = <&{/cpus/cpu@0}>;
+
+ aliases {
+ ethernet0 = &EMAC0;
+ ethernet1 = &EMAC1;
+ serial0 = &UART0;
+ serial1 = &UART1;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ model = "PowerPC,405EP";
+ reg = <0x00000000>;
+ clock-frequency = <0>; /* Filled in by zImage */
+ timebase-frequency = <0>; /* Filled in by zImage */
+ i-cache-line-size = <0x20>;
+ d-cache-line-size = <0x20>;
+ i-cache-size = <0x4000>;
+ d-cache-size = <0x4000>;
+ dcr-controller;
+ dcr-access-method = "native";
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x00000000>; /* Filled in by zImage */
+ };
+
+ UIC0: interrupt-controller {
+ compatible = "ibm,uic";
+ interrupt-controller;
+ cell-index = <0>;
+ dcr-reg = <0x0c0 0x009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ };
+
+ plb {
+ compatible = "ibm,plb3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ clock-frequency = <0>; /* Filled in by zImage */
+
+ SDRAM0: memory-controller {
+ compatible = "ibm,sdram-405ep";
+ dcr-reg = <0x010 0x002>;
+ };
+
+ MAL: mcmal {
+ compatible = "ibm,mcmal-405ep", "ibm,mcmal";
+ dcr-reg = <0x180 0x062>;
+ num-tx-chans = <4>;
+ num-rx-chans = <2>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <
+ 0xb 0x4 /* TXEOB */
+ 0xc 0x4 /* RXEOB */
+ 0xa 0x4 /* SERR */
+ 0xd 0x4 /* TXDE */
+ 0xe 0x4 /* RXDE */>;
+ };
+
+ POB0: opb {
+ compatible = "ibm,opb-405ep", "ibm,opb";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0xef600000 0xef600000 0x00a00000>;
+ dcr-reg = <0x0a0 0x005>;
+ clock-frequency = <0>; /* Filled in by zImage */
+
+ UART0: serial@ef600300 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
+ clock-frequency = <0>; /* Filled in by zImage */
+ current-speed = <115200>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x0 0x4>;
+ };
+
+ UART1: serial@ef600400 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0xef600400 0x00000008>;
+ virtual-reg = <0xef600400>;
+ clock-frequency = <0>; /* Filled in by zImage */
+ current-speed = <115200>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x1 0x4>;
+ };
+
+ IIC: i2c@ef600500 {
+ compatible = "ibm,iic-405ep", "ibm,iic";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xef600500 0x00000011>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x2 0x4>;
+
+ eeprom@50 {
+ compatible = "at24,24c16";
+ reg = <0x50>;
+ };
+ };
+
+ GPIO0: gpio-controller@ef600700 {
+ compatible = "ibm,ppc4xx-gpio";
+ reg = <0xef600700 0x00000020>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ EMAC0: ethernet@ef600800 {
+ linux,network-index = <0x0>;
+ device_type = "network";
+ compatible = "ibm,emac-405ep", "ibm,emac";
+ interrupt-parent = <&UIC0>;
+ interrupts = <
+ 0xf 0x4 /* Ethernet */
+ 0x9 0x4 /* Ethernet Wake Up */>;
+ local-mac-address = [000000000000]; /* Filled in by zImage */
+ reg = <0xef600800 0x00000070>;
+ mal-device = <&MAL>;
+ mal-tx-channel = <0>;
+ mal-rx-channel = <0>;
+ cell-index = <0>;
+ max-frame-size = <0x5dc>;
+ rx-fifo-size = <0x1000>;
+ tx-fifo-size = <0x800>;
+ phy-mode = "mii";
+ phy-map = <0x00000000>;
+ };
+
+ EMAC1: ethernet@ef600900 {
+ linux,network-index = <0x1>;
+ device_type = "network";
+ compatible = "ibm,emac-405ep", "ibm,emac";
+ interrupt-parent = <&UIC0>;
+ interrupts = <
+ 0x11 0x4 /* Ethernet */
+ 0x09 0x4 /* Ethernet Wake Up */>;
+ local-mac-address = [000000000000]; /* Filled in by zImage */
+ reg = <0xef600900 0x00000070>;
+ mal-device = <&MAL>;
+ mal-tx-channel = <2>;
+ mal-rx-channel = <1>;
+ cell-index = <1>;
+ max-frame-size = <0x5dc>;
+ rx-fifo-size = <0x1000>;
+ tx-fifo-size = <0x800>;
+ mdio-device = <&EMAC0>;
+ phy-mode = "mii";
+ phy-map = <0x00000001>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ user {
+ label = "openrb:green:user";
+ gpios = <&GPIO0 2 1>;
+ };
+ };
+ };
+
+ EBC0: ebc {
+ compatible = "ibm,ebc-405ep", "ibm,ebc";
+ dcr-reg = <0x012 0x002>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ /* The ranges property is supplied by the bootwrapper
+ * and is based on the firmware's configuration of the
+ * EBC bridge
+ */
+ clock-frequency = <0>; /* Filled in by zImage */
+
+ isp116x@f0000000 {
+ compatible = "isp116x-hcd";
+ oc_enable;
+ int_act_high;
+ int_edge_triggered;
+ reg = <0x00000000 0xf0000000 0x00000002 /* data */
+ 0x00000000 0xf1000000 0x00000002 /* addr */ >;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x1b 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
+ };
+
+ cf_card@ff100000 {
+ compatible = "magicbox-cf", "pata-magicbox-cf";
+ reg = <0x00000000 0xff100000 0x00001000
+ 0x00000000 0xff200000 0x00001000>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x19 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
+ };
+
+ nor_flash@ff800000 {
+ compatible = "cfi-flash";
+ bank-width = <2>;
+ reg = <0x00000000 0xff800000 0x00800000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition0@0 {
+ label = "linux";
+ reg = <0x0 0x160000>;
+ };
+ partition1@120000 {
+ label = "rootfs";
+ reg = <0x160000 0x660000>;
+ };
+ partition2@7c0000 {
+ label = "u-boot";
+ reg = <0x7c0000 0x30000>;
+ read-only;
+ };
+ partition3@0 {
+ label = "firmware";
+ reg = <0x0 0x7c0000>;
+ };
+ };
+ };
+
+ PCI0: pci@ec000000 {
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
+ primary;
+ reg = <0xeec00000 0x00000008 /* Config space access */
+ 0xeed80000 0x00000004 /* IACK */
+ 0xeed80000 0x00000004 /* Special cycle */
+ 0xef480000 0x00000040>; /* Internal registers */
+
+ /* Outbound ranges, one memory and one IO,
+ * later cannot be changed. Chip supports a second
+ * IO range but we don't use it for now
+ */
+ ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
+ 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
+
+ interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
+ interrupt-map = <
+ /* IDSEL 1 */
+ 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
+
+ /* IDSEL 2 */
+ 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
+
+ /* IDSEL 3 */
+ 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
+
+ /* IDSEL 4 */
+ 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
+ >;
+ };
+ };
+
+ chosen {
+ linux,stdout-path = "/plb/opb/serial@ef600300";
+ };
+};
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -51,6 +51,7 @@ $(obj)/cuboot-taishan.o: BOOTCFLAGS += -
$(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=440
$(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
$(obj)/cuboot-magicbox.o: BOOTCFLAGS += -mcpu=405
+$(obj)/cuboot-openrb.o: BOOTCFLAGS += -mcpu=405
$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
$(obj)/treeboot-iss4xx.o: BOOTCFLAGS += -mcpu=405
$(obj)/treeboot-currituck.o: BOOTCFLAGS += -mcpu=405
@@ -88,7 +89,7 @@ src-plat-$(CONFIG_40x) += fixed-head.S e
treeboot-walnut.c cuboot-acadia.c \
cuboot-kilauea.c simpleboot.c \
virtex405-head.S virtex.c \
- cuboot-magicbox.c
+ cuboot-magicbox.c cuboot-openrb
src-plat-$(CONFIG_44x) += treeboot-ebony.c cuboot-ebony.c treeboot-bamboo.c \
cuboot-bamboo.c cuboot-sam440ep.c \
cuboot-sequoia.c cuboot-rainier.c \
@@ -241,6 +242,7 @@ image-$(CONFIG_WALNUT) += treeImage.wa
image-$(CONFIG_ACADIA) += cuImage.acadia
image-$(CONFIG_OBS600) += uImage.obs600
image-$(CONFIG_MAGICBOX) += cuImage.magicbox
+image-$(CONFIG_OPENRB) += cuImage.openrb
# Board ports in arch/powerpc/platform/44x/Kconfig
image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
--- a/arch/powerpc/platforms/40x/Kconfig
+++ b/arch/powerpc/platforms/40x/Kconfig
@@ -47,6 +47,16 @@ config MAGICBOX
help
This option enables support for the Magicbox boards.
+config OPENRB
+ bool "OpenRB"
+ depends on 40x
+ default n
+ select PPC40x_SIMPLE
+ select 405EP
+ select PCI
+ help
+ This option enables support for the OpenRB boards.
+
config MAKALU
bool "Makalu"
depends on 40x
--- a/arch/powerpc/platforms/40x/ppc40x_simple.c
+++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
@@ -59,6 +59,7 @@ static const char * const board[] __init
"est,hotfoot",
"plathome,obs600",
"magicbox",
+ "openrb",
NULL
};

View File

@ -1,433 +0,0 @@
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -234,6 +234,16 @@ config PDC_ADMA
If unsure, say N.
+config PATA_MAGICBOX_CF
+ tristate "Magicbox/OpenRB Compact Flash support"
+ depends on MAGICBOX || OPENRB
+ help
+ This option enables support for a Compact Flash conected on
+ the ppc405ep expansion bus. This driver had been written for
+ the Magicbox v2 and OpenRB boards.
+
+ If unsure, say N.
+
config PATA_OCTEON_CF
tristate "OCTEON Boot Bus Compact Flash support"
depends on CAVIUM_OCTEON_SOC
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -91,6 +91,7 @@ obj-$(CONFIG_PATA_AT91) += pata_at91.o
obj-$(CONFIG_PATA_CMD640_PCI) += pata_cmd640.o
obj-$(CONFIG_PATA_ISAPNP) += pata_isapnp.o
obj-$(CONFIG_PATA_IXP4XX_CF) += pata_ixp4xx_cf.o
+obj-$(CONFIG_PATA_MAGICBOX_CF) += pata_magicbox_cf.o
obj-$(CONFIG_PATA_MPIIX) += pata_mpiix.o
obj-$(CONFIG_PATA_NS87410) += pata_ns87410.o
obj-$(CONFIG_PATA_OPTI) += pata_opti.o
--- /dev/null
+++ b/drivers/ata/pata_magicbox_cf.c
@@ -0,0 +1,401 @@
+/*
+ * PATA/CompactFlash driver for the MagicBox v2/OpenRB boards.
+ *
+ * Copyright (C) 2009,2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Based on the IDE driver by Wojtek Kaniewski <wojtekka@toxygen.net>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+#include <linux/ioport.h>
+#include <linux/libata.h>
+#include <linux/irq.h>
+//#include <linux/of.h>
+//#include <linux/of_device.h>
+#include <linux/of_platform.h>
+#include <scsi/scsi_host.h>
+
+#define DRV_DESC "PATA/CompactFlash driver for Magicbox/OpenRB boards"
+#define DRV_NAME "pata_magicbox_cf"
+#define DRV_VERSION "0.1.0"
+
+#define MAGICBOX_CF_REG_CMD (2 * ATA_REG_CMD)
+#define MAGICBOX_CF_REG_DATA (2 * ATA_REG_DATA)
+#define MAGICBOX_CF_REG_ERR (2 * ATA_REG_ERR)
+#define MAGICBOX_CF_REG_FEATURE (2 * ATA_REG_FEATURE)
+#define MAGICBOX_CF_REG_NSECT (2 * ATA_REG_NSECT)
+#define MAGICBOX_CF_REG_LBAL (2 * ATA_REG_LBAL)
+#define MAGICBOX_CF_REG_LBAM (2 * ATA_REG_LBAM)
+#define MAGICBOX_CF_REG_LBAH (2 * ATA_REG_LBAH)
+#define MAGICBOX_CF_REG_DEVICE (2 * ATA_REG_DEVICE)
+#define MAGICBOX_CF_REG_STATUS (2 * ATA_REG_STATUS)
+#define MAGICBOX_CF_REG_ALTSTATUS (2 * 6)
+#define MAGICBOX_CF_REG_CTL (2 * 6)
+
+#define MAGICBOX_CF_MAXPORTS 1
+
+struct magicbox_cf_info {
+ void __iomem *base;
+ void __iomem *ctrl;
+};
+
+static inline u8 magicbox_cf_inb(void __iomem *port)
+{
+ return (u8) (readw(port) >> 8) & 0xff;
+}
+
+static inline void magicbox_cf_outb(void __iomem *port, u8 value)
+{
+ writew(value << 8, port);
+}
+
+static int magicbox_cf_set_mode(struct ata_link *link,
+ struct ata_device **error)
+{
+ struct ata_device *dev;
+
+ ata_for_each_dev(dev, link, ENABLED) {
+ ata_dev_printk(dev, KERN_INFO, "configured for PIO0\n");
+ dev->pio_mode = XFER_PIO_0;
+ dev->xfer_mode = XFER_PIO_0;
+ dev->xfer_shift = ATA_SHIFT_PIO;
+ dev->flags |= ATA_DFLAG_PIO;
+ }
+
+ return 0;
+}
+
+static void magicbox_cf_exec_command(struct ata_port *ap,
+ const struct ata_taskfile *tf)
+{
+ DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
+
+ magicbox_cf_outb(ap->ioaddr.command_addr, tf->command);
+ ata_sff_pause(ap);
+}
+
+static u8 magicbox_cf_check_status(struct ata_port *ap)
+{
+ u8 status;
+
+ status = magicbox_cf_inb(ap->ioaddr.status_addr);
+
+ DPRINTK("ata%u: status 0x%X, from %p\n", ap->print_id, status,
+ ap->ioaddr.status_addr);
+
+ return status;
+}
+
+static u8 magicbox_cf_check_altstatus(struct ata_port *ap)
+{
+ u8 altstatus;
+
+ altstatus = magicbox_cf_inb(ap->ioaddr.altstatus_addr);
+
+ DPRINTK("ata%u: altstatus 0x%X, from %p\n", ap->print_id,
+ altstatus, ap->ioaddr.altstatus_addr);
+
+ return altstatus;
+}
+
+static void magicbox_cf_dev_select(struct ata_port *ap, unsigned int device)
+{
+ /* Nothing to do. We are supporting one device only. */
+}
+
+static void magicbox_cf_tf_load(struct ata_port *ap,
+ const struct ata_taskfile *tf)
+{
+ struct ata_ioports *ioaddr = &ap->ioaddr;
+ unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
+
+ if (tf->ctl != ap->last_ctl) {
+ magicbox_cf_outb(ioaddr->ctl_addr, tf->ctl);
+ ap->last_ctl = tf->ctl;
+ ata_wait_idle(ap);
+ }
+
+ if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
+ magicbox_cf_outb(ioaddr->feature_addr, tf->hob_feature);
+ magicbox_cf_outb(ioaddr->nsect_addr, tf->hob_nsect);
+ magicbox_cf_outb(ioaddr->lbal_addr, tf->hob_lbal);
+ magicbox_cf_outb(ioaddr->lbam_addr, tf->hob_lbam);
+ magicbox_cf_outb(ioaddr->lbah_addr, tf->hob_lbah);
+ VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
+ tf->hob_feature,
+ tf->hob_nsect,
+ tf->hob_lbal,
+ tf->hob_lbam,
+ tf->hob_lbah);
+ }
+
+ if (is_addr) {
+ magicbox_cf_outb(ioaddr->feature_addr, tf->feature);
+ magicbox_cf_outb(ioaddr->nsect_addr, tf->nsect);
+ magicbox_cf_outb(ioaddr->lbal_addr, tf->lbal);
+ magicbox_cf_outb(ioaddr->lbam_addr, tf->lbam);
+ magicbox_cf_outb(ioaddr->lbah_addr, tf->lbah);
+ VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
+ tf->feature,
+ tf->nsect,
+ tf->lbal,
+ tf->lbam,
+ tf->lbah);
+ }
+
+ if (tf->flags & ATA_TFLAG_DEVICE) {
+ magicbox_cf_outb(ioaddr->device_addr, tf->device);
+ VPRINTK("device 0x%X\n", tf->device);
+ }
+
+ ata_wait_idle(ap);
+}
+
+static void magicbox_cf_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
+{
+ struct ata_ioports *ioaddr = &ap->ioaddr;
+
+ tf->command = magicbox_cf_inb(ap->ioaddr.status_addr);
+ tf->feature = magicbox_cf_inb(ioaddr->error_addr);
+ tf->nsect = magicbox_cf_inb(ioaddr->nsect_addr);
+ tf->lbal = magicbox_cf_inb(ioaddr->lbal_addr);
+ tf->lbam = magicbox_cf_inb(ioaddr->lbam_addr);
+ tf->lbah = magicbox_cf_inb(ioaddr->lbah_addr);
+ tf->device = magicbox_cf_inb(ioaddr->device_addr);
+ VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
+ tf->feature,
+ tf->nsect,
+ tf->lbal,
+ tf->lbam,
+ tf->lbah);
+
+ if (tf->flags & ATA_TFLAG_LBA48) {
+ magicbox_cf_outb(ioaddr->ctl_addr, tf->ctl | ATA_HOB);
+ tf->hob_feature = magicbox_cf_inb(ioaddr->error_addr);
+ tf->hob_nsect = magicbox_cf_inb(ioaddr->nsect_addr);
+ tf->hob_lbal = magicbox_cf_inb(ioaddr->lbal_addr);
+ tf->hob_lbam = magicbox_cf_inb(ioaddr->lbam_addr);
+ tf->hob_lbah = magicbox_cf_inb(ioaddr->lbah_addr);
+ magicbox_cf_outb(ioaddr->ctl_addr, tf->ctl);
+ ap->last_ctl = tf->ctl;
+ VPRINTK("hob: feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
+ tf->feature,
+ tf->nsect,
+ tf->lbal,
+ tf->lbam,
+ tf->lbah);
+ }
+}
+
+static unsigned int magicbox_cf_data_xfer(struct ata_device *dev,
+ unsigned char *buf,
+ unsigned int buflen, int rw)
+{
+ struct ata_port *ap = dev->link->ap;
+ unsigned int words = buflen >> 1;
+ unsigned int i;
+ u16 *buf16 = (u16 *) buf;
+ void __iomem *mmio = ap->ioaddr.data_addr;
+
+ /* Transfer multiple of 2 bytes */
+ if (rw == READ)
+ for (i = 0; i < words; i++)
+ buf16[i] = readw(mmio);
+ else
+ for (i = 0; i < words; i++)
+ writew(buf16[i], mmio);
+
+ /* Transfer trailing 1 byte, if any. */
+ if (unlikely(buflen & 0x01)) {
+ u16 align_buf[1] = { 0 };
+ unsigned char *trailing_buf = buf + buflen - 1;
+
+ if (rw == READ) {
+ align_buf[0] = readw(mmio);
+ memcpy(trailing_buf, align_buf, 1);
+ } else {
+ memcpy(align_buf, trailing_buf, 1);
+ writew(align_buf[0], mmio);
+ }
+ words++;
+ }
+
+ return words << 1;
+}
+
+static void magicbox_cf_irq_on(struct ata_port *ap)
+{
+ /* Nothing to do. */
+}
+
+static void magicbox_cf_irq_clear(struct ata_port *ap)
+{
+ /* Nothing to do. */
+}
+
+static struct ata_port_operations magicbox_cf_port_ops = {
+ .inherits = &ata_sff_port_ops,
+
+ .cable_detect = ata_cable_40wire,
+ .set_mode = magicbox_cf_set_mode,
+
+ .sff_exec_command = magicbox_cf_exec_command,
+ .sff_check_status = magicbox_cf_check_status,
+ .sff_check_altstatus = magicbox_cf_check_altstatus,
+ .sff_dev_select = magicbox_cf_dev_select,
+ .sff_tf_load = magicbox_cf_tf_load,
+ .sff_tf_read = magicbox_cf_tf_read,
+ .sff_data_xfer = magicbox_cf_data_xfer,
+
+ .sff_irq_on = magicbox_cf_irq_on,
+ .sff_irq_clear = magicbox_cf_irq_clear,
+
+ .port_start = ATA_OP_NULL,
+};
+
+static struct scsi_host_template magicbox_cf_sht = {
+ ATA_PIO_SHT(DRV_NAME),
+};
+
+static inline void magicbox_cf_setup_port(struct ata_host *host)
+{
+ struct magicbox_cf_info *info = host->private_data;
+ struct ata_port *ap;
+
+ ap = host->ports[0];
+
+ ap->ops = &magicbox_cf_port_ops;
+ ap->pio_mask = ATA_PIO4;
+ ap->flags |= ATA_FLAG_NO_ATAPI;
+
+ ap->ioaddr.cmd_addr = info->base + MAGICBOX_CF_REG_CMD;
+ ap->ioaddr.data_addr = info->base + MAGICBOX_CF_REG_DATA;
+ ap->ioaddr.error_addr = info->base + MAGICBOX_CF_REG_ERR;
+ ap->ioaddr.feature_addr = info->base + MAGICBOX_CF_REG_FEATURE;
+ ap->ioaddr.nsect_addr = info->base + MAGICBOX_CF_REG_NSECT;
+ ap->ioaddr.lbal_addr = info->base + MAGICBOX_CF_REG_LBAL;
+ ap->ioaddr.lbam_addr = info->base + MAGICBOX_CF_REG_LBAM;
+ ap->ioaddr.lbah_addr = info->base + MAGICBOX_CF_REG_LBAH;
+ ap->ioaddr.device_addr = info->base + MAGICBOX_CF_REG_DEVICE;
+ ap->ioaddr.status_addr = info->base + MAGICBOX_CF_REG_STATUS;
+ ap->ioaddr.command_addr = info->base + MAGICBOX_CF_REG_CMD;
+
+ ap->ioaddr.altstatus_addr = info->ctrl + MAGICBOX_CF_REG_ALTSTATUS;
+ ap->ioaddr.ctl_addr = info->ctrl + MAGICBOX_CF_REG_CTL;
+
+ ata_port_desc(ap, "cmd 0x%p ctl 0x%p", ap->ioaddr.cmd_addr,
+ ap->ioaddr.ctl_addr);
+}
+
+static int magicbox_cf_of_probe(struct platform_device *op)
+{
+ struct magicbox_cf_info *info;
+ struct ata_host *host;
+ int irq;
+ int ret = 0;
+
+ info = kzalloc(sizeof(struct magicbox_cf_info), GFP_KERNEL);
+ if (info == NULL) {
+ ret = -ENOMEM;
+ goto err_exit;
+ }
+
+ irq = irq_of_parse_and_map(op->dev.of_node, 0);
+ if (irq < 0) {
+ dev_err(&op->dev, "invalid irq\n");
+ ret = -EINVAL;
+ goto err_free_info;
+ }
+
+ info->base = of_iomap(op->dev.of_node, 0);
+ if (info->base == NULL) {
+ ret = -ENOMEM;
+ goto err_free_info;
+ }
+
+ info->ctrl = of_iomap(op->dev.of_node, 1);
+ if (info->ctrl == NULL) {
+ ret = -ENOMEM;
+ goto err_unmap_base;
+ }
+
+ host = ata_host_alloc(&op->dev, MAGICBOX_CF_MAXPORTS);
+ if (host == NULL) {
+ ret = -ENOMEM;
+ goto err_unmap_ctrl;
+ }
+
+ host->private_data = info;
+ magicbox_cf_setup_port(host);
+
+ ret = ata_host_activate(host, irq, ata_sff_interrupt,
+ IRQF_TRIGGER_RISING, &magicbox_cf_sht);
+ if (ret)
+ goto err_unmap_ctrl;
+
+ dev_set_drvdata(&op->dev, host);
+ return 0;
+
+ err_unmap_ctrl:
+ iounmap(info->ctrl);
+ err_unmap_base:
+ iounmap(info->base);
+ err_free_info:
+ kfree(info);
+ err_exit:
+ return ret;
+}
+
+static int magicbox_cf_of_remove(struct platform_device *op)
+{
+ struct ata_host *host = dev_get_drvdata(&op->dev);
+ struct magicbox_cf_info *info = host->private_data;
+
+ ata_host_detach(host);
+ iounmap(info->ctrl);
+ iounmap(info->base);
+ kfree(info);
+
+ return 0;
+}
+
+static struct of_device_id magicbox_cf_of_match[] = {
+ { .compatible = "pata-magicbox-cf", },
+ {},
+};
+
+static struct platform_driver magicbox_cf_of_platform_driver = {
+ .probe = magicbox_cf_of_probe,
+ .remove = magicbox_cf_of_remove,
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = magicbox_cf_of_match,
+ },
+};
+
+static int __init magicbox_cf_init(void)
+{
+ return platform_driver_register(&magicbox_cf_of_platform_driver);
+}
+
+static void __exit magicbox_cf_exit(void)
+{
+ platform_driver_unregister(&magicbox_cf_of_platform_driver);
+}
+
+module_init(magicbox_cf_init);
+module_exit(magicbox_cf_exit);
+
+MODULE_DESCRIPTION(DRV_DESC);
+MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
+MODULE_LICENSE("GPL v2");
+MODULE_VERSION(DRV_VERSION);
+MODULE_DEVICE_TABLE(of, magicbox_cf_of_match);

View File

@ -1,55 +0,0 @@
--- a/arch/powerpc/boot/dts/kilauea.dts
+++ b/arch/powerpc/boot/dts/kilauea.dts
@@ -102,8 +102,8 @@
compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
dcr-reg = <0x010 0x002>;
interrupt-parent = <&UIC2>;
- interrupts = <0x5 0x4 /* ECC DED Error */
- 0x6 0x4>; /* ECC SEC Error */
+ interrupts = <0x5 0x4 /* ECC DED Error */
+ 0x6 0x4>; /* ECC SEC Error */
};
CRYPTO: crypto@ef700000 {
@@ -157,30 +157,30 @@
reg = <0x00000000 0x00000000 0x04000000>;
#address-cells = <1>;
#size-cells = <1>;
- partition@0 {
+ partition0@0 {
label = "kernel";
reg = <0x00000000 0x001e0000>;
};
- partition@1e0000 {
+ partition1@1e0000 {
label = "dtb";
reg = <0x001e0000 0x00020000>;
};
- partition@200000 {
- label = "root";
- reg = <0x00200000 0x00200000>;
- };
- partition@400000 {
- label = "user";
- reg = <0x00400000 0x03b60000>;
+ partition2@200000 {
+ label = "rootfs";
+ reg = <0x00200000 0x03d60000>;
};
- partition@3f60000 {
+ partition3@3f60000 {
label = "env";
reg = <0x03f60000 0x00040000>;
};
- partition@3fa0000 {
+ partition4@3fa0000 {
label = "u-boot";
reg = <0x03fa0000 0x00060000>;
};
+ partition5@0 {
+ label = "firmware";
+ reg = <0x00000000 0x03f60000>;
+ };
};
ndfc@1,0 {

View File

@ -1,290 +0,0 @@
--- a/drivers/usb/host/isp116x-hcd.c
+++ b/drivers/usb/host/isp116x-hcd.c
@@ -1533,6 +1533,7 @@ static struct hc_driver isp116x_hc_drive
/*----------------------------------------------------------------*/
+#ifdef CONFIG_USB_ISP116X_HCD_PLATFORM
static int isp116x_remove(struct platform_device *pdev)
{
struct usb_hcd *hcd = platform_get_drvdata(pdev);
@@ -1711,4 +1712,251 @@ static struct platform_driver isp116x_dr
},
};
-module_platform_driver(isp116x_driver);
+static inline int isp116x_platform_register(void)
+{
+ return platform_driver_register(&isp116x_driver);
+}
+
+static inline void isp116x_platform_unregister(void)
+{
+ platform_driver_unregister(&isp116x_driver);
+}
+#else
+static inline int isp116x_platform_register(void) { return 0; };
+static void isp116x_platform_unregister(void) {};
+#endif /* CONFIG_USB_ISP116X_PLATFORM */
+
+/*-----------------------------------------------------------------*/
+
+#ifdef CONFIG_USB_ISP116X_HCD_OF
+
+/* TODO: rework platform probe instead of using a separate probe */
+
+#include <linux/of_platform.h>
+
+#ifdef USE_PLATFORM_DELAY
+static void isp116x_of_delay(struct device *ddev, int delay)
+{
+ ndelay(delay);
+}
+#else
+#define isp116x_of_delay NULL
+#endif
+
+static int isp116x_of_probe(struct platform_device *op)
+{
+ struct device_node *dn = op->dev.of_node;
+ struct usb_hcd *hcd;
+ struct isp116x *isp116x;
+ struct resource addr, data;
+ struct isp116x_platform_data *board;
+ void __iomem *addr_reg;
+ void __iomem *data_reg;
+ int irq;
+ int ret = 0;
+ unsigned long irqflags;
+
+ ret = of_address_to_resource(dn, 0, &data);
+ if (ret)
+ return ret;
+
+ ret = of_address_to_resource(dn, 1, &addr);
+ if (ret)
+ return ret;
+
+ board = kzalloc(sizeof(struct isp116x_platform_data), GFP_KERNEL);
+ if (board == NULL)
+ return -ENOMEM;
+
+ if (!request_mem_region(addr.start, resource_size(&addr), hcd_name)) {
+ ret = -EBUSY;
+ goto err_free_board;
+ }
+
+ addr_reg = ioremap_nocache(addr.start, resource_size(&addr));
+ if (addr_reg == NULL) {
+ ret = -ENOMEM;
+ goto err_release_addr;
+ }
+
+ if (!request_mem_region(data.start, resource_size(&data), hcd_name)) {
+ ret = -EBUSY;
+ goto err_unmap_addr;
+ }
+
+ data_reg = ioremap_nocache(data.start, resource_size(&data));
+ if (data_reg == NULL) {
+ ret = -ENOMEM;
+ goto err_release_data;
+ }
+
+ irq = irq_of_parse_and_map(dn, 0);
+ if (irq == NO_IRQ) {
+ ret = -EINVAL;
+ goto err_unmap_data;
+ }
+
+ /* allocate and initialize hcd */
+ hcd = usb_create_hcd(&isp116x_hc_driver, &op->dev, dev_name(&op->dev));
+ if (!hcd) {
+ ret = -ENOMEM;
+ goto err_irq_dispose;
+ }
+
+ /* this rsrc_start is bogus */
+ hcd->rsrc_start = addr.start;
+ isp116x = hcd_to_isp116x(hcd);
+ isp116x->data_reg = data_reg;
+ isp116x->addr_reg = addr_reg;
+ isp116x->board = board;
+ spin_lock_init(&isp116x->lock);
+ INIT_LIST_HEAD(&isp116x->async);
+
+ board->delay = isp116x_of_delay;
+ if (of_get_property(dn, "sel15Kres", NULL))
+ board->sel15Kres = 1;
+ if (of_get_property(dn, "oc_enable", NULL))
+ board->oc_enable = 1;
+ if (of_get_property(dn, "remote_wakeup_enable", NULL))
+ board->remote_wakeup_enable = 1;
+
+ if (of_get_property(dn, "int_act_high", NULL))
+ board->int_act_high = 1;
+ if (of_get_property(dn, "int_edge_triggered", NULL))
+ board->int_edge_triggered = 1;
+
+ if (board->int_edge_triggered)
+ irqflags = board->int_act_high ? IRQF_TRIGGER_RISING :
+ IRQF_TRIGGER_FALLING;
+ else
+ irqflags = board->int_act_high ? IRQF_TRIGGER_HIGH :
+ IRQF_TRIGGER_LOW;
+
+ ret = usb_add_hcd(hcd, irq, irqflags | IRQF_DISABLED);
+ if (ret)
+ goto err_put_hcd;
+
+ ret = create_debug_file(isp116x);
+ if (ret) {
+ ERR("Couldn't create debugfs entry\n");
+ goto err_remove_hcd;
+ }
+
+ return 0;
+
+ err_remove_hcd:
+ usb_remove_hcd(hcd);
+ err_put_hcd:
+ usb_put_hcd(hcd);
+ err_irq_dispose:
+ irq_dispose_mapping(irq);
+ err_unmap_data:
+ iounmap(data_reg);
+ err_release_data:
+ release_mem_region(data.start, resource_size(&data));
+ err_unmap_addr:
+ iounmap(addr_reg);
+ err_release_addr:
+ release_mem_region(addr.start, resource_size(&addr));
+ err_free_board:
+ kfree(board);
+ return ret;
+}
+
+static int isp116x_of_remove(struct platform_device *op)
+{
+ struct usb_hcd *hcd = dev_get_drvdata(&op->dev);
+ struct isp116x *isp116x;
+ struct resource res;
+
+ if (!hcd)
+ return 0;
+
+ dev_set_drvdata(&op->dev, NULL);
+
+ isp116x = hcd_to_isp116x(hcd);
+ remove_debug_file(isp116x);
+ usb_remove_hcd(hcd);
+
+ irq_dispose_mapping(hcd->irq);
+
+ iounmap(isp116x->data_reg);
+ (void) of_address_to_resource(op->dev.of_node, 0, &res);
+ release_mem_region(res.start, resource_size(&res));
+
+ iounmap(isp116x->addr_reg);
+ (void) of_address_to_resource(op->dev.of_node, 1, &res);
+ release_mem_region(res.start, resource_size(&res));
+
+ kfree(isp116x->board);
+ usb_put_hcd(hcd);
+
+ return 0;
+}
+
+static struct of_device_id isp116x_of_match[] = {
+ { .compatible = "isp116x-hcd", },
+ {},
+};
+
+static struct platform_driver isp116x_of_platform_driver = {
+ .probe = isp116x_of_probe,
+ .remove = isp116x_of_remove,
+ .driver = {
+ .name = "isp116x-hcd-of",
+ .owner = THIS_MODULE,
+ .of_match_table = isp116x_of_match,
+ },
+};
+
+static int __init isp116x_of_register(void)
+{
+ return platform_driver_register(&isp116x_of_platform_driver);
+}
+
+static void __exit isp116x_of_unregister(void)
+{
+ platform_driver_unregister(&isp116x_of_platform_driver);
+}
+
+MODULE_DEVICE_TABLE(of, isp116x_of_match);
+
+#else
+static inline int isp116x_of_register(void) { return 0; };
+static void isp116x_of_unregister(void) {};
+#endif /* CONFIG_USB_ISP116X_HCD_OF */
+
+/*-----------------------------------------------------------------*/
+
+static int __init isp116x_init(void)
+{
+ int ret;
+
+ if (usb_disabled())
+ return -ENODEV;
+
+ INFO("driver %s, %s\n", hcd_name, DRIVER_VERSION);
+ ret = isp116x_platform_register();
+ if (ret)
+ return ret;
+
+ ret = isp116x_of_register();
+ if (ret)
+ goto err_platform_unregister;
+
+ return 0;
+
+ err_platform_unregister:
+ isp116x_platform_unregister();
+ return ret;
+}
+
+module_init(isp116x_init);
+
+static void __exit isp116x_cleanup(void)
+{
+ isp116x_of_unregister();
+ isp116x_platform_unregister();
+}
+
+module_exit(isp116x_cleanup);
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -327,6 +327,24 @@ config USB_ISP116X_HCD
To compile this driver as a module, choose M here: the
module will be called isp116x-hcd.
+config USB_ISP116X_HCD_PLATFORM
+ bool "ISP116X support for controllers on platform bus"
+ depends on USB_ISP116X_HCD
+ default n if PPC_OF
+ default y
+ ---help---
+ Enables support for the ISP116x USB controller present on the
+ platform bus.
+
+config USB_ISP116X_HCD_OF
+ bool "ISP116X support for controllers on OF platform bus"
+ depends on USB_ISP116X_HCD && PPC_OF
+ default y if PPC_OF
+ default n
+ ---help---
+ Enables support for the ISP116x USB controller present on the
+ OpenFirmware platform bus.
+
config USB_ISP1760_HCD
tristate "ISP 1760 HCD support"
---help---

View File

@ -1,110 +0,0 @@
--- a/drivers/usb/host/isp116x.h
+++ b/drivers/usb/host/isp116x.h
@@ -354,21 +354,63 @@ struct isp116x_ep {
#define isp116x_check_platform_delay(h) 0
#endif
+#ifdef CONFIG_PPC
+static inline void isp116x_writew(u16 val, void __iomem *addr)
+{
+ writew(cpu_to_le16(val), addr);
+}
+
+static inline u16 isp116x_readw(void __iomem *addr)
+{
+ return le16_to_cpu(readw(addr));
+}
+
+static inline void isp116x_raw_writew(u16 val, void __iomem *addr)
+{
+ writew(cpu_to_le16(val), addr);
+}
+
+static inline u16 isp116x_raw_readw(void __iomem *addr)
+{
+ return le16_to_cpu(readw(addr));
+}
+#else
+static inline void isp116x_writew(u16 val, void __iomem *addr)
+{
+ writew(val, addr);
+}
+
+static inline u16 isp116x_readw(void __iomem *addr)
+{
+ return readw(addr);
+}
+
+static inline void isp116x_raw_writew(u16 val, void __iomem *addr)
+{
+ __raw_writew(val, addr);
+}
+
+static inline u16 isp116x_raw_readw(void __iomem *addr)
+{
+ return __raw_readw(addr);
+}
+#endif
+
static inline void isp116x_write_addr(struct isp116x *isp116x, unsigned reg)
{
- writew(reg & 0xff, isp116x->addr_reg);
+ isp116x_writew(reg & 0xff, isp116x->addr_reg);
isp116x_delay(isp116x, 300);
}
static inline void isp116x_write_data16(struct isp116x *isp116x, u16 val)
{
- writew(val, isp116x->data_reg);
+ isp116x_writew(val, isp116x->data_reg);
isp116x_delay(isp116x, 150);
}
static inline void isp116x_raw_write_data16(struct isp116x *isp116x, u16 val)
{
- __raw_writew(val, isp116x->data_reg);
+ isp116x_raw_writew(val, isp116x->data_reg);
isp116x_delay(isp116x, 150);
}
@@ -376,7 +418,7 @@ static inline u16 isp116x_read_data16(st
{
u16 val;
- val = readw(isp116x->data_reg);
+ val = isp116x_readw(isp116x->data_reg);
isp116x_delay(isp116x, 150);
return val;
}
@@ -385,16 +427,16 @@ static inline u16 isp116x_raw_read_data1
{
u16 val;
- val = __raw_readw(isp116x->data_reg);
+ val = isp116x_raw_readw(isp116x->data_reg);
isp116x_delay(isp116x, 150);
return val;
}
static inline void isp116x_write_data32(struct isp116x *isp116x, u32 val)
{
- writew(val & 0xffff, isp116x->data_reg);
+ isp116x_writew(val & 0xffff, isp116x->data_reg);
isp116x_delay(isp116x, 150);
- writew(val >> 16, isp116x->data_reg);
+ isp116x_writew(val >> 16, isp116x->data_reg);
isp116x_delay(isp116x, 150);
}
@@ -402,9 +444,9 @@ static inline u32 isp116x_read_data32(st
{
u32 val;
- val = (u32) readw(isp116x->data_reg);
+ val = (u32) isp116x_readw(isp116x->data_reg);
isp116x_delay(isp116x, 150);
- val |= ((u32) readw(isp116x->data_reg)) << 16;
+ val |= ((u32) isp116x_readw(isp116x->data_reg)) << 16;
isp116x_delay(isp116x, 150);
return val;
}

View File

@ -1,25 +0,0 @@
#
# Copyright (C) 2006-2011 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
ARCH:=arm
BOARD:=pxa
BOARDNAME:=Marvell/Intel PXA2xx
FEATURES:=squashfs broken
MAINTAINER:=Imre Kaloz <kaloz@openwrt.org>
KERNEL_PATCHVER:=3.3
include $(INCLUDE_DIR)/target.mk
define Target/Description
Build images for PXA2xx systems, eg. Gumstix.
endef
KERNELNAME:=uImage
$(eval $(call BuildTarget))

View File

@ -1,230 +0,0 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
CONFIG_ARCH_GUMSTIX=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
CONFIG_ARCH_HAS_CPUFREQ=y
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
# CONFIG_ARCH_LUBBOCK is not set
CONFIG_ARCH_MTD_XIP=y
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_PXA=y
# CONFIG_ARCH_PXA_ESERIES is not set
# CONFIG_ARCH_PXA_IDP is not set
# CONFIG_ARCH_PXA_PALM is not set
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_ARCH_VIPER is not set
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_ARM=y
# CONFIG_ARM_APPENDED_DTB is not set
# CONFIG_ARM_CPU_SUSPEND is not set
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_ARM_NR_BANKS=8
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARM_THUMB is not set
# CONFIG_ARPD is not set
CONFIG_ATAGS=y
CONFIG_AUTO_ZRELADDR=y
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CACHE_L2X0 is not set
CONFIG_CACHE_XSC3L2=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"
CONFIG_CMDLINE_FROM_BOOTLOADER=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
# CONFIG_CPU_BPREDICT_DISABLE is not set
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_PXA300=y
CONFIG_CPU_TLB_V4WBI=y
CONFIG_CPU_USE_DOMAINS=y
CONFIG_CPU_XSC3=y
CONFIG_CPU_XSCALE=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
# CONFIG_DEBUG_USER is not set
CONFIG_DTC=y
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_EPOLL is not set
CONFIG_FRAME_POINTER=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IO=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_DEVRES=y
CONFIG_GPIO_PXA=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_PFN_VALID=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_HAVE_BPF_JIT=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DMA_ATTRS=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_GENERIC_HARDIRQS=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_HAVE_PWM=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_UID16=y
CONFIG_HZ_PERIODIC=y
CONFIG_IO_36=y
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_WORK=y
CONFIG_IWMMXT=y
CONFIG_KTIME_SCALAR=y
# CONFIG_MACH_ARCOM_ZEUS is not set
# CONFIG_MACH_ARMCORE is not set
# CONFIG_MACH_BALLOON3 is not set
# CONFIG_MACH_CAPC7117 is not set
# CONFIG_MACH_CM_X300 is not set
# CONFIG_MACH_COLIBRI is not set
# CONFIG_MACH_COLIBRI300 is not set
# CONFIG_MACH_COLIBRI320 is not set
# CONFIG_MACH_CSB726 is not set
# CONFIG_MACH_EM_X270 is not set
# CONFIG_MACH_EXEDA is not set
# CONFIG_MACH_GUMSTIX_F is not set
CONFIG_MACH_GUMSTIX_VERDEX=y
# CONFIG_MACH_H4700 is not set
# CONFIG_MACH_H5000 is not set
# CONFIG_MACH_HIMALAYA is not set
# CONFIG_MACH_ICONTROL is not set
# CONFIG_MACH_INTELMOTE2 is not set
# CONFIG_MACH_LITTLETON is not set
# CONFIG_MACH_LOGICPD_PXA270 is not set
# CONFIG_MACH_MAGICIAN is not set
# CONFIG_MACH_MAINSTONE is not set
# CONFIG_MACH_MIOA701 is not set
# CONFIG_MACH_MP900C is not set
# CONFIG_MACH_PCM027 is not set
CONFIG_MACH_PXA3XX_DT=y
# CONFIG_MACH_RAUMFELD_CONNECTOR is not set
# CONFIG_MACH_RAUMFELD_RC is not set
# CONFIG_MACH_RAUMFELD_SPEAKER is not set
# CONFIG_MACH_SAAR is not set
# CONFIG_MACH_STARGATE2 is not set
# CONFIG_MACH_TAVOREVB is not set
# CONFIG_MACH_VPAC270 is not set
# CONFIG_MACH_XCEP is not set
# CONFIG_MACH_ZIPIT2 is not set
# CONFIG_MACH_ZYLONITE300 is not set
# CONFIG_MACH_ZYLONITE320 is not set
CONFIG_MDIO_BOARDINFO=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_PXA=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
# CONFIG_MTD_CFI_AMDSTD is not set
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_CFI_I2 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
CONFIG_MTD_OF_PARTS=y
CONFIG_MTD_PHYSMAP=y
# CONFIG_MTD_PHYSMAP_OF is not set
CONFIG_MTD_PXA2XX=y
# CONFIG_MTD_XIP is not set
CONFIG_MULTI_IRQ_HANDLER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_KUSER_HELPERS=y
CONFIG_NEED_MACH_GPIO_H=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_DEVICE=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_MDIO=y
CONFIG_OF_MTD=y
CONFIG_OF_NET=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_OUTER_CACHE=y
# CONFIG_PACKET is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PAGE_OFFSET=0xC0000000
# CONFIG_PCI_SYSCALL is not set
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PHYLIB=y
CONFIG_PLAT_PXA=y
CONFIG_POWER_SUPPLY=y
# CONFIG_PREEMPT_RCU is not set
CONFIG_PXA27x=y
CONFIG_PXA3xx=y
# CONFIG_PXA_EZX is not set
# CONFIG_PXA_SHARPSL is not set
# CONFIG_RCU_STALL_COMMON is not set
# CONFIG_SA1100_WATCHDOG is not set
CONFIG_SCHED_HRTICK=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_SMSC911X=y
# CONFIG_SMSC911X_ARCH_HOOKS is not set
CONFIG_SPARSE_IRQ=y
CONFIG_SPLIT_PTLOCK_CPUS=999999
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_TICK_CPU_ACCOUNTING=y
# CONFIG_TRIZEPS_PXA is not set
CONFIG_UID16=y
CONFIG_UIDGID_CONVERTED=y
CONFIG_UNCOMPRESS_INCLUDE="mach/uncompress.h"
# CONFIG_USB_ARCH_HAS_EHCI is not set
# CONFIG_USB_ARCH_HAS_XHCI is not set
CONFIG_USE_OF=y
CONFIG_VECTORS_BASE=0xffff0000
# CONFIG_VLAN_8021Q is not set
CONFIG_XSCALE_PMU=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZONE_DMA_FLAG=0

View File

@ -1,179 +0,0 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
CONFIG_ARCH_GUMSTIX=y
CONFIG_ARCH_HAS_CPUFREQ=y
CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
# CONFIG_ARCH_LUBBOCK is not set
CONFIG_ARCH_MTD_XIP=y
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_PXA=y
# CONFIG_ARCH_PXA_ESERIES is not set
# CONFIG_ARCH_PXA_IDP is not set
# CONFIG_ARCH_PXA_PALM is not set
# CONFIG_ARCH_PXA_V7 is not set
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
# CONFIG_ARCH_VIPER is not set
CONFIG_ARM=y
# CONFIG_ARM_CPU_SUSPEND is not set
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_ARM_NR_BANKS=8
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARM_THUMB is not set
# CONFIG_ARPD is not set
CONFIG_AUTO_ZRELADDR=y
# CONFIG_BLK_DEV_IDEDMA is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CACHE_L2X0 is not set
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CMDLINE="rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"
CONFIG_CMDLINE_FROM_BOOTLOADER=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_HAS_PMU=y
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_TLB_V4WBI=y
CONFIG_CPU_USE_DOMAINS=y
CONFIG_CPU_XSCALE=y
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_LL_UART_NONE is not set
# CONFIG_DEBUG_USER is not set
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_EPOLL is not set
CONFIG_FRAME_POINTER=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_PXA=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_AOUT=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_PFN_VALID=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_GENERIC_HARDIRQS=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IRQ_WORK=y
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_SCHED_CLOCK=y
CONFIG_HAVE_SPARSE_IRQ=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_PXA_SLAVE=y
CONFIG_IWMMXT=y
CONFIG_KTIME_SCALAR=y
# CONFIG_MACH_ARCOM_ZEUS is not set
# CONFIG_MACH_ARMCORE is not set
# CONFIG_MACH_BALLOON3 is not set
# CONFIG_MACH_CAPC7117 is not set
# CONFIG_MACH_CM_X300 is not set
# CONFIG_MACH_COLIBRI is not set
# CONFIG_MACH_COLIBRI300 is not set
# CONFIG_MACH_COLIBRI320 is not set
# CONFIG_MACH_CSB726 is not set
# CONFIG_MACH_EM_X270 is not set
# CONFIG_MACH_EXEDA is not set
# CONFIG_MACH_GUMSTIX_F is not set
CONFIG_MACH_GUMSTIX_VERDEX=y
# CONFIG_MACH_H4700 is not set
# CONFIG_MACH_H5000 is not set
# CONFIG_MACH_HIMALAYA is not set
# CONFIG_MACH_ICONTROL is not set
# CONFIG_MACH_INTELMOTE2 is not set
# CONFIG_MACH_LITTLETON is not set
# CONFIG_MACH_LOGICPD_PXA270 is not set
# CONFIG_MACH_MAGICIAN is not set
# CONFIG_MACH_MAINSTONE is not set
# CONFIG_MACH_MIOA701 is not set
# CONFIG_MACH_MP900C is not set
# CONFIG_MACH_PCM027 is not set
# CONFIG_MACH_RAUMFELD_CONNECTOR is not set
# CONFIG_MACH_RAUMFELD_RC is not set
# CONFIG_MACH_RAUMFELD_SPEAKER is not set
# CONFIG_MACH_SAAR is not set
# CONFIG_MACH_STARGATE2 is not set
# CONFIG_MACH_TAVOREVB is not set
# CONFIG_MACH_VPAC270 is not set
# CONFIG_MACH_XCEP is not set
# CONFIG_MACH_ZIPIT2 is not set
# CONFIG_MACH_ZYLONITE300 is not set
# CONFIG_MACH_ZYLONITE320 is not set
CONFIG_MDIO_BOARDINFO=y
# CONFIG_MFD_T7L66XB is not set
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_PXA=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
# CONFIG_MTD_CFI_AMDSTD is not set
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_CFI_I2 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PXA2XX=y
# CONFIG_MTD_XIP is not set
CONFIG_MULTI_IRQ_HANDLER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
# CONFIG_PACKET is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PAGE_OFFSET=0xC0000000
# CONFIG_PATA_PXA is not set
# CONFIG_PCI_SYSCALL is not set
CONFIG_PCMCIA_LOAD_CIS=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PHYLIB=y
CONFIG_PLAT_PXA=y
# CONFIG_PREEMPT_RCU is not set
CONFIG_PXA27x=y
# CONFIG_PXA_EZX is not set
# CONFIG_PXA_SHARPSL is not set
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_PROC_FS is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_SMSC911X=y
# CONFIG_SMSC911X_ARCH_HOOKS is not set
CONFIG_SPARSE_IRQ=y
CONFIG_SPLIT_PTLOCK_CPUS=999999
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
# CONFIG_TRIZEPS_PXA is not set
CONFIG_UID16=y
CONFIG_VECTORS_BASE=0xffff0000
# CONFIG_VLAN_8021Q is not set
CONFIG_XSCALE_PMU=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZONE_DMA_FLAG=0

View File

@ -1,43 +0,0 @@
#
# Copyright (C) 2008-2012 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/image.mk
define Image/BuildKernel
cp $(KDIR)/uImage $(BIN_DIR)/$(IMG_PREFIX)-uImage
endef
# Build a fake flash image for usage in Qemu
define Image/Build/Gumstix
dd if=/dev/zero bs=128k count=256 of=$(BIN_DIR)/$(IMG_PREFIX)-$(1)-qemu-flash.img
dd if=$(BIN_DIR)/openwrt-pxa-gumstix-u-boot.bin conv=notrunc bs=128k \
of=$(BIN_DIR)/$(IMG_PREFIX)-$(1)-qemu-flash.img
dd if=$(KDIR)/root.$(1) conv=notrunc bs=128k seek=2 \
of=$(BIN_DIR)/$(IMG_PREFIX)-$(1)-qemu-flash.img
dd if=$(KDIR)/uImage conv=notrunc bs=128k seek=248 \
of=$(BIN_DIR)/$(IMG_PREFIX)-$(1)-qemu-flash.img
endef
define Image/Build
$(call Image/Build/$(1),$(1))
$(call Image/Build/$(PROFILE),$(1))
endef
define Image/Build/jffs2-64k
dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/$(IMG_PREFIX)-$(1).img bs=64k conv=sync
endef
define Image/Build/jffs2-128k
dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/$(IMG_PREFIX)-$(1).img bs=128k conv=sync
endef
define Image/Build/squashfs
$(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/$(IMG_PREFIX)-$(1).img bs=128k conv=sync
endef
$(eval $(call BuildImage))

View File

@ -1,882 +0,0 @@
From 4f4bb58cba3a6c44e9f9f113609287d9d50be9c4 Mon Sep 17 00:00:00 2001
From: Joseph Kortje <jpktech@rogers.com>
Date: Wed, 28 Oct 2009 21:11:28 -0400
Subject: [PATCH] [ARM] Gumstix Verdex Pro arch support
add an option for Verdex Pro when ARCH_GUMSTIX is selected, and
factor earlier Gumstix support into a seperate option
Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
---
arch/arm/mach-pxa/Kconfig | 29 +-
arch/arm/mach-pxa/Makefile | 3 +-
arch/arm/mach-pxa/gumstix-verdex.c | 749 +++++++++++++++++++++++++++
arch/arm/mach-pxa/include/mach/mfp-pxa27x.h | 1 +
4 files changed, 772 insertions(+), 10 deletions(-)
create mode 100644 arch/arm/mach-pxa/gumstix-verdex.c
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -129,23 +129,34 @@ config MACH_CAPC7117
select PXA3xx
config ARCH_GUMSTIX
- bool "Gumstix XScale 255 boards"
- select PXA25x
+ bool "Gumstix boards"
help
- Say Y here if you intend to run this kernel on
- Basix, Connex, ws-200ax, ws-400ax systems
+ Say Y here if you intend to run this kernel on a
+ gumstix computer.
-choice
- prompt "Gumstix Carrier/Expansion Board"
depends on ARCH_GUMSTIX
-config GUMSTIX_AM200EPD
+config MACH_GUMSTIX_F
+ bool "Gumstix Basix/Connex ..."
+ depends on ARCH_GUMSTIX
+ select PXA25x
+
+ choice
+ prompt "Gumstix Carrier/Expansion Board"
+ depends on MACH_GUMSTIX_F
+
+ config GUMSTIX_AM200EPD
bool "Enable AM200EPD board support"
-config GUMSTIX_AM300EPD
+ config GUMSTIX_AM300EPD
bool "Enable AM300EPD board support"
-endchoice
+ endchoice
+
+config MACH_GUMSTIX_VERDEX
+ bool "Gumstix VERDEX ..."
+ depends on ARCH_GUMSTIX
+ select PXA27x
config MACH_INTELMOTE2
bool "Intel Mote 2 Platform"
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -45,7 +45,8 @@ endif
obj-$(CONFIG_MACH_EM_X270) += em-x270.o
obj-$(CONFIG_MACH_CM_X300) += cm-x300.o
obj-$(CONFIG_MACH_CAPC7117) += capc7117.o mxm8x10.o
-obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o
+obj-$(CONFIG_MACH_GUMSTIX_F) += gumstix.o
+obj-$(CONFIG_MACH_GUMSTIX_VERDEX) += gumstix-verdex.o
obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o
obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o
obj-$(CONFIG_MACH_INTELMOTE2) += stargate2.o
--- /dev/null
+++ b/arch/arm/mach-pxa/gumstix-verdex.c
@@ -0,0 +1,794 @@
+/*
+ * linux/arch/arm/mach-pxa/gumstix-verdex.c
+ *
+ * Support for the Gumstix verdex motherboard.
+ *
+ * Original Author: Craig Hughes
+ * Created: Feb 14, 2008
+ * Copyright: Craig Hughes
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Implemented based on lubbock.c by Nicolas Pitre and code from Craig
+ * Hughes
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/i2c/tsc2007.h>
+#include <linux/i2c/pxa-i2c.h>
+#include <linux/gpio.h>
+#include <linux/gpio-pxa.h>
+
+#include <asm/setup.h>
+#include <asm/memory.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+#include <asm/sizes.h>
+#include <asm/io.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/flash.h>
+
+#include <linux/platform_data/mmc-pxamci.h>
+#include <mach/udc.h>
+#include <linux/platform_data/video-pxafb.h>
+#include <linux/platform_data/usb-ohci-pxa27x.h>
+#include <mach/pxa27x.h>
+#include <mach/pxa27x-udc.h>
+#include <mach/gpio.h>
+
+#include <mach/gumstix.h>
+
+#include "generic.h"
+
+#include <linux/delay.h>
+
+static struct resource flash_resource = {
+ .start = 0x00000000,
+ .end = SZ_64M - 1,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct mtd_partition gumstix_partitions[] = {
+ {
+ .name = "u-boot",
+ .size = 0x00040000,
+ .offset = 0,
+ .mask_flags = MTD_WRITEABLE /* force read-only */
+ } , {
+ .name = "rootfs",
+ .size = 0x01ec0000,
+ .offset = 0x00040000
+ } , {
+ .name = "kernel",
+ .size = 0x00100000,
+ .offset = 0x01f00000
+ }
+};
+
+static struct flash_platform_data gumstix_flash_data = {
+ .map_name = "cfi_probe",
+ .parts = gumstix_partitions,
+ .nr_parts = ARRAY_SIZE(gumstix_partitions),
+ .width = 2,
+};
+
+static struct platform_device gumstix_flash_device = {
+ .name = "pxa2xx-flash",
+ .id = 0,
+ .dev = {
+ .platform_data = &gumstix_flash_data,
+ },
+ .resource = &flash_resource,
+ .num_resources = 1,
+};
+
+#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) \
+ || defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
+
+#include <linux/smsc911x.h>
+
+static struct resource verdex_smsc911x_resources[] = {
+ [0] = {
+ .name = "smsc911x-memory",
+ .start = PXA_CS1_PHYS,
+ .end = PXA_CS1_PHYS + 0x000fffff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0),
+ .end = PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0),
+ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
+ },
+};
+
+static struct smsc911x_platform_config verdex_smsc911x_config = {
+ .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+ .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
+ .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
+};
+
+static struct platform_device verdex_smsc911x_device = {
+ .name = "smsc911x",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(verdex_smsc911x_resources),
+ .resource = verdex_smsc911x_resources,
+ .dev = {
+ .platform_data = &verdex_smsc911x_config,
+ },
+};
+#endif
+
+#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
+static void __init verdex_init_smsc911x(void)
+{
+
+ printk(KERN_INFO "Initializing Gumstix verdex smsc911x\n");
+
+ if (gpio_request(GPIO_GUMSTIX_ETH0_RST, "SMSC911x_ETH0_RST") != 0) {
+ printk(KERN_ERR "could not obtain gpio for SMSC911x_ETH0_RST\n");
+ goto err_request_gpio_eth0_rst;
+ }
+
+ if (gpio_request(GPIO_GUMSTIX_ETH0, "SMSC911x_ETH0_IRQ") != 0) {
+ printk(KERN_ERR "could not obtain gpio for SMSC911x_ETH0_IRQ\n");
+ goto err_request_gpio_eth0_irq;
+ }
+
+ if (gpio_direction_output(GPIO_GUMSTIX_ETH0_RST, 0) != 0) {
+ printk(KERN_ERR "could not set SMSC911x_ETH0_RST pin to output\n");
+ goto err_dir;
+ }
+
+ gpio_set_value(GPIO_GUMSTIX_ETH0_RST, 0);
+
+ msleep(500); // Hold RESET for at least 200ms
+
+ gpio_set_value(GPIO_GUMSTIX_ETH0_RST, 1);
+
+ msleep(50);
+
+ if (gpio_direction_input(GPIO_GUMSTIX_ETH0) != 0) {
+ printk(KERN_ERR "could not set SMSC911x_ETH0_IRQ pin to input\n");
+ goto err_dir;
+ }
+
+ gpio_export(GPIO_GUMSTIX_ETH0, 0);
+ platform_device_register(&verdex_smsc911x_device);
+ return;
+
+err_dir:
+ gpio_free(GPIO_GUMSTIX_ETH0_RST);
+
+err_request_gpio_eth0_irq:
+ gpio_free(GPIO_GUMSTIX_ETH0);
+
+err_request_gpio_eth0_rst:
+ return;
+}
+
+#else
+static void __init verdex_init_smsc911x(void) { return; }
+#endif
+
+static unsigned long verdex_pin_config[] = {
+ /* MMC */
+ GPIO32_MMC_CLK,
+ GPIO112_MMC_CMD,
+ GPIO92_MMC_DAT_0,
+ GPIO109_MMC_DAT_1,
+ GPIO110_MMC_DAT_2,
+ GPIO111_MMC_DAT_3,
+
+ /* BTUART */
+ GPIO42_BTUART_RXD,
+ GPIO43_BTUART_TXD,
+ GPIO44_BTUART_CTS,
+ GPIO45_BTUART_RTS,
+
+ /* STUART */
+ GPIO46_STUART_RXD,
+ GPIO47_STUART_TXD,
+
+ /* FFUART */
+ GPIO34_FFUART_RXD,
+ GPIO39_FFUART_TXD,
+
+ /* SSP 2 */
+ GPIO19_SSP2_SCLK,
+ GPIO14_SSP2_SFRM,
+ GPIO13_SSP2_TXD,
+ GPIO11_SSP2_RXD,
+
+ /* SDRAM and local bus */
+ GPIO49_nPWE,
+ GPIO15_nCS_1,
+
+ /* I2C */
+ GPIO117_I2C_SCL,
+ GPIO118_I2C_SDA,
+
+ /* PWM 0 */
+ GPIO16_PWM0_OUT,
+
+ /* BRIGHTNESS */
+ GPIO17_PWM1_OUT,
+
+ /* LCD */
+ GPIO58_LCD_LDD_0,
+ GPIO59_LCD_LDD_1,
+ GPIO60_LCD_LDD_2,
+ GPIO61_LCD_LDD_3,
+ GPIO62_LCD_LDD_4,
+ GPIO63_LCD_LDD_5,
+ GPIO64_LCD_LDD_6,
+ GPIO65_LCD_LDD_7,
+ GPIO66_LCD_LDD_8,
+ GPIO67_LCD_LDD_9,
+ GPIO68_LCD_LDD_10,
+ GPIO69_LCD_LDD_11,
+ GPIO70_LCD_LDD_12,
+ GPIO71_LCD_LDD_13,
+ GPIO72_LCD_LDD_14,
+ GPIO73_LCD_LDD_15,
+ GPIO74_LCD_FCLK,
+ GPIO75_LCD_LCLK,
+ GPIO76_LCD_PCLK,
+#ifdef CONFIG_FB_PXA_SHARP_LQ043_PSP
+ /* DISP must be always high while screen is on */
+ /* Done below in verdex_init */
+#else
+ GPIO77_LCD_BIAS,
+#endif
+};
+
+#if defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
+
+static unsigned long gpio_ntschg_0[] = {
+ GPIO104_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_nCD_0_MD);
+};
+
+static unsigned long gpio_ntschg_1[] = {
+ GPIO18_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_nSTSCHG_1_MD);
+ GPIO36_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_nCD_1_MD);
+ GPIO27_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_PRDY_nBSY_1_MD);
+};
+
+static unsigned long gpio_prdy_nbsy_old[] = {
+ GPIO111_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_nSTSCHG_0_MD);
+ GPIO109_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_PRDY_nBSY_0_OLD_MD);
+};
+
+static unsigned long gpio_prdy_nbsy[] = {
+ GPIO96_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_PRDY_nBSY_0_MD);
+};
+
+static unsigned long gpio_nhw_init[] = {
+ GPIO48_nPOE, // pxa_gpio_mode(GPIO_GUMSTIX_nPOE_MD);
+ GPIO102_nPCE_1, // pxa_gpio_mode(GPIO_GUMSTIX_nPCE_1_MD);
+ GPIO105_nPCE_2, // pxa_gpio_mode(GPIO_GUMSTIX_nPCE_2_MD);
+ GPIO104_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_nCD_0_MD);
+
+ GPIO49_nPWE, // pxa_gpio_mode(GPIO_GUMSTIX_nPWE_MD);
+ GPIO50_nPIOR, // pxa_gpio_mode(GPIO_GUMSTIX_nPIOR_MD);
+ GPIO51_nPIOW, // pxa_gpio_mode(GPIO_GUMSTIX_nPIOW_MD);
+ GPIO79_PSKTSEL, // pxa_gpio_mode(GPIO_GUMSTIX_pSKTSEL_MD);
+ GPIO55_nPREG, // pxa_gpio_mode(GPIO_GUMSTIX_nPREG_MD);
+ GPIO56_nPWAIT, // pxa_gpio_mode(GPIO_GUMSTIX_nPWAIT_MD);
+ GPIO57_nIOIS16, // pxa_gpio_mode(GPIO_GUMSTIX_nIOIS16_MD);
+};
+
+static int net_cf_vx_mode = 0;
+static int pcmcia_cf_nr = 2;
+
+inline void __init gumstix_pcmcia_cpld_clk(void)
+{
+ gpio_set_value(GPIO_GUMSTIX_nPOE, 0);
+ gpio_set_value(GPIO_GUMSTIX_nPOE, 1);
+}
+
+inline unsigned char __init gumstix_pcmcia_cpld_read_bits(int bits)
+{
+ unsigned char result = 0;
+ unsigned int shift = 0;
+ while(bits--)
+ {
+ result |= !!(gpio_get_value(GPIO_GUMSTIX_nCD_0) & GPIO_bit(GPIO_GUMSTIX_nCD_0)) << shift;
+ shift ++;
+ gumstix_pcmcia_cpld_clk();
+ }
+ printk("CPLD responded with: %02x\n",result);
+ return result;
+}
+
+/* We use the CPLD on the CF-CF card to read a value from a shift register. If we can read that
+ * magic sequence, then we have 2 CF cards; otherwise we assume just one
+ * The CPLD will send the value of the shift register on GPIO11 (the CD line for slot 0)
+ * when RESET is held in reset. We use GPIO48 (nPOE) as a clock signal,
+ * GPIO52/53 (card enable for both cards) to control read/write to the shift register
+ */
+static void __init gumstix_count_cards(void)
+{
+ if ((gpio_request(GPIO_GUMSTIX_nPOE, "GPIO_GUMSTIX_nPOE") == 0) &&
+ (gpio_direction_output(GPIO_GUMSTIX_nPOE, 1) == 0))
+ gpio_export(GPIO_GUMSTIX_nPOE, 0);
+ else
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_nPOE\n");
+
+ if ((gpio_request(GPIO_GUMSTIX_nPCE_1, "GPIO_GUMSTIX_nPCE_1") == 0) &&
+ (gpio_direction_output(GPIO_GUMSTIX_nPCE_1, 1) == 0))
+ gpio_export(GPIO_GUMSTIX_nPCE_1, 0);
+ else
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_nPCE_1\n");
+
+ if ((gpio_request(GPIO_GUMSTIX_nPCE_2, "GPIO_GUMSTIX_nPCE_2") == 0) &&
+ (gpio_direction_output(GPIO_GUMSTIX_nPCE_2, 1) == 0))
+ gpio_export(GPIO_GUMSTIX_nPCE_2, 0);
+ else
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_nPCE_2\n");
+
+ if ((gpio_request(GPIO_GUMSTIX_nCD_0, "GPIO_GUMSTIX_nCD_0") == 0) &&
+ (gpio_direction_input(GPIO_GUMSTIX_nCD_0) == 0))
+ gpio_export(GPIO_GUMSTIX_nCD_0, 0);
+ else
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_nCD_0\n");
+
+ if (net_cf_vx_mode) {
+ if ((gpio_request(GPIO_GUMSTIX_CF_OLD_RESET, "GPIO_GUMSTIX_CF_OLD_RESET") == 0) &&
+ (gpio_direction_output(GPIO_GUMSTIX_CF_OLD_RESET, 1) == 0)) {
+ gpio_export(GPIO_GUMSTIX_CF_OLD_RESET, 0);
+ } else {
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_CF_OLD_RESET\n");
+ }
+ } else {
+ if ((gpio_request(GPIO_GUMSTIX_CF_RESET, "GPIO_GUMSTIX_CF_RESET") == 0) &&
+ (gpio_direction_output(GPIO_GUMSTIX_CF_RESET, 1) == 0)) {
+ gpio_export(GPIO_GUMSTIX_CF_RESET, 0);
+ } else {
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_CF_RESET\n");
+ }
+ }
+
+ // Setup the shift register
+ gpio_set_value(GPIO_GUMSTIX_nPCE_1, 1);
+ gpio_set_value(GPIO_GUMSTIX_nPCE_2, 0);
+
+ // Tick the clock to program the shift register
+ gumstix_pcmcia_cpld_clk();
+
+ // Now set shift register into read mode
+ gpio_set_value(GPIO_GUMSTIX_nPCE_1, 0);
+ gpio_set_value(GPIO_GUMSTIX_nPCE_2, 1);
+
+ // We can read the bits now -- 0xC2 means "Dual compact flash"
+ if(gumstix_pcmcia_cpld_read_bits(8) != 0xC2)
+ {
+ // We do not have 2 CF slots
+ pcmcia_cf_nr = 1;
+ }
+
+ udelay(50);
+
+ if (net_cf_vx_mode) {
+ gpio_set_value(GPIO_GUMSTIX_CF_OLD_RESET, 0);
+ gpio_free(GPIO_GUMSTIX_CF_OLD_RESET);
+ } else {
+ gpio_set_value(GPIO_GUMSTIX_CF_RESET, 0);
+ gpio_free(GPIO_GUMSTIX_CF_RESET);
+ }
+
+ printk(KERN_INFO "found %d CF slots\n", pcmcia_cf_nr);
+
+ gpio_free(GPIO_GUMSTIX_nPCE_2);
+ gpio_free(GPIO_GUMSTIX_nPCE_1);
+ gpio_free(GPIO_GUMSTIX_nPOE);
+ return;
+}
+
+#define SMC_IO_EXTENT 16
+#define BANK_SELECT 14
+
+static void __init verdex_pcmcia_pin_config(void)
+{
+ struct resource *res;
+ void *network_controller_memory;
+ struct platform_device *pdev = &verdex_smsc911x_device;
+
+ printk(KERN_INFO "Initializing Gumstix verdex pcmcia\n");
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (res == NULL) {
+ printk(KERN_ERR "no memory resource defined\n");
+ goto err_done;
+ }
+
+ res = request_mem_region(res->start, SMC_IO_EXTENT, "smc91x probe");
+ if (res == NULL) {
+ printk(KERN_ERR "failed to request memory resource\n");
+ goto err_done;
+ }
+
+ // We check for the possibility of SMSC91c111 (reg base offset 0x300 from CS1 base)
+ network_controller_memory = ioremap(res->start + 0x300, SMC_IO_EXTENT);
+ if (network_controller_memory == NULL) {
+ printk(KERN_ERR "failed to ioremap() registers\n");
+ goto err_free_mem;
+ }
+
+ // Look for the special 91c111 value in the bank select register
+ if((0xff00 & readw(network_controller_memory+BANK_SELECT)) == 0x3300) {
+ printk(KERN_INFO "Detected netCF-vx board: pcmcia using older GPIO configuration\n");
+ net_cf_vx_mode = 1;
+ } else {
+ printk(KERN_INFO "Not netCF-vx board: pcmcia using newer GPIO configuration\n");
+ net_cf_vx_mode = 0;
+ }
+
+ iounmap(network_controller_memory);
+err_free_mem:
+ release_mem_region(res->start, SMC_IO_EXTENT);
+err_done:
+
+ gumstix_count_cards(); // this can update pcmcia_cf_nr
+
+ // If pcmcia_cf_nr is 1 then we do not have 2 CF slots
+ // Note: logic sequence was altered from previous kernel revs
+ // so that this works as intended now.
+ if (pcmcia_cf_nr != 0)
+ {
+ pxa2xx_mfp_config(ARRAY_AND_SIZE(gpio_ntschg_0));
+
+ if(net_cf_vx_mode)
+ pxa2xx_mfp_config(gpio_prdy_nbsy_old, 1);
+ else
+ pxa2xx_mfp_config(gpio_prdy_nbsy, 1);
+
+ } else {
+ // Note: this reconfigures pin GPIO18 to be GPIO-IN so make
+ // sure that this only gets done for the old dual slot board
+ // since that pin is an active AF1 out-mode signal (RDY) on
+ // newer boards and changing the pin mode on the newer boards
+ // would result in memory corruption for the NIC (and hang during
+ // PHY test).
+ pxa2xx_mfp_config(ARRAY_AND_SIZE(gpio_ntschg_1));
+ }
+
+ pxa2xx_mfp_config(ARRAY_AND_SIZE(gpio_nhw_init));
+ return;
+}
+
+int __init gumstix_get_cf_cards(void)
+{
+ return pcmcia_cf_nr;
+}
+EXPORT_SYMBOL(gumstix_get_cf_cards);
+
+#ifdef CONFIG_MACH_GUMSTIX_VERDEX
+int __init gumstix_check_if_netCF_vx(void)
+{
+ return net_cf_vx_mode;
+}
+EXPORT_SYMBOL(gumstix_check_if_netCF_vx);
+#endif
+
+#endif
+
+#if defined(CONFIG_FB_PXA_SHARP_LQ043_PSP) || defined(CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C)
+static void gumstix_lcd_backlight(int on_or_off)
+{
+ int err;
+ err = gpio_request(17, "LCD BACKLIGHT");
+ if (err) {
+ //pr_warning("Gumstix Verdex: Failed to request LCD Backlight gpio\n");
+ return;
+ }
+
+ if(on_or_off) {
+ gpio_direction_input(17);
+ } else {
+ gpio_set_value(17, 0);
+ gpio_direction_output(17, 0);
+ gpio_set_value(17, 0);
+ }
+
+ return;
+}
+#endif
+
+#ifdef CONFIG_FB_PXA_ALPS_CDOLLAR
+static struct pxafb_mode_info gumstix_fb_mode = {
+ .pixclock = 300000,
+ .xres = 240,
+ .yres = 320,
+ .bpp = 16,
+ .hsync_len = 2,
+ .left_margin = 1,
+ .right_margin = 1,
+ .vsync_len = 3,
+ .upper_margin = 0,
+ .lower_margin = 0,
+ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+};
+
+static struct pxafb_mach_info gumstix_fb_info = {
+ .modes = &gumstix_fb_mode,
+ .num_modes = 1,
+ .lccr0 = LCCR0_Pas | LCCR0_Sngl | LCCR0_Color,
+ .lccr3 = LCCR3_PixFlEdg,
+};
+#elif defined(CONFIG_FB_PXA_SHARP_LQ043_PSP)
+static struct pxafb_mode_info gumstix_fb_mode = {
+ .pixclock = 110000,
+ .xres = 480,
+ .yres = 272,
+ .bpp = 16,
+ .hsync_len = 41,
+ .left_margin = 2,
+ .right_margin = 2,
+ .vsync_len = 10,
+ .upper_margin = 2,
+ .lower_margin = 2,
+ .sync = 0, // Hsync and Vsync both active low
+};
+
+static struct pxafb_mach_info gumstix_fb_info = {
+ .modes = &gumstix_fb_mode,
+ .num_modes = 1,
+ .lccr0 = LCCR0_Act | LCCR0_Sngl | LCCR0_Color,
+ .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | (0 << 30),
+ .pxafb_backlight_power = &gumstix_lcd_backlight,
+};
+#elif defined(CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C)
+static struct pxafb_mode_info gumstix_fb_mode = {
+ .pixclock = 108696, // 9.2MHz typical DOTCLK from datasheet
+ .xres = 480,
+ .hsync_len = 41, // HLW from datasheet: 41 typ
+ .left_margin = 4, // HBP - HLW from datasheet: 45 - 41 = 4
+ .right_margin = 8, // HFP from datasheet: 8 typ
+ .yres = 272,
+ .vsync_len = 10, // VLW from datasheet: 10 typ
+ .upper_margin = 2, // VBP - VLW from datasheet: 12 - 10 = 2
+ .lower_margin = 4, // VFP from datasheet: 4 typ
+ .bpp = 16,
+ .sync = 0, // Hsync and Vsync both active low
+};
+
+static struct pxafb_mach_info gumstix_fb_info = {
+ .modes = &gumstix_fb_mode,
+ .num_modes = 1,
+ .lccr0 = LCCR0_Act | LCCR0_Sngl | LCCR0_Color,
+ .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | (0 << 30),
+ .pxafb_backlight_power = &gumstix_lcd_backlight,
+};
+#endif
+
+static struct platform_device verdex_audio_device = {
+ .name = "pxa2xx-ac97",
+ .id = -1,
+};
+
+static struct platform_device *devices[] __initdata = {
+ &gumstix_flash_device,
+ &verdex_audio_device,
+};
+
+/* PXA27x OHCI controller setup */
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
+static int ohci_verdex_init(struct device *dev)
+{
+ // Turn on port 2 in host mode
+ UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
+
+ /* See drivers/usb/host/ohci-pxa27x.c for further details but
+ ENABLE_PORT_ALL flag is equivalent to using this old sequence:
+ UHCHR = (UHCHR) &
+ ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
+ */
+ return 0;
+}
+
+static struct pxaohci_platform_data verdex_ohci_platform_data = {
+ .port_mode = PMM_PERPORT_MODE,
+ .flags = ENABLE_PORT_ALL,
+ .init = ohci_verdex_init,
+};
+
+static void __init verdex_ohci_init(void)
+{
+ pxa_set_ohci_info(&verdex_ohci_platform_data);
+}
+#else
+static void __init verdex_ohci_init(void) {
+ printk(KERN_INFO "Gumstix verdex host usb ohci is disabled\n");
+}
+#endif
+
+
+#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
+static struct pxamci_platform_data verdex_mci_platform_data;
+
+static int verdex_mci_init(struct device *dev, irq_handler_t detect_int,
+ void *data)
+{
+ /* GPIO setup for MMC on the 120-pin connector is done in verdex_init.
+ * There is no card detect on a uSD connector so no interrupt to
+ * register. There is no WP detect GPIO line either.
+ */
+
+ return 0;
+}
+
+static struct pxamci_platform_data verdex_mci_platform_data = {
+ .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
+ .init = verdex_mci_init,
+ .gpio_card_detect = -1,
+ .gpio_card_ro = -1,
+ .gpio_power = -1,
+};
+
+static void __init verdex_mmc_init(void)
+{
+ pxa_set_mci_info(&verdex_mci_platform_data);
+}
+#else
+static void __init verdex_mmc_init(void)
+{
+ printk(KERN_INFO "Gumstix verdex mmc disabled\n");
+}
+#endif
+
+#if defined(CONFIG_USB_GADGET_PXA2XX) || defined(CONFIG_USB_GADGET_PXA2XX_MODULE)
+static struct pxa2xx_udc_mach_info verdex_udc_info __initdata = {
+ .gpio_vbus = GPIO35,
+ .gpio_pullup = GPIO41,
+};
+
+static void __init verdex_udc_init(void)
+{
+ pxa_set_udc_info(&verdex_udc_info);
+}
+#else
+static void __init verdex_udc_init(void)
+{
+ printk(KERN_INFO "Gumstix verdex udc is disabled\n");
+}
+#endif
+
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
+
+#if defined(CONFIG_TOUCHSCREEN_TSC2003) || defined(CONFIG_TOUCHSCREEN_TSC2003_MODULE)
+
+#define VERDEX_GPIO_PENDOWN 16
+
+static int tsc2003_init_platform_hw(void)
+{
+ return 0;
+}
+
+static void tsc2003_exit_platform_hw(void)
+{
+ return;
+}
+
+static void tsc2003_clear_penirq(void)
+{
+ return;
+}
+
+static int tsc2003_get_pendown_state(void)
+{
+ return !gpio_get_value(VERDEX_GPIO_PENDOWN);
+}
+
+static struct tsc2007_platform_data tsc2003_config = {
+ .model = 2003,
+ .x_plate_ohms = 100,
+ .get_pendown_state = tsc2003_get_pendown_state,
+ .clear_penirq = tsc2003_clear_penirq,
+ .init_platform_hw = tsc2003_init_platform_hw,
+ .exit_platform_hw = tsc2003_exit_platform_hw,
+};
+#endif
+
+static struct i2c_board_info __initdata verdex_i2c_board_info[] = {
+#if defined(CONFIG_RTC_DRV_DS1307) || defined(CONFIG_RTC_DRV_DS1307_MODULE)
+ {
+ I2C_BOARD_INFO("rtc-ds1307", 0x68),
+ },
+#endif
+#if defined(CONFIG_TOUCHSCREEN_TSC2003) || defined(CONFIG_TOUCHSCREEN_TSC2003_MODULE)
+ {
+ I2C_BOARD_INFO("tsc2003", 0x48),
+ .platform_data = &tsc2003_config,
+ .irq = IRQ_GPIO(VERDEX_GPIO_PENDOWN),
+ },
+#endif
+};
+
+static struct i2c_pxa_platform_data verdex_i2c_pwr_info = {
+ .fast_mode = 1,
+};
+
+static struct i2c_pxa_platform_data verdex_i2c_info = {
+ .fast_mode = 1,
+};
+
+static void __init verdex_i2c_init(void)
+{
+ printk(KERN_INFO "Initializing Gumstix verdex i2c\n");
+
+#if defined(CONFIG_TOUCHSCREEN_TSC2003) || defined(CONFIG_TOUCHSCREEN_TSC2003_MODULE)
+ if ((gpio_request(VERDEX_GPIO_PENDOWN, "TSC2003_PENDOWN") == 0) &&
+ (gpio_direction_input(VERDEX_GPIO_PENDOWN) == 0)) {
+ gpio_export(VERDEX_GPIO_PENDOWN, 0);
+ } else {
+ printk(KERN_ERR "could not obtain gpio for TSC2003_PENDOWN\n");
+ return;
+ }
+#endif
+
+ i2c_register_board_info(0, verdex_i2c_board_info,
+ ARRAY_SIZE(verdex_i2c_board_info));
+ pxa_set_i2c_info(&verdex_i2c_info);
+ pxa27x_set_i2c_power_info(&verdex_i2c_pwr_info);
+}
+#else
+static inline void verdex_i2c_init(void) {}
+#endif
+
+#if defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
+static void __init verdex_pcmcia_init(void)
+{
+ verdex_pcmcia_pin_config();
+}
+#else
+static void __init verdex_pcmcia_init(void) {
+ printk(KERN_INFO "Gumstix verdex pcmcia is disabled\n");
+}
+#endif
+
+
+static void __init verdex_init(void)
+{
+ pxa2xx_mfp_config(ARRAY_AND_SIZE(verdex_pin_config));
+
+#ifdef CONFIG_FB_PXA_SHARP_LQ043_PSP
+ /* DISP must be always high while screen is on */
+ gpio_direction_output(GPIO77, 0);
+ gpio_set_value(GPIO77, 1);
+#endif
+ verdex_udc_init();
+ verdex_mmc_init();
+ verdex_ohci_init();
+ verdex_i2c_init();
+ verdex_init_smsc911x();
+ verdex_pcmcia_init();
+
+#if defined(CONFIG_FB_PXA_ALPS_CDOLLAR) || defined(CONFIG_FB_PXA_SHARP_LQ043_PSP) || defined(CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C)
+ printk(KERN_INFO "Initializing Gumstix verdex FB info\n");
+ set_pxa_fb_info(&gumstix_fb_info);
+#endif
+ printk(KERN_INFO "Initializing Gumstix platform_add_devices\n");
+ (void) platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+MACHINE_START(GUMSTIX, "Gumstix verdex")
+ .atag_offset = 0x100, /* match u-boot bi_boot_params */
+ .map_io = pxa27x_map_io,
+ .init_irq = pxa27x_init_irq,
+ .handle_irq = pxa27x_handle_irq,
+ .init_time = pxa_timer_init,
+ .init_machine = verdex_init,
+ .restart = pxa_restart,
+MACHINE_END
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
@@ -109,6 +109,7 @@
#define GPIO54_nPCE_2 MFP_CFG_OUT(GPIO54, AF2, DRIVE_HIGH)
#define GPIO78_nPCE_2 MFP_CFG_OUT(GPIO78, AF1, DRIVE_HIGH)
#define GPIO87_nPCE_2 MFP_CFG_IN(GPIO87, AF1)
+#define GPIO105_nPCE_2 MFP_CFG_OUT(GPIO105, AF1, DRIVE_HIGH)
#define GPIO55_nPREG MFP_CFG_OUT(GPIO55, AF2, DRIVE_HIGH)
#define GPIO50_nPIOR MFP_CFG_OUT(GPIO50, AF2, DRIVE_HIGH)
#define GPIO51_nPIOW MFP_CFG_OUT(GPIO51, AF2, DRIVE_HIGH)

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@ -1,52 +0,0 @@
From eb92a178eceae4e5d18bbb442b8e44cb88457d60 Mon Sep 17 00:00:00 2001
From: Joseph Kortje <jpktech@rogers.com>
Date: Wed, 28 Oct 2009 21:25:57 -0400
Subject: [PATCH] [ARM] Gumstix Verdex LCD config options
add options to Kconfig for Verdex LCD support
Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
---
drivers/video/Kconfig | 31 +++++++++++++++++++++++++++++++
1 files changed, 31 insertions(+), 0 deletions(-)
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1905,6 +1905,37 @@ config FB_PXA
say M here and read <file:Documentation/kbuild/modules.txt>.
If unsure, say N.
+choice
+ depends on FB_PXA
+ prompt "LCD Panel"
+ default FB_PXA_SAMSUNG_LTE430WQ_F0C
+
+config FB_PXA_ALPS_CDOLLAR
+ boolean "Chris Dollar's ALPS screen"
+ ---help---
+ Enable definitions (over-ridable on the kernel command line if
+ "PXA LCD command line parameters" is also selected) for an ALPS
+ screen which Chris Dollar uses
+
+config FB_PXA_SHARP_LQ043_PSP
+ boolean "SHARP LQ043... series"
+ ---help---
+ Enable definitions (over-ridable on the kernel command line if
+ "PXA LCD command line parameters" is also selected) for a SHARP
+ LQ043... screen, such as the one used by the PSP. These screens are
+ the ones normally sold by gumstix with its boards.
+
+config FB_PXA_SAMSUNG_LTE430WQ_F0C
+ boolean "Samsung LTE430WQ-F0C (standard gumstix LCD)"
+ ---help---
+ Enable definitions for a Samsung LTE430WQ-F0C LCD panel, such as the ones resold
+ by gumstix for use with their "LCD-Ready" boards.
+
+config FB_PXA_NONEOFTHEABOVE
+ boolean "None of the above"
+
+endchoice
+
config FB_PXA_OVERLAY
bool "Support PXA27x/PXA3xx Overlay(s) as framebuffer"

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@ -1,214 +0,0 @@
From adb6abbe4e3bc17c20cdc70e4a4357f1633d4970 Mon Sep 17 00:00:00 2001
From: Joseph Kortje <jpktech@rogers.com>
Date: Wed, 28 Oct 2009 21:49:11 -0400
Subject: [PATCH] [ARM] gumstix.h: Verdex Pro support
Added a bunch of ifdefs to support both original gumstix boards
as well as the Verdex Pro in gumstix.h
Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
---
arch/arm/mach-pxa/include/mach/gumstix.h | 160 ++++++++++++++++++++++++------
1 files changed, 130 insertions(+), 30 deletions(-)
--- a/arch/arm/mach-pxa/include/mach/gumstix.h
+++ b/arch/arm/mach-pxa/include/mach/gumstix.h
@@ -6,6 +6,9 @@
* published by the Free Software Foundation.
*/
+#if !defined(__ASM_ARCH_MFP_PXA27X_H) && !defined(__ASM_ARCH_MFP_PXA25X_H)
+ #error You need to include either mfp-pxa27x.h or mfp-pxa25x.h
+#endif
/* BTRESET - Reset line to Bluetooth module, active low signal. */
#define GPIO_GUMSTIX_BTRESET 7
@@ -20,9 +23,18 @@ this moves to GPIO17 and GPIO37. */
/* GPIOx - Connects to USB D+ and used as a pull-up after GPIOn
has detected a cable insertion; driven low otherwise. */
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
+
#define GPIO_GUMSTIX_USB_GPIOn 35
#define GPIO_GUMSTIX_USB_GPIOx 41
+#else
+
+#define GPIO_GUMSTIX_USB_GPIOn 100
+#define GPIO_GUMSTIX_USB_GPIOx 27
+
+#endif
+
/* usb state change */
#define GUMSTIX_USB_INTR_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_USB_GPIOn)
@@ -42,48 +54,136 @@ has detected a cable insertion; driven l
* ETH_RST provides a hardware reset line to the ethernet chip
* ETH is the IRQ line in from the ethernet chip to the PXA
*/
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
#define GPIO_GUMSTIX_ETH0_RST 80
-#define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
+#define GPIO_GUMSTIX_ETH0 36
+#else
+#define GPIO_GUMSTIX_ETH0_RST 107
+#define GPIO_GUMSTIX_ETH0 99
+#endif
#define GPIO_GUMSTIX_ETH1_RST 52
-#define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
+#define GPIO_GUMSTIX_ETH1 27
-#define GPIO_GUMSTIX_ETH0 36
+#define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
+#define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN)
-#define GUMSTIX_ETH0_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0)
-#define GPIO_GUMSTIX_ETH1 27
#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN)
-#define GUMSTIX_ETH1_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1)
-
-/* CF reset line */
-#define GPIO8_RESET 8
+#define GUMSTIX_ETH0_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0)
+#define GUMSTIX_ETH1_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1)
-/* CF slot 0 */
-#define GPIO4_nBVD1 4
-#define GPIO4_nSTSCHG GPIO4_nBVD1
-#define GPIO11_nCD 11
-#define GPIO26_PRDY_nBSY 26
-#define GUMSTIX_S0_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO4_nSTSCHG)
-#define GUMSTIX_S0_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO11_nCD)
-#define GUMSTIX_S0_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO26_PRDY_nBSY)
+ /* CF reset line */
+#define GPIO8_CF_RESET 8
+#define GPIO97_CF_RESET 97
+#define GPIO110_CF_RESET 110
+
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_CF_RESET GPIO8_CF_RESET
+#else
+#define GPIO_GUMSTIX_CF_RESET GPIO97_CF_RESET
+#endif
+
+#define GPIO_GUMSTIX_CF_OLD_RESET GPIO110_CF_RESET
+
+/* CF signals shared by both sockets */
+#define GPIO_GUMSTIX_nPOE 48
+#define GPIO_GUMSTIX_nPWE 49
+#define GPIO_GUMSTIX_nPIOR 50
+#define GPIO_GUMSTIX_nPIOW 51
+
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_nPCE_1 52
+#define GPIO_GUMSTIX_nPCE_2 53
+#define GPIO_GUMSTIX_pSKTSEL 54
+#else
+#define GPIO_GUMSTIX_nPCE_1 102
+#define GPIO_GUMSTIX_nPCE_2 105
+#define GPIO_GUMSTIX_pSKTSEL 79
+#endif
+
+#define GPIO_GUMSTIX_nPREG 55
+#define GPIO_GUMSTIX_nPWAIT 56
+#define GPIO_GUMSTIX_nIOIS16 57
+
+/* Pin mode definitions correspond to mfp-pxa2[57]x.h */
+#define GPIO_GUMSTIX_nPOE_MD GPIO48_nPOE
+#define GPIO_GUMSTIX_nPWE_MD GPIO49_nPWE
+#define GPIO_GUMSTIX_nPIOR_MD GPIO50_nPIOR
+#define GPIO_GUMSTIX_nPIOW_MD GPIO51_nPIOW
+
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_nPCE_1_MD GPIO52_nPCE_1
+#define GPIO_GUMSTIX_nPCE_2_MD GPIO53_nPCE_2
+#define GPIO_GUMSTIX_pSKTSEL_MD GPIO54_pSKTSEL
+#else
+#define GPIO_GUMSTIX_nPCE_1_MD GPIO102_nPCE_1
+#define GPIO_GUMSTIX_nPCE_2_MD GPIO105_nPCE_2
+#define GPIO_GUMSTIX_pSKTSEL_MD GPIO79_pSKTSEL
+#endif
+
+#define GPIO_GUMSTIX_nPREG_MD GPIO55_nPREG
+#define GPIO_GUMSTIX_nPWAIT_MD GPIO56_nPWAIT
+#define GPIO_GUMSTIX_nIOIS16_MD GPIO57_nIOIS16
+
+ /* CF slot 0 */
+#define GPIO4_nBVD1_0 4
+#define GPIO4_nSTSCHG_0 GPIO4_nBVD1_0
+#define GPIO11_nCD_0 11
+#define GPIO26_PRDY_nBSY_0 26
+
+#define GPIO111_nBVD1_0 111
+#define GPIO111_nSTSCHG_0 GPIO111_nBVD1_0
+#define GPIO104_nCD_0 104
+#define GPIO96_PRDY_nBSY_0 96
+#define GPIO109_PRDY_nBSY_0 109
+
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_nBVD1_0 GPIO4_nBVD1_0
+#define GPIO_GUMSTIX_nSTSCHG_0 GPIO4_nSTSCHG_0
+#define GPIO_GUMSTIX_nCD_0 GPIO11_nCD_0
+#define GPIO_GUMSTIX_PRDY_nBSY_0 GPIO26_PRDY_nBSY_0
+#else
+#define GPIO_GUMSTIX_nBVD1_0 GPIO111_nBVD1_0
+#define GPIO_GUMSTIX_nSTSCHG_0 GPIO111_nSTSCHG_0
+#define GPIO_GUMSTIX_nCD_0 GPIO104_nCD_0
+#define GPIO_GUMSTIX_PRDY_nBSY_0 GPIO96_PRDY_nBSY_0
+#endif
+
+#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD GPIO109_PRDY_nBSY_0
+#define GUMSTIX_S0_PRDY_nBSY_OLD_IRQ PXA_GPIO_TO_IRQ(GPIO109_PRDY_nBSY_0)
+
+#define GUMSTIX_S0_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_nSTSCHG_0)
+#define GUMSTIX_S0_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_nCD_0)
+#define GUMSTIX_S0_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_PRDY_nBSY_0)
/* CF slot 1 */
-#define GPIO18_nBVD1 18
-#define GPIO18_nSTSCHG GPIO18_nBVD1
-#define GPIO36_nCD 36
-#define GPIO27_PRDY_nBSY 27
-#define GUMSTIX_S1_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG)
-#define GUMSTIX_S1_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO36_nCD)
-#define GUMSTIX_S1_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY)
-
-/* CF GPIO line modes */
-#define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN)
-#define GPIO8_RESET_MD (GPIO8_RESET | GPIO_OUT)
-#define GPIO11_nCD_MD (GPIO11_nCD | GPIO_IN)
-#define GPIO18_nSTSCHG_MD (GPIO18_nSTSCHG | GPIO_IN)
-#define GPIO26_PRDY_nBSY_MD (GPIO26_PRDY_nBSY | GPIO_IN)
-#define GPIO27_PRDY_nBSY_MD (GPIO27_PRDY_nBSY | GPIO_IN)
-#define GPIO36_nCD_MD (GPIO36_nCD | GPIO_IN)
+#define GPIO18_nBVD1_1 18
+#define GPIO18_nSTSCHG_1 GPIO18_nBVD1_1
+#define GPIO36_nCD_1 36
+#define GPIO27_PRDY_nBSY_1 27
+
+#define GPIO_GUMSTIX_nBVD1_1 GPIO18_nBVD1_1
+#define GPIO_GUMSTIX_nSTSCHG_1 GPIO18_nSTSCHG_1
+#define GPIO_GUMSTIX_nCD_1 GPIO36_nCD_1
+#define GPIO_GUMSTIX_PRDY_nBSY_1 GPIO27_PRDY_nBSY_1
+
+#define GUMSTIX_S1_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG_1)
+#define GUMSTIX_S1_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO36_nCD_1)
+#define GUMSTIX_S1_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY_1)
+
+/* CF GPIO line modes - correspond to mfp-pxa2[57]x.h */
+#define GPIO_GUMSTIX_CF_RESET_MD (GPIO_GUMSTIX_CF_RESET | GPIO_OUT)
+#define GPIO_GUMSTIX_CF_OLD_RESET_MD (GPIO_GUMSTIX_CF_OLD_RESET | GPIO_OUT)
+
+#define GPIO_GUMSTIX_nSTSCHG_0_MD GPIO111_GPIO
+#define GPIO_GUMSTIX_nCD_0_MD GPIO104_GPIO
+
+#define GPIO_GUMSTIX_PRDY_nBSY_0_MD GPIO96_GPIO
+#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD_MD GPIO109_GPIO
+
+#define GPIO_GUMSTIX_nSTSCHG_1_MD GPIO18_GPIO
+#define GPIO_GUMSTIX_nCD_1_MD GPIO36_GPIO
+#define GPIO_GUMSTIX_PRDY_nBSY_1_MD GPIO27_GPIO
/* for expansion boards that can't be programatically detected */
extern int am200_init(void);

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@ -1,108 +0,0 @@
From 7645a459feb02f7aae4c3a5724b7800495d1b659 Mon Sep 17 00:00:00 2001
From: Bobby Powers <bobbypowers@gmail.com>
Date: Wed, 28 Oct 2009 22:41:31 -0400
Subject: [PATCH] [ARM] smsc911x: Verdex Pro support
Basically Joseph Kortje's patch, cleaned up to apply to Linus's
tree. Some of the smsc911x.c had been applied already
Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
---
drivers/net/smsc911x.c | 50 +++++++++++++++++++++++++++++++++++++--------
drivers/net/smsc911x.h | 2 +-
include/linux/smsc911x.h | 11 ++++++++++
3 files changed, 53 insertions(+), 10 deletions(-)
--- a/drivers/net/ethernet/smsc/smsc911x.c
+++ b/drivers/net/ethernet/smsc/smsc911x.c
@@ -60,6 +60,7 @@
#include <linux/of_device.h>
#include <linux/of_gpio.h>
#include <linux/of_net.h>
+#include <asm/system_info.h>
#include "smsc911x.h"
#define SMSC_CHIPNAME "smsc911x"
@@ -1514,7 +1515,7 @@ static int smsc911x_open(struct net_devi
SMSC_WARN(pdata, ifup,
"Timed out waiting for EEPROM busy bit to clear");
- smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
+ smsc911x_reg_write(pdata, GPIO_CFG, GPIO_CFG_LED1_EN_ | GPIO_CFG_LED2_EN_ | (1 << 20));
/* The soft reset above cleared the device's MAC address,
* restore it from local copy (set in probe) */
@@ -1525,8 +1526,8 @@ static int smsc911x_open(struct net_devi
/* Initialise irqs, but leave all sources disabled */
smsc911x_disable_irq_chip(dev);
- /* Set interrupt deassertion to 100uS */
- intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
+ /* Set interrupt deassertion to 22*10uS */
+ intcfg = ((22 << 24) | INT_CFG_IRQ_EN_);
if (pdata->config.irq_polarity) {
SMSC_TRACE(pdata, ifup, "irq polarity: active high");
@@ -1552,7 +1553,7 @@ static int smsc911x_open(struct net_devi
temp |= INT_EN_SW_INT_EN_;
smsc911x_reg_write(pdata, INT_EN, temp);
- timeout = 1000;
+ timeout = 2000;
while (timeout--) {
if (pdata->software_irq_signal)
break;
@@ -2370,6 +2371,38 @@ static inline int smsc911x_probe_config_
}
#endif /* CONFIG_OF */
+static inline unsigned int is_gumstix_oui(u8 *addr)
+{
+ return (addr[0] == 0x00 && addr[1] == 0x15 && addr[2] == 0xC9);
+}
+
+/**
+ * gen_serial_ether_addr - Generate software assigned Ethernet address
+ * based on the system_serial number
+ * @addr: Pointer to a six-byte array containing the Ethernet address
+ *
+ * Generate an Ethernet address (MAC) that is not multicast
+ * and has the local assigned bit set, keyed on the system_serial
+ */
+static inline void gen_serial_ether_addr(u8 *addr)
+{
+ static u8 ether_serial_digit = 0;
+ addr [0] = system_serial_high >> 8;
+ addr [1] = system_serial_high;
+ addr [2] = system_serial_low >> 24;
+ addr [3] = system_serial_low >> 16;
+ addr [4] = system_serial_low >> 8;
+ addr [5] = (system_serial_low & 0xc0) | /* top bits are from system serial */
+ (1 << 4) | /* 2 bits identify interface type 1=ether, 2=usb, 3&4 undef */
+ ((ether_serial_digit++) & 0x0f); /* 15 possible interfaces of each type */
+
+ if(!is_gumstix_oui(addr))
+ {
+ addr [0] &= 0xfe; /* clear multicast bit */
+ addr [0] |= 0x02; /* set local assignment bit (IEEE802) */
+ }
+}
+
static int smsc911x_drv_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
@@ -2516,11 +2549,11 @@ static int smsc911x_drv_probe(struct pla
SMSC_TRACE(pdata, probe,
"Mac Address is read from LAN911x EEPROM");
} else {
- /* eeprom values are invalid, generate random MAC */
- eth_hw_addr_random(dev);
+ /* eeprom values are invalid, generate MAC from serial number */
+ gen_serial_ether_addr(dev->dev_addr);
smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
SMSC_TRACE(pdata, probe,
- "MAC Address is set to eth_random_addr");
+ "MAC Address is derived from system serial number");
}
}

View File

@ -1,209 +0,0 @@
From 76a102bd5c9d792db19c6c72eafdecea0311a0c9 Mon Sep 17 00:00:00 2001
From: Craig Hughes <craig@gumstix.com>
Date: Fri, 30 Oct 2009 14:16:27 -0400
Subject: [PATCH] [ARM] pxa: Gumstix Verdex PCMCIA support
Needed for the Libertas CS wireless device.
Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
---
drivers/pcmcia/Kconfig | 3 +-
drivers/pcmcia/Makefile | 3 +
drivers/pcmcia/pxa2xx_gumstix.c | 194 +++++++++++++++++++++++++++++++++++++++
3 files changed, 199 insertions(+), 1 deletions(-)
create mode 100644 drivers/pcmcia/pxa2xx_gumstix.c
--- a/drivers/pcmcia/Kconfig
+++ b/drivers/pcmcia/Kconfig
@@ -217,7 +217,7 @@ config PCMCIA_PXA2XX
|| MACH_ARMCORE || ARCH_PXA_PALM || TRIZEPS_PCMCIA \
|| ARCOM_PCMCIA || ARCH_PXA_ESERIES || MACH_STARGATE2 \
|| MACH_VPAC270 || MACH_BALLOON3 || MACH_COLIBRI \
- || MACH_COLIBRI320 || MACH_H4700)
+ || MACH_COLIBRI320 || MACH_H4700 || ARCH_GUMSTIX)
select PCMCIA_SA1111 if ARCH_LUBBOCK && SA1111
select PCMCIA_SOC_COMMON
help
--- a/drivers/pcmcia/Makefile
+++ b/drivers/pcmcia/Makefile
@@ -71,6 +71,9 @@ pxa2xx-obj-$(CONFIG_MACH_COLIBRI) += px
pxa2xx-obj-$(CONFIG_MACH_COLIBRI320) += pxa2xx_colibri.o
pxa2xx-obj-$(CONFIG_MACH_H4700) += pxa2xx_hx4700.o
+pxa2xx-obj-$(CONFIG_MACH_GUMSTIX_VERDEX) += pxa2xx_cs.o
+pxa2xx_cs-objs := pxa2xx_gumstix.o
+
obj-$(CONFIG_PCMCIA_PXA2XX) += pxa2xx_base.o $(pxa2xx-obj-y)
obj-$(CONFIG_PCMCIA_XXS1500) += xxs1500_ss.o
--- /dev/null
+++ b/drivers/pcmcia/pxa2xx_gumstix.c
@@ -0,0 +1,168 @@
+/*
+ * linux/drivers/pcmcia/pxa2xx_gumstix.c
+ *
+ * Gumstix PCMCIA specific routines. Based on Mainstone
+ *
+ * Copyright 2004, Craig Hughes <craig@gumstix.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <linux/gpio-pxa.h>
+
+#include <pcmcia/ss.h>
+
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+
+#include <mach/pxa27x.h>
+
+#include <asm/io.h>
+#include <mach/gpio.h>
+#include <mach/gumstix.h>
+#include "soc_common.h"
+
+#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
+
+#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
+#define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
+
+static int net_cf_vx_mode = 0;
+
+static int gumstix_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
+{
+/* Note: The verdex_pcmcia_pin_config is moved to gumstix_verdex.c in order to use mfp_pxa2xx_config
+ for board-specific pin configuration instead of the old deprecated pxa_gpio_mode function. Thus,
+ only the IRQ init is still needed to be done here. */
+ if (skt->nr == 0) {
+ skt->socket.pci_irq = (net_cf_vx_mode == 0) ? GUMSTIX_S0_PRDY_nBSY_IRQ : GUMSTIX_S0_PRDY_nBSY_OLD_IRQ;
+ skt->stat[SOC_STAT_CD].gpio = GUMSTIX_S0_nCD_IRQ;
+ skt->stat[SOC_STAT_CD].name = "CF0 nCD";
+ skt->stat[SOC_STAT_RDY].gpio = GUMSTIX_S0_nSTSCHG_IRQ;
+ skt->stat[SOC_STAT_RDY].name = "CF0 nSTSCHG";
+ } else {
+ skt->socket.pci_irq = GUMSTIX_S1_PRDY_nBSY_IRQ;
+ skt->stat[SOC_STAT_CD].gpio = GUMSTIX_S1_nCD_IRQ;
+ skt->stat[SOC_STAT_CD].name = "CF1 nCD";
+ skt->stat[SOC_STAT_RDY].gpio = GUMSTIX_S1_nSTSCHG_IRQ;
+ skt->stat[SOC_STAT_RDY].name = "CF1 nSTSCHG";
+ }
+
+ return 0;
+}
+
+static void gumstix_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
+{
+ if (net_cf_vx_mode) {
+ gpio_free(GPIO_GUMSTIX_CF_OLD_RESET);
+ } else {
+ gpio_free(GPIO_GUMSTIX_CF_RESET);
+ }
+
+}
+
+static void gumstix_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
+ struct pcmcia_state *state)
+{
+ unsigned int cd, prdy_nbsy, nbvd1;
+ if(skt->nr == 0)
+ {
+ cd = GPIO_GUMSTIX_nCD_0;
+ if(net_cf_vx_mode)
+ prdy_nbsy = GPIO_GUMSTIX_PRDY_nBSY_0_OLD;
+ else
+ prdy_nbsy = GPIO_GUMSTIX_PRDY_nBSY_0;
+ nbvd1 = GPIO_GUMSTIX_nBVD1_0;
+ } else {
+ cd = GPIO_GUMSTIX_nCD_1;
+ prdy_nbsy = GPIO_GUMSTIX_PRDY_nBSY_1;
+ nbvd1 = GPIO_GUMSTIX_nBVD1_1;
+ }
+ state->detect = !!gpio_get_value(cd);
+ state->ready = !!gpio_get_value(prdy_nbsy);
+ state->bvd1 = !!gpio_get_value(nbvd1);
+ state->bvd2 = 1;
+ state->vs_3v = 0;
+ state->vs_Xv = 0;
+ state->wrprot = 0;
+}
+
+static int gumstix_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
+ const socket_state_t *state)
+{
+ return 0;
+}
+
+static struct pcmcia_low_level gumstix_pcmcia_ops = {
+ .owner = THIS_MODULE,
+ .hw_init = gumstix_pcmcia_hw_init,
+ .hw_shutdown = gumstix_pcmcia_hw_shutdown,
+ .socket_state = gumstix_pcmcia_socket_state,
+ .configure_socket = gumstix_pcmcia_configure_socket,
+ .nr = 2,
+};
+
+static struct platform_device *gumstix_pcmcia_device;
+
+extern int __init gumstix_get_cf_cards(void);
+
+#ifdef CONFIG_MACH_GUMSTIX_VERDEX
+extern int __init gumstix_check_if_netCF_vx(void);
+#endif
+
+static int __init gumstix_pcmcia_init(void)
+{
+ int ret;
+
+#ifdef CONFIG_MACH_GUMSTIX_VERDEX
+ net_cf_vx_mode = gumstix_check_if_netCF_vx();
+#endif
+
+ gumstix_pcmcia_ops.nr = gumstix_get_cf_cards();
+
+ gumstix_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
+ if (!gumstix_pcmcia_device)
+ return -ENOMEM;
+
+ ret = platform_device_add_data(gumstix_pcmcia_device, &gumstix_pcmcia_ops,
+ sizeof(gumstix_pcmcia_ops));
+
+ if (ret == 0) {
+ printk(KERN_INFO "Registering gumstix PCMCIA interface.\n");
+ ret = platform_device_add(gumstix_pcmcia_device);
+ }
+
+ if (ret)
+ platform_device_put(gumstix_pcmcia_device);
+
+ return ret;
+}
+
+static void __exit gumstix_pcmcia_exit(void)
+{
+ /*
+ * This call is supposed to free our gumstix_pcmcia_device.
+ * Unfortunately platform_device don't have a free method, and
+ * we can't assume it's free of any reference at this point so we
+ * can't free it either.
+ */
+ platform_device_unregister(gumstix_pcmcia_device);
+}
+
+fs_initcall(gumstix_pcmcia_init);
+module_exit(gumstix_pcmcia_exit);
+
+MODULE_LICENSE("GPL");

View File

@ -1,24 +0,0 @@
--- a/kernel/printk.c
+++ b/kernel/printk.c
@@ -48,6 +48,10 @@
#include <asm/uaccess.h>
+#ifdef CONFIG_DEBUG_LL
+extern void printascii(char *);
+#endif /* CONFIG_DEBUG_LL */
+
#define CREATE_TRACE_POINTS
#include <trace/events/printk.h>
@@ -1578,6 +1582,10 @@ asmlinkage int vprintk_emit(int facility
}
}
+#ifdef CONFIG_DEBUG_LL
+ printascii(printk_buf);
+#endif
+
if (level == -1)
level = default_message_loglevel;

View File

@ -1,882 +0,0 @@
From 4f4bb58cba3a6c44e9f9f113609287d9d50be9c4 Mon Sep 17 00:00:00 2001
From: Joseph Kortje <jpktech@rogers.com>
Date: Wed, 28 Oct 2009 21:11:28 -0400
Subject: [PATCH] [ARM] Gumstix Verdex Pro arch support
add an option for Verdex Pro when ARCH_GUMSTIX is selected, and
factor earlier Gumstix support into a seperate option
Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
---
arch/arm/mach-pxa/Kconfig | 29 +-
arch/arm/mach-pxa/Makefile | 3 +-
arch/arm/mach-pxa/gumstix-verdex.c | 749 +++++++++++++++++++++++++++
arch/arm/mach-pxa/include/mach/mfp-pxa27x.h | 1 +
4 files changed, 772 insertions(+), 10 deletions(-)
create mode 100644 arch/arm/mach-pxa/gumstix-verdex.c
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -134,23 +134,34 @@ config MACH_CAPC7117
select PXA3xx
config ARCH_GUMSTIX
- bool "Gumstix XScale 255 boards"
- select PXA25x
+ bool "Gumstix boards"
help
- Say Y here if you intend to run this kernel on
- Basix, Connex, ws-200ax, ws-400ax systems
+ Say Y here if you intend to run this kernel on a
+ gumstix computer.
-choice
- prompt "Gumstix Carrier/Expansion Board"
depends on ARCH_GUMSTIX
-config GUMSTIX_AM200EPD
+config MACH_GUMSTIX_F
+ bool "Gumstix Basix/Connex ..."
+ depends on ARCH_GUMSTIX
+ select PXA25x
+
+ choice
+ prompt "Gumstix Carrier/Expansion Board"
+ depends on MACH_GUMSTIX_F
+
+ config GUMSTIX_AM200EPD
bool "Enable AM200EPD board support"
-config GUMSTIX_AM300EPD
+ config GUMSTIX_AM300EPD
bool "Enable AM300EPD board support"
-endchoice
+ endchoice
+
+config MACH_GUMSTIX_VERDEX
+ bool "Gumstix VERDEX ..."
+ depends on ARCH_GUMSTIX
+ select PXA27x
config MACH_INTELMOTE2
bool "Intel Mote 2 Platform"
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -51,7 +51,8 @@ endif
obj-$(CONFIG_MACH_EM_X270) += em-x270.o
obj-$(CONFIG_MACH_CM_X300) += cm-x300.o
obj-$(CONFIG_MACH_CAPC7117) += capc7117.o mxm8x10.o
-obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o
+obj-$(CONFIG_MACH_GUMSTIX_F) += gumstix.o
+obj-$(CONFIG_MACH_GUMSTIX_VERDEX) += gumstix-verdex.o
obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o
obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o
obj-$(CONFIG_MACH_INTELMOTE2) += stargate2.o
--- /dev/null
+++ b/arch/arm/mach-pxa/gumstix-verdex.c
@@ -0,0 +1,794 @@
+/*
+ * linux/arch/arm/mach-pxa/gumstix-verdex.c
+ *
+ * Support for the Gumstix verdex motherboard.
+ *
+ * Original Author: Craig Hughes
+ * Created: Feb 14, 2008
+ * Copyright: Craig Hughes
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Implemented based on lubbock.c by Nicolas Pitre and code from Craig
+ * Hughes
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/i2c/tsc2007.h>
+#include <linux/i2c/pxa-i2c.h>
+#include <linux/gpio.h>
+#include <linux/gpio-pxa.h>
+
+#include <asm/setup.h>
+#include <asm/memory.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+#include <asm/sizes.h>
+#include <asm/io.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/flash.h>
+
+#include <mach/mmc.h>
+#include <mach/udc.h>
+#include <mach/pxafb.h>
+#include <mach/ohci.h>
+#include <mach/pxa27x.h>
+#include <mach/pxa27x-udc.h>
+#include <mach/gpio.h>
+
+#include <mach/gumstix.h>
+
+#include "generic.h"
+
+#include <linux/delay.h>
+
+static struct resource flash_resource = {
+ .start = 0x00000000,
+ .end = SZ_64M - 1,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct mtd_partition gumstix_partitions[] = {
+ {
+ .name = "u-boot",
+ .size = 0x00040000,
+ .offset = 0,
+ .mask_flags = MTD_WRITEABLE /* force read-only */
+ } , {
+ .name = "rootfs",
+ .size = 0x01ec0000,
+ .offset = 0x00040000
+ } , {
+ .name = "kernel",
+ .size = 0x00100000,
+ .offset = 0x01f00000
+ }
+};
+
+static struct flash_platform_data gumstix_flash_data = {
+ .map_name = "cfi_probe",
+ .parts = gumstix_partitions,
+ .nr_parts = ARRAY_SIZE(gumstix_partitions),
+ .width = 2,
+};
+
+static struct platform_device gumstix_flash_device = {
+ .name = "pxa2xx-flash",
+ .id = 0,
+ .dev = {
+ .platform_data = &gumstix_flash_data,
+ },
+ .resource = &flash_resource,
+ .num_resources = 1,
+};
+
+#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) \
+ || defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
+
+#include <linux/smsc911x.h>
+
+static struct resource verdex_smsc911x_resources[] = {
+ [0] = {
+ .name = "smsc911x-memory",
+ .start = PXA_CS1_PHYS,
+ .end = PXA_CS1_PHYS + 0x000fffff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0),
+ .end = PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0),
+ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
+ },
+};
+
+static struct smsc911x_platform_config verdex_smsc911x_config = {
+ .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+ .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
+ .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
+};
+
+static struct platform_device verdex_smsc911x_device = {
+ .name = "smsc911x",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(verdex_smsc911x_resources),
+ .resource = verdex_smsc911x_resources,
+ .dev = {
+ .platform_data = &verdex_smsc911x_config,
+ },
+};
+#endif
+
+#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
+static void __init verdex_init_smsc911x(void)
+{
+
+ printk(KERN_INFO "Initializing Gumstix verdex smsc911x\n");
+
+ if (gpio_request(GPIO_GUMSTIX_ETH0_RST, "SMSC911x_ETH0_RST") != 0) {
+ printk(KERN_ERR "could not obtain gpio for SMSC911x_ETH0_RST\n");
+ goto err_request_gpio_eth0_rst;
+ }
+
+ if (gpio_request(GPIO_GUMSTIX_ETH0, "SMSC911x_ETH0_IRQ") != 0) {
+ printk(KERN_ERR "could not obtain gpio for SMSC911x_ETH0_IRQ\n");
+ goto err_request_gpio_eth0_irq;
+ }
+
+ if (gpio_direction_output(GPIO_GUMSTIX_ETH0_RST, 0) != 0) {
+ printk(KERN_ERR "could not set SMSC911x_ETH0_RST pin to output\n");
+ goto err_dir;
+ }
+
+ gpio_set_value(GPIO_GUMSTIX_ETH0_RST, 0);
+
+ msleep(500); // Hold RESET for at least 200ms
+
+ gpio_set_value(GPIO_GUMSTIX_ETH0_RST, 1);
+
+ msleep(50);
+
+ if (gpio_direction_input(GPIO_GUMSTIX_ETH0) != 0) {
+ printk(KERN_ERR "could not set SMSC911x_ETH0_IRQ pin to input\n");
+ goto err_dir;
+ }
+
+ gpio_export(GPIO_GUMSTIX_ETH0, 0);
+ platform_device_register(&verdex_smsc911x_device);
+ return;
+
+err_dir:
+ gpio_free(GPIO_GUMSTIX_ETH0_RST);
+
+err_request_gpio_eth0_irq:
+ gpio_free(GPIO_GUMSTIX_ETH0);
+
+err_request_gpio_eth0_rst:
+ return;
+}
+
+#else
+static void __init verdex_init_smsc911x(void) { return; }
+#endif
+
+static unsigned long verdex_pin_config[] = {
+ /* MMC */
+ GPIO32_MMC_CLK,
+ GPIO112_MMC_CMD,
+ GPIO92_MMC_DAT_0,
+ GPIO109_MMC_DAT_1,
+ GPIO110_MMC_DAT_2,
+ GPIO111_MMC_DAT_3,
+
+ /* BTUART */
+ GPIO42_BTUART_RXD,
+ GPIO43_BTUART_TXD,
+ GPIO44_BTUART_CTS,
+ GPIO45_BTUART_RTS,
+
+ /* STUART */
+ GPIO46_STUART_RXD,
+ GPIO47_STUART_TXD,
+
+ /* FFUART */
+ GPIO34_FFUART_RXD,
+ GPIO39_FFUART_TXD,
+
+ /* SSP 2 */
+ GPIO19_SSP2_SCLK,
+ GPIO14_SSP2_SFRM,
+ GPIO13_SSP2_TXD,
+ GPIO11_SSP2_RXD,
+
+ /* SDRAM and local bus */
+ GPIO49_nPWE,
+ GPIO15_nCS_1,
+
+ /* I2C */
+ GPIO117_I2C_SCL,
+ GPIO118_I2C_SDA,
+
+ /* PWM 0 */
+ GPIO16_PWM0_OUT,
+
+ /* BRIGHTNESS */
+ GPIO17_PWM1_OUT,
+
+ /* LCD */
+ GPIO58_LCD_LDD_0,
+ GPIO59_LCD_LDD_1,
+ GPIO60_LCD_LDD_2,
+ GPIO61_LCD_LDD_3,
+ GPIO62_LCD_LDD_4,
+ GPIO63_LCD_LDD_5,
+ GPIO64_LCD_LDD_6,
+ GPIO65_LCD_LDD_7,
+ GPIO66_LCD_LDD_8,
+ GPIO67_LCD_LDD_9,
+ GPIO68_LCD_LDD_10,
+ GPIO69_LCD_LDD_11,
+ GPIO70_LCD_LDD_12,
+ GPIO71_LCD_LDD_13,
+ GPIO72_LCD_LDD_14,
+ GPIO73_LCD_LDD_15,
+ GPIO74_LCD_FCLK,
+ GPIO75_LCD_LCLK,
+ GPIO76_LCD_PCLK,
+#ifdef CONFIG_FB_PXA_SHARP_LQ043_PSP
+ /* DISP must be always high while screen is on */
+ /* Done below in verdex_init */
+#else
+ GPIO77_LCD_BIAS,
+#endif
+};
+
+#if defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
+
+static unsigned long gpio_ntschg_0[] = {
+ GPIO104_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_nCD_0_MD);
+};
+
+static unsigned long gpio_ntschg_1[] = {
+ GPIO18_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_nSTSCHG_1_MD);
+ GPIO36_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_nCD_1_MD);
+ GPIO27_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_PRDY_nBSY_1_MD);
+};
+
+static unsigned long gpio_prdy_nbsy_old[] = {
+ GPIO111_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_nSTSCHG_0_MD);
+ GPIO109_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_PRDY_nBSY_0_OLD_MD);
+};
+
+static unsigned long gpio_prdy_nbsy[] = {
+ GPIO96_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_PRDY_nBSY_0_MD);
+};
+
+static unsigned long gpio_nhw_init[] = {
+ GPIO48_nPOE, // pxa_gpio_mode(GPIO_GUMSTIX_nPOE_MD);
+ GPIO102_nPCE_1, // pxa_gpio_mode(GPIO_GUMSTIX_nPCE_1_MD);
+ GPIO105_nPCE_2, // pxa_gpio_mode(GPIO_GUMSTIX_nPCE_2_MD);
+ GPIO104_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_nCD_0_MD);
+
+ GPIO49_nPWE, // pxa_gpio_mode(GPIO_GUMSTIX_nPWE_MD);
+ GPIO50_nPIOR, // pxa_gpio_mode(GPIO_GUMSTIX_nPIOR_MD);
+ GPIO51_nPIOW, // pxa_gpio_mode(GPIO_GUMSTIX_nPIOW_MD);
+ GPIO79_PSKTSEL, // pxa_gpio_mode(GPIO_GUMSTIX_pSKTSEL_MD);
+ GPIO55_nPREG, // pxa_gpio_mode(GPIO_GUMSTIX_nPREG_MD);
+ GPIO56_nPWAIT, // pxa_gpio_mode(GPIO_GUMSTIX_nPWAIT_MD);
+ GPIO57_nIOIS16, // pxa_gpio_mode(GPIO_GUMSTIX_nIOIS16_MD);
+};
+
+static int net_cf_vx_mode = 0;
+static int pcmcia_cf_nr = 2;
+
+inline void __init gumstix_pcmcia_cpld_clk(void)
+{
+ gpio_set_value(GPIO_GUMSTIX_nPOE, 0);
+ gpio_set_value(GPIO_GUMSTIX_nPOE, 1);
+}
+
+inline unsigned char __init gumstix_pcmcia_cpld_read_bits(int bits)
+{
+ unsigned char result = 0;
+ unsigned int shift = 0;
+ while(bits--)
+ {
+ result |= !!(gpio_get_value(GPIO_GUMSTIX_nCD_0) & GPIO_bit(GPIO_GUMSTIX_nCD_0)) << shift;
+ shift ++;
+ gumstix_pcmcia_cpld_clk();
+ }
+ printk("CPLD responded with: %02x\n",result);
+ return result;
+}
+
+/* We use the CPLD on the CF-CF card to read a value from a shift register. If we can read that
+ * magic sequence, then we have 2 CF cards; otherwise we assume just one
+ * The CPLD will send the value of the shift register on GPIO11 (the CD line for slot 0)
+ * when RESET is held in reset. We use GPIO48 (nPOE) as a clock signal,
+ * GPIO52/53 (card enable for both cards) to control read/write to the shift register
+ */
+static void __init gumstix_count_cards(void)
+{
+ if ((gpio_request(GPIO_GUMSTIX_nPOE, "GPIO_GUMSTIX_nPOE") == 0) &&
+ (gpio_direction_output(GPIO_GUMSTIX_nPOE, 1) == 0))
+ gpio_export(GPIO_GUMSTIX_nPOE, 0);
+ else
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_nPOE\n");
+
+ if ((gpio_request(GPIO_GUMSTIX_nPCE_1, "GPIO_GUMSTIX_nPCE_1") == 0) &&
+ (gpio_direction_output(GPIO_GUMSTIX_nPCE_1, 1) == 0))
+ gpio_export(GPIO_GUMSTIX_nPCE_1, 0);
+ else
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_nPCE_1\n");
+
+ if ((gpio_request(GPIO_GUMSTIX_nPCE_2, "GPIO_GUMSTIX_nPCE_2") == 0) &&
+ (gpio_direction_output(GPIO_GUMSTIX_nPCE_2, 1) == 0))
+ gpio_export(GPIO_GUMSTIX_nPCE_2, 0);
+ else
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_nPCE_2\n");
+
+ if ((gpio_request(GPIO_GUMSTIX_nCD_0, "GPIO_GUMSTIX_nCD_0") == 0) &&
+ (gpio_direction_input(GPIO_GUMSTIX_nCD_0) == 0))
+ gpio_export(GPIO_GUMSTIX_nCD_0, 0);
+ else
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_nCD_0\n");
+
+ if (net_cf_vx_mode) {
+ if ((gpio_request(GPIO_GUMSTIX_CF_OLD_RESET, "GPIO_GUMSTIX_CF_OLD_RESET") == 0) &&
+ (gpio_direction_output(GPIO_GUMSTIX_CF_OLD_RESET, 1) == 0)) {
+ gpio_export(GPIO_GUMSTIX_CF_OLD_RESET, 0);
+ } else {
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_CF_OLD_RESET\n");
+ }
+ } else {
+ if ((gpio_request(GPIO_GUMSTIX_CF_RESET, "GPIO_GUMSTIX_CF_RESET") == 0) &&
+ (gpio_direction_output(GPIO_GUMSTIX_CF_RESET, 1) == 0)) {
+ gpio_export(GPIO_GUMSTIX_CF_RESET, 0);
+ } else {
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_CF_RESET\n");
+ }
+ }
+
+ // Setup the shift register
+ gpio_set_value(GPIO_GUMSTIX_nPCE_1, 1);
+ gpio_set_value(GPIO_GUMSTIX_nPCE_2, 0);
+
+ // Tick the clock to program the shift register
+ gumstix_pcmcia_cpld_clk();
+
+ // Now set shift register into read mode
+ gpio_set_value(GPIO_GUMSTIX_nPCE_1, 0);
+ gpio_set_value(GPIO_GUMSTIX_nPCE_2, 1);
+
+ // We can read the bits now -- 0xC2 means "Dual compact flash"
+ if(gumstix_pcmcia_cpld_read_bits(8) != 0xC2)
+ {
+ // We do not have 2 CF slots
+ pcmcia_cf_nr = 1;
+ }
+
+ udelay(50);
+
+ if (net_cf_vx_mode) {
+ gpio_set_value(GPIO_GUMSTIX_CF_OLD_RESET, 0);
+ gpio_free(GPIO_GUMSTIX_CF_OLD_RESET);
+ } else {
+ gpio_set_value(GPIO_GUMSTIX_CF_RESET, 0);
+ gpio_free(GPIO_GUMSTIX_CF_RESET);
+ }
+
+ printk(KERN_INFO "found %d CF slots\n", pcmcia_cf_nr);
+
+ gpio_free(GPIO_GUMSTIX_nPCE_2);
+ gpio_free(GPIO_GUMSTIX_nPCE_1);
+ gpio_free(GPIO_GUMSTIX_nPOE);
+ return;
+}
+
+#define SMC_IO_EXTENT 16
+#define BANK_SELECT 14
+
+static void __init verdex_pcmcia_pin_config(void)
+{
+ struct resource *res;
+ void *network_controller_memory;
+ struct platform_device *pdev = &verdex_smsc911x_device;
+
+ printk(KERN_INFO "Initializing Gumstix verdex pcmcia\n");
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (res == NULL) {
+ printk(KERN_ERR "no memory resource defined\n");
+ goto err_done;
+ }
+
+ res = request_mem_region(res->start, SMC_IO_EXTENT, "smc91x probe");
+ if (res == NULL) {
+ printk(KERN_ERR "failed to request memory resource\n");
+ goto err_done;
+ }
+
+ // We check for the possibility of SMSC91c111 (reg base offset 0x300 from CS1 base)
+ network_controller_memory = ioremap(res->start + 0x300, SMC_IO_EXTENT);
+ if (network_controller_memory == NULL) {
+ printk(KERN_ERR "failed to ioremap() registers\n");
+ goto err_free_mem;
+ }
+
+ // Look for the special 91c111 value in the bank select register
+ if((0xff00 & readw(network_controller_memory+BANK_SELECT)) == 0x3300) {
+ printk(KERN_INFO "Detected netCF-vx board: pcmcia using older GPIO configuration\n");
+ net_cf_vx_mode = 1;
+ } else {
+ printk(KERN_INFO "Not netCF-vx board: pcmcia using newer GPIO configuration\n");
+ net_cf_vx_mode = 0;
+ }
+
+ iounmap(network_controller_memory);
+err_free_mem:
+ release_mem_region(res->start, SMC_IO_EXTENT);
+err_done:
+
+ gumstix_count_cards(); // this can update pcmcia_cf_nr
+
+ // If pcmcia_cf_nr is 1 then we do not have 2 CF slots
+ // Note: logic sequence was altered from previous kernel revs
+ // so that this works as intended now.
+ if (pcmcia_cf_nr != 0)
+ {
+ pxa2xx_mfp_config(ARRAY_AND_SIZE(gpio_ntschg_0));
+
+ if(net_cf_vx_mode)
+ pxa2xx_mfp_config(gpio_prdy_nbsy_old, 1);
+ else
+ pxa2xx_mfp_config(gpio_prdy_nbsy, 1);
+
+ } else {
+ // Note: this reconfigures pin GPIO18 to be GPIO-IN so make
+ // sure that this only gets done for the old dual slot board
+ // since that pin is an active AF1 out-mode signal (RDY) on
+ // newer boards and changing the pin mode on the newer boards
+ // would result in memory corruption for the NIC (and hang during
+ // PHY test).
+ pxa2xx_mfp_config(ARRAY_AND_SIZE(gpio_ntschg_1));
+ }
+
+ pxa2xx_mfp_config(ARRAY_AND_SIZE(gpio_nhw_init));
+ return;
+}
+
+int __init gumstix_get_cf_cards(void)
+{
+ return pcmcia_cf_nr;
+}
+EXPORT_SYMBOL(gumstix_get_cf_cards);
+
+#ifdef CONFIG_MACH_GUMSTIX_VERDEX
+int __init gumstix_check_if_netCF_vx(void)
+{
+ return net_cf_vx_mode;
+}
+EXPORT_SYMBOL(gumstix_check_if_netCF_vx);
+#endif
+
+#endif
+
+#if defined(CONFIG_FB_PXA_SHARP_LQ043_PSP) || defined(CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C)
+static void gumstix_lcd_backlight(int on_or_off)
+{
+ int err;
+ err = gpio_request(17, "LCD BACKLIGHT");
+ if (err) {
+ //pr_warning("Gumstix Verdex: Failed to request LCD Backlight gpio\n");
+ return;
+ }
+
+ if(on_or_off) {
+ gpio_direction_input(17);
+ } else {
+ gpio_set_value(17, 0);
+ gpio_direction_output(17, 0);
+ gpio_set_value(17, 0);
+ }
+
+ return;
+}
+#endif
+
+#ifdef CONFIG_FB_PXA_ALPS_CDOLLAR
+static struct pxafb_mode_info gumstix_fb_mode = {
+ .pixclock = 300000,
+ .xres = 240,
+ .yres = 320,
+ .bpp = 16,
+ .hsync_len = 2,
+ .left_margin = 1,
+ .right_margin = 1,
+ .vsync_len = 3,
+ .upper_margin = 0,
+ .lower_margin = 0,
+ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+};
+
+static struct pxafb_mach_info gumstix_fb_info = {
+ .modes = &gumstix_fb_mode,
+ .num_modes = 1,
+ .lccr0 = LCCR0_Pas | LCCR0_Sngl | LCCR0_Color,
+ .lccr3 = LCCR3_PixFlEdg,
+};
+#elif defined(CONFIG_FB_PXA_SHARP_LQ043_PSP)
+static struct pxafb_mode_info gumstix_fb_mode = {
+ .pixclock = 110000,
+ .xres = 480,
+ .yres = 272,
+ .bpp = 16,
+ .hsync_len = 41,
+ .left_margin = 2,
+ .right_margin = 2,
+ .vsync_len = 10,
+ .upper_margin = 2,
+ .lower_margin = 2,
+ .sync = 0, // Hsync and Vsync both active low
+};
+
+static struct pxafb_mach_info gumstix_fb_info = {
+ .modes = &gumstix_fb_mode,
+ .num_modes = 1,
+ .lccr0 = LCCR0_Act | LCCR0_Sngl | LCCR0_Color,
+ .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | (0 << 30),
+ .pxafb_backlight_power = &gumstix_lcd_backlight,
+};
+#elif defined(CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C)
+static struct pxafb_mode_info gumstix_fb_mode = {
+ .pixclock = 108696, // 9.2MHz typical DOTCLK from datasheet
+ .xres = 480,
+ .hsync_len = 41, // HLW from datasheet: 41 typ
+ .left_margin = 4, // HBP - HLW from datasheet: 45 - 41 = 4
+ .right_margin = 8, // HFP from datasheet: 8 typ
+ .yres = 272,
+ .vsync_len = 10, // VLW from datasheet: 10 typ
+ .upper_margin = 2, // VBP - VLW from datasheet: 12 - 10 = 2
+ .lower_margin = 4, // VFP from datasheet: 4 typ
+ .bpp = 16,
+ .sync = 0, // Hsync and Vsync both active low
+};
+
+static struct pxafb_mach_info gumstix_fb_info = {
+ .modes = &gumstix_fb_mode,
+ .num_modes = 1,
+ .lccr0 = LCCR0_Act | LCCR0_Sngl | LCCR0_Color,
+ .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | (0 << 30),
+ .pxafb_backlight_power = &gumstix_lcd_backlight,
+};
+#endif
+
+static struct platform_device verdex_audio_device = {
+ .name = "pxa2xx-ac97",
+ .id = -1,
+};
+
+static struct platform_device *devices[] __initdata = {
+ &gumstix_flash_device,
+ &verdex_audio_device,
+};
+
+/* PXA27x OHCI controller setup */
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
+static int ohci_verdex_init(struct device *dev)
+{
+ // Turn on port 2 in host mode
+ UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
+
+ /* See drivers/usb/host/ohci-pxa27x.c for further details but
+ ENABLE_PORT_ALL flag is equivalent to using this old sequence:
+ UHCHR = (UHCHR) &
+ ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
+ */
+ return 0;
+}
+
+static struct pxaohci_platform_data verdex_ohci_platform_data = {
+ .port_mode = PMM_PERPORT_MODE,
+ .flags = ENABLE_PORT_ALL,
+ .init = ohci_verdex_init,
+};
+
+static void __init verdex_ohci_init(void)
+{
+ pxa_set_ohci_info(&verdex_ohci_platform_data);
+}
+#else
+static void __init verdex_ohci_init(void) {
+ printk(KERN_INFO "Gumstix verdex host usb ohci is disabled\n");
+}
+#endif
+
+
+#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
+static struct pxamci_platform_data verdex_mci_platform_data;
+
+static int verdex_mci_init(struct device *dev, irq_handler_t detect_int,
+ void *data)
+{
+ /* GPIO setup for MMC on the 120-pin connector is done in verdex_init.
+ * There is no card detect on a uSD connector so no interrupt to
+ * register. There is no WP detect GPIO line either.
+ */
+
+ return 0;
+}
+
+static struct pxamci_platform_data verdex_mci_platform_data = {
+ .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
+ .init = verdex_mci_init,
+ .gpio_card_detect = -1,
+ .gpio_card_ro = -1,
+ .gpio_power = -1,
+};
+
+static void __init verdex_mmc_init(void)
+{
+ pxa_set_mci_info(&verdex_mci_platform_data);
+}
+#else
+static void __init verdex_mmc_init(void)
+{
+ printk(KERN_INFO "Gumstix verdex mmc disabled\n");
+}
+#endif
+
+#if defined(CONFIG_USB_GADGET_PXA2XX) || defined(CONFIG_USB_GADGET_PXA2XX_MODULE)
+static struct pxa2xx_udc_mach_info verdex_udc_info __initdata = {
+ .gpio_vbus = GPIO35,
+ .gpio_pullup = GPIO41,
+};
+
+static void __init verdex_udc_init(void)
+{
+ pxa_set_udc_info(&verdex_udc_info);
+}
+#else
+static void __init verdex_udc_init(void)
+{
+ printk(KERN_INFO "Gumstix verdex udc is disabled\n");
+}
+#endif
+
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
+
+#if defined(CONFIG_TOUCHSCREEN_TSC2003) || defined(CONFIG_TOUCHSCREEN_TSC2003_MODULE)
+
+#define VERDEX_GPIO_PENDOWN 16
+
+static int tsc2003_init_platform_hw(void)
+{
+ return 0;
+}
+
+static void tsc2003_exit_platform_hw(void)
+{
+ return;
+}
+
+static void tsc2003_clear_penirq(void)
+{
+ return;
+}
+
+static int tsc2003_get_pendown_state(void)
+{
+ return !gpio_get_value(VERDEX_GPIO_PENDOWN);
+}
+
+static struct tsc2007_platform_data tsc2003_config = {
+ .model = 2003,
+ .x_plate_ohms = 100,
+ .get_pendown_state = tsc2003_get_pendown_state,
+ .clear_penirq = tsc2003_clear_penirq,
+ .init_platform_hw = tsc2003_init_platform_hw,
+ .exit_platform_hw = tsc2003_exit_platform_hw,
+};
+#endif
+
+static struct i2c_board_info __initdata verdex_i2c_board_info[] = {
+#if defined(CONFIG_RTC_DRV_DS1307) || defined(CONFIG_RTC_DRV_DS1307_MODULE)
+ {
+ I2C_BOARD_INFO("rtc-ds1307", 0x68),
+ },
+#endif
+#if defined(CONFIG_TOUCHSCREEN_TSC2003) || defined(CONFIG_TOUCHSCREEN_TSC2003_MODULE)
+ {
+ I2C_BOARD_INFO("tsc2003", 0x48),
+ .platform_data = &tsc2003_config,
+ .irq = IRQ_GPIO(VERDEX_GPIO_PENDOWN),
+ },
+#endif
+};
+
+static struct i2c_pxa_platform_data verdex_i2c_pwr_info = {
+ .fast_mode = 1,
+};
+
+static struct i2c_pxa_platform_data verdex_i2c_info = {
+ .fast_mode = 1,
+};
+
+static void __init verdex_i2c_init(void)
+{
+ printk(KERN_INFO "Initializing Gumstix verdex i2c\n");
+
+#if defined(CONFIG_TOUCHSCREEN_TSC2003) || defined(CONFIG_TOUCHSCREEN_TSC2003_MODULE)
+ if ((gpio_request(VERDEX_GPIO_PENDOWN, "TSC2003_PENDOWN") == 0) &&
+ (gpio_direction_input(VERDEX_GPIO_PENDOWN) == 0)) {
+ gpio_export(VERDEX_GPIO_PENDOWN, 0);
+ } else {
+ printk(KERN_ERR "could not obtain gpio for TSC2003_PENDOWN\n");
+ return;
+ }
+#endif
+
+ i2c_register_board_info(0, verdex_i2c_board_info,
+ ARRAY_SIZE(verdex_i2c_board_info));
+ pxa_set_i2c_info(&verdex_i2c_info);
+ pxa27x_set_i2c_power_info(&verdex_i2c_pwr_info);
+}
+#else
+static inline void verdex_i2c_init(void) {}
+#endif
+
+#if defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
+static void __init verdex_pcmcia_init(void)
+{
+ verdex_pcmcia_pin_config();
+}
+#else
+static void __init verdex_pcmcia_init(void) {
+ printk(KERN_INFO "Gumstix verdex pcmcia is disabled\n");
+}
+#endif
+
+
+static void __init verdex_init(void)
+{
+ pxa2xx_mfp_config(ARRAY_AND_SIZE(verdex_pin_config));
+
+#ifdef CONFIG_FB_PXA_SHARP_LQ043_PSP
+ /* DISP must be always high while screen is on */
+ gpio_direction_output(GPIO77, 0);
+ gpio_set_value(GPIO77, 1);
+#endif
+ verdex_udc_init();
+ verdex_mmc_init();
+ verdex_ohci_init();
+ verdex_i2c_init();
+ verdex_init_smsc911x();
+ verdex_pcmcia_init();
+
+#if defined(CONFIG_FB_PXA_ALPS_CDOLLAR) || defined(CONFIG_FB_PXA_SHARP_LQ043_PSP) || defined(CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C)
+ printk(KERN_INFO "Initializing Gumstix verdex FB info\n");
+ set_pxa_fb_info(&gumstix_fb_info);
+#endif
+ printk(KERN_INFO "Initializing Gumstix platform_add_devices\n");
+ (void) platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+MACHINE_START(GUMSTIX, "Gumstix verdex")
+ .atag_offset = 0x100, /* match u-boot bi_boot_params */
+ .map_io = pxa27x_map_io,
+ .init_irq = pxa27x_init_irq,
+ .handle_irq = pxa27x_handle_irq,
+ .timer = &pxa_timer,
+ .init_machine = verdex_init,
+ .restart = pxa_restart,
+MACHINE_END
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
@@ -109,6 +109,7 @@
#define GPIO54_nPCE_2 MFP_CFG_OUT(GPIO54, AF2, DRIVE_HIGH)
#define GPIO78_nPCE_2 MFP_CFG_OUT(GPIO78, AF1, DRIVE_HIGH)
#define GPIO87_nPCE_2 MFP_CFG_IN(GPIO87, AF1)
+#define GPIO105_nPCE_2 MFP_CFG_OUT(GPIO105, AF1, DRIVE_HIGH)
#define GPIO55_nPREG MFP_CFG_OUT(GPIO55, AF2, DRIVE_HIGH)
#define GPIO50_nPIOR MFP_CFG_OUT(GPIO50, AF2, DRIVE_HIGH)
#define GPIO51_nPIOW MFP_CFG_OUT(GPIO51, AF2, DRIVE_HIGH)

View File

@ -1,52 +0,0 @@
From eb92a178eceae4e5d18bbb442b8e44cb88457d60 Mon Sep 17 00:00:00 2001
From: Joseph Kortje <jpktech@rogers.com>
Date: Wed, 28 Oct 2009 21:25:57 -0400
Subject: [PATCH] [ARM] Gumstix Verdex LCD config options
add options to Kconfig for Verdex LCD support
Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
---
drivers/video/Kconfig | 31 +++++++++++++++++++++++++++++++
1 files changed, 31 insertions(+), 0 deletions(-)
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1892,6 +1892,37 @@ config FB_PXA
say M here and read <file:Documentation/kbuild/modules.txt>.
If unsure, say N.
+choice
+ depends on FB_PXA
+ prompt "LCD Panel"
+ default FB_PXA_SAMSUNG_LTE430WQ_F0C
+
+config FB_PXA_ALPS_CDOLLAR
+ boolean "Chris Dollar's ALPS screen"
+ ---help---
+ Enable definitions (over-ridable on the kernel command line if
+ "PXA LCD command line parameters" is also selected) for an ALPS
+ screen which Chris Dollar uses
+
+config FB_PXA_SHARP_LQ043_PSP
+ boolean "SHARP LQ043... series"
+ ---help---
+ Enable definitions (over-ridable on the kernel command line if
+ "PXA LCD command line parameters" is also selected) for a SHARP
+ LQ043... screen, such as the one used by the PSP. These screens are
+ the ones normally sold by gumstix with its boards.
+
+config FB_PXA_SAMSUNG_LTE430WQ_F0C
+ boolean "Samsung LTE430WQ-F0C (standard gumstix LCD)"
+ ---help---
+ Enable definitions for a Samsung LTE430WQ-F0C LCD panel, such as the ones resold
+ by gumstix for use with their "LCD-Ready" boards.
+
+config FB_PXA_NONEOFTHEABOVE
+ boolean "None of the above"
+
+endchoice
+
config FB_PXA_OVERLAY
bool "Support PXA27x/PXA3xx Overlay(s) as framebuffer"

View File

@ -1,214 +0,0 @@
From adb6abbe4e3bc17c20cdc70e4a4357f1633d4970 Mon Sep 17 00:00:00 2001
From: Joseph Kortje <jpktech@rogers.com>
Date: Wed, 28 Oct 2009 21:49:11 -0400
Subject: [PATCH] [ARM] gumstix.h: Verdex Pro support
Added a bunch of ifdefs to support both original gumstix boards
as well as the Verdex Pro in gumstix.h
Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
---
arch/arm/mach-pxa/include/mach/gumstix.h | 160 ++++++++++++++++++++++++------
1 files changed, 130 insertions(+), 30 deletions(-)
--- a/arch/arm/mach-pxa/include/mach/gumstix.h
+++ b/arch/arm/mach-pxa/include/mach/gumstix.h
@@ -6,6 +6,9 @@
* published by the Free Software Foundation.
*/
+#if !defined(__ASM_ARCH_MFP_PXA27X_H) && !defined(__ASM_ARCH_MFP_PXA25X_H)
+ #error You need to include either mfp-pxa27x.h or mfp-pxa25x.h
+#endif
/* BTRESET - Reset line to Bluetooth module, active low signal. */
#define GPIO_GUMSTIX_BTRESET 7
@@ -20,9 +23,18 @@ this moves to GPIO17 and GPIO37. */
/* GPIOx - Connects to USB D+ and used as a pull-up after GPIOn
has detected a cable insertion; driven low otherwise. */
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
+
#define GPIO_GUMSTIX_USB_GPIOn 35
#define GPIO_GUMSTIX_USB_GPIOx 41
+#else
+
+#define GPIO_GUMSTIX_USB_GPIOn 100
+#define GPIO_GUMSTIX_USB_GPIOx 27
+
+#endif
+
/* usb state change */
#define GUMSTIX_USB_INTR_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_USB_GPIOn)
@@ -42,48 +54,136 @@ has detected a cable insertion; driven l
* ETH_RST provides a hardware reset line to the ethernet chip
* ETH is the IRQ line in from the ethernet chip to the PXA
*/
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
#define GPIO_GUMSTIX_ETH0_RST 80
-#define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
+#define GPIO_GUMSTIX_ETH0 36
+#else
+#define GPIO_GUMSTIX_ETH0_RST 107
+#define GPIO_GUMSTIX_ETH0 99
+#endif
#define GPIO_GUMSTIX_ETH1_RST 52
-#define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
+#define GPIO_GUMSTIX_ETH1 27
-#define GPIO_GUMSTIX_ETH0 36
+#define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
+#define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN)
-#define GUMSTIX_ETH0_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0)
-#define GPIO_GUMSTIX_ETH1 27
#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN)
-#define GUMSTIX_ETH1_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1)
-
-/* CF reset line */
-#define GPIO8_RESET 8
+#define GUMSTIX_ETH0_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0)
+#define GUMSTIX_ETH1_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1)
-/* CF slot 0 */
-#define GPIO4_nBVD1 4
-#define GPIO4_nSTSCHG GPIO4_nBVD1
-#define GPIO11_nCD 11
-#define GPIO26_PRDY_nBSY 26
-#define GUMSTIX_S0_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO4_nSTSCHG)
-#define GUMSTIX_S0_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO11_nCD)
-#define GUMSTIX_S0_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO26_PRDY_nBSY)
+ /* CF reset line */
+#define GPIO8_CF_RESET 8
+#define GPIO97_CF_RESET 97
+#define GPIO110_CF_RESET 110
+
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_CF_RESET GPIO8_CF_RESET
+#else
+#define GPIO_GUMSTIX_CF_RESET GPIO97_CF_RESET
+#endif
+
+#define GPIO_GUMSTIX_CF_OLD_RESET GPIO110_CF_RESET
+
+/* CF signals shared by both sockets */
+#define GPIO_GUMSTIX_nPOE 48
+#define GPIO_GUMSTIX_nPWE 49
+#define GPIO_GUMSTIX_nPIOR 50
+#define GPIO_GUMSTIX_nPIOW 51
+
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_nPCE_1 52
+#define GPIO_GUMSTIX_nPCE_2 53
+#define GPIO_GUMSTIX_pSKTSEL 54
+#else
+#define GPIO_GUMSTIX_nPCE_1 102
+#define GPIO_GUMSTIX_nPCE_2 105
+#define GPIO_GUMSTIX_pSKTSEL 79
+#endif
+
+#define GPIO_GUMSTIX_nPREG 55
+#define GPIO_GUMSTIX_nPWAIT 56
+#define GPIO_GUMSTIX_nIOIS16 57
+
+/* Pin mode definitions correspond to mfp-pxa2[57]x.h */
+#define GPIO_GUMSTIX_nPOE_MD GPIO48_nPOE
+#define GPIO_GUMSTIX_nPWE_MD GPIO49_nPWE
+#define GPIO_GUMSTIX_nPIOR_MD GPIO50_nPIOR
+#define GPIO_GUMSTIX_nPIOW_MD GPIO51_nPIOW
+
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_nPCE_1_MD GPIO52_nPCE_1
+#define GPIO_GUMSTIX_nPCE_2_MD GPIO53_nPCE_2
+#define GPIO_GUMSTIX_pSKTSEL_MD GPIO54_pSKTSEL
+#else
+#define GPIO_GUMSTIX_nPCE_1_MD GPIO102_nPCE_1
+#define GPIO_GUMSTIX_nPCE_2_MD GPIO105_nPCE_2
+#define GPIO_GUMSTIX_pSKTSEL_MD GPIO79_pSKTSEL
+#endif
+
+#define GPIO_GUMSTIX_nPREG_MD GPIO55_nPREG
+#define GPIO_GUMSTIX_nPWAIT_MD GPIO56_nPWAIT
+#define GPIO_GUMSTIX_nIOIS16_MD GPIO57_nIOIS16
+
+ /* CF slot 0 */
+#define GPIO4_nBVD1_0 4
+#define GPIO4_nSTSCHG_0 GPIO4_nBVD1_0
+#define GPIO11_nCD_0 11
+#define GPIO26_PRDY_nBSY_0 26
+
+#define GPIO111_nBVD1_0 111
+#define GPIO111_nSTSCHG_0 GPIO111_nBVD1_0
+#define GPIO104_nCD_0 104
+#define GPIO96_PRDY_nBSY_0 96
+#define GPIO109_PRDY_nBSY_0 109
+
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_nBVD1_0 GPIO4_nBVD1_0
+#define GPIO_GUMSTIX_nSTSCHG_0 GPIO4_nSTSCHG_0
+#define GPIO_GUMSTIX_nCD_0 GPIO11_nCD_0
+#define GPIO_GUMSTIX_PRDY_nBSY_0 GPIO26_PRDY_nBSY_0
+#else
+#define GPIO_GUMSTIX_nBVD1_0 GPIO111_nBVD1_0
+#define GPIO_GUMSTIX_nSTSCHG_0 GPIO111_nSTSCHG_0
+#define GPIO_GUMSTIX_nCD_0 GPIO104_nCD_0
+#define GPIO_GUMSTIX_PRDY_nBSY_0 GPIO96_PRDY_nBSY_0
+#endif
+
+#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD GPIO109_PRDY_nBSY_0
+#define GUMSTIX_S0_PRDY_nBSY_OLD_IRQ PXA_GPIO_TO_IRQ(GPIO109_PRDY_nBSY_0)
+
+#define GUMSTIX_S0_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_nSTSCHG_0)
+#define GUMSTIX_S0_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_nCD_0)
+#define GUMSTIX_S0_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_PRDY_nBSY_0)
/* CF slot 1 */
-#define GPIO18_nBVD1 18
-#define GPIO18_nSTSCHG GPIO18_nBVD1
-#define GPIO36_nCD 36
-#define GPIO27_PRDY_nBSY 27
-#define GUMSTIX_S1_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG)
-#define GUMSTIX_S1_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO36_nCD)
-#define GUMSTIX_S1_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY)
-
-/* CF GPIO line modes */
-#define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN)
-#define GPIO8_RESET_MD (GPIO8_RESET | GPIO_OUT)
-#define GPIO11_nCD_MD (GPIO11_nCD | GPIO_IN)
-#define GPIO18_nSTSCHG_MD (GPIO18_nSTSCHG | GPIO_IN)
-#define GPIO26_PRDY_nBSY_MD (GPIO26_PRDY_nBSY | GPIO_IN)
-#define GPIO27_PRDY_nBSY_MD (GPIO27_PRDY_nBSY | GPIO_IN)
-#define GPIO36_nCD_MD (GPIO36_nCD | GPIO_IN)
+#define GPIO18_nBVD1_1 18
+#define GPIO18_nSTSCHG_1 GPIO18_nBVD1_1
+#define GPIO36_nCD_1 36
+#define GPIO27_PRDY_nBSY_1 27
+
+#define GPIO_GUMSTIX_nBVD1_1 GPIO18_nBVD1_1
+#define GPIO_GUMSTIX_nSTSCHG_1 GPIO18_nSTSCHG_1
+#define GPIO_GUMSTIX_nCD_1 GPIO36_nCD_1
+#define GPIO_GUMSTIX_PRDY_nBSY_1 GPIO27_PRDY_nBSY_1
+
+#define GUMSTIX_S1_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG_1)
+#define GUMSTIX_S1_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO36_nCD_1)
+#define GUMSTIX_S1_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY_1)
+
+/* CF GPIO line modes - correspond to mfp-pxa2[57]x.h */
+#define GPIO_GUMSTIX_CF_RESET_MD (GPIO_GUMSTIX_CF_RESET | GPIO_OUT)
+#define GPIO_GUMSTIX_CF_OLD_RESET_MD (GPIO_GUMSTIX_CF_OLD_RESET | GPIO_OUT)
+
+#define GPIO_GUMSTIX_nSTSCHG_0_MD GPIO111_GPIO
+#define GPIO_GUMSTIX_nCD_0_MD GPIO104_GPIO
+
+#define GPIO_GUMSTIX_PRDY_nBSY_0_MD GPIO96_GPIO
+#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD_MD GPIO109_GPIO
+
+#define GPIO_GUMSTIX_nSTSCHG_1_MD GPIO18_GPIO
+#define GPIO_GUMSTIX_nCD_1_MD GPIO36_GPIO
+#define GPIO_GUMSTIX_PRDY_nBSY_1_MD GPIO27_GPIO
/* for expansion boards that can't be programatically detected */
extern int am200_init(void);

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@ -1,100 +0,0 @@
From 7645a459feb02f7aae4c3a5724b7800495d1b659 Mon Sep 17 00:00:00 2001
From: Bobby Powers <bobbypowers@gmail.com>
Date: Wed, 28 Oct 2009 22:41:31 -0400
Subject: [PATCH] [ARM] smsc911x: Verdex Pro support
Basically Joseph Kortje's patch, cleaned up to apply to Linus's
tree. Some of the smsc911x.c had been applied already
Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
---
drivers/net/smsc911x.c | 50 +++++++++++++++++++++++++++++++++++++--------
drivers/net/smsc911x.h | 2 +-
include/linux/smsc911x.h | 11 ++++++++++
3 files changed, 53 insertions(+), 10 deletions(-)
--- a/drivers/net/ethernet/smsc/smsc911x.c
+++ b/drivers/net/ethernet/smsc/smsc911x.c
@@ -1485,7 +1485,7 @@ static int smsc911x_open(struct net_devi
SMSC_WARN(pdata, ifup,
"Timed out waiting for EEPROM busy bit to clear");
- smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
+ smsc911x_reg_write(pdata, GPIO_CFG, GPIO_CFG_LED1_EN_ | GPIO_CFG_LED2_EN_ | (1 << 20));
/* The soft reset above cleared the device's MAC address,
* restore it from local copy (set in probe) */
@@ -1497,8 +1497,8 @@ static int smsc911x_open(struct net_devi
smsc911x_reg_write(pdata, INT_EN, 0);
smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
- /* Set interrupt deassertion to 100uS */
- intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
+ /* Set interrupt deassertion to 22*10uS */
+ intcfg = ((22 << 24) | INT_CFG_IRQ_EN_);
if (pdata->config.irq_polarity) {
SMSC_TRACE(pdata, ifup, "irq polarity: active high");
@@ -1524,7 +1524,7 @@ static int smsc911x_open(struct net_devi
temp |= INT_EN_SW_INT_EN_;
smsc911x_reg_write(pdata, INT_EN, temp);
- timeout = 1000;
+ timeout = 2000;
while (timeout--) {
if (pdata->software_irq_signal)
break;
@@ -2332,6 +2332,38 @@ static inline int smsc911x_probe_config_
}
#endif /* CONFIG_OF */
+static inline unsigned int is_gumstix_oui(u8 *addr)
+{
+ return (addr[0] == 0x00 && addr[1] == 0x15 && addr[2] == 0xC9);
+}
+
+/**
+ * gen_serial_ether_addr - Generate software assigned Ethernet address
+ * based on the system_serial number
+ * @addr: Pointer to a six-byte array containing the Ethernet address
+ *
+ * Generate an Ethernet address (MAC) that is not multicast
+ * and has the local assigned bit set, keyed on the system_serial
+ */
+static inline void gen_serial_ether_addr(u8 *addr)
+{
+ static u8 ether_serial_digit = 0;
+ addr [0] = system_serial_high >> 8;
+ addr [1] = system_serial_high;
+ addr [2] = system_serial_low >> 24;
+ addr [3] = system_serial_low >> 16;
+ addr [4] = system_serial_low >> 8;
+ addr [5] = (system_serial_low & 0xc0) | /* top bits are from system serial */
+ (1 << 4) | /* 2 bits identify interface type 1=ether, 2=usb, 3&4 undef */
+ ((ether_serial_digit++) & 0x0f); /* 15 possible interfaces of each type */
+
+ if(!is_gumstix_oui(addr))
+ {
+ addr [0] &= 0xfe; /* clear multicast bit */
+ addr [0] |= 0x02; /* set local assignment bit (IEEE802) */
+ }
+}
+
static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
@@ -2481,11 +2513,11 @@ static int __devinit smsc911x_drv_probe(
SMSC_TRACE(pdata, probe,
"Mac Address is read from LAN911x EEPROM");
} else {
- /* eeprom values are invalid, generate random MAC */
- random_ether_addr(dev->dev_addr);
+ /* eeprom values are invalid, generate MAC from serial number */
+ gen_serial_ether_addr(dev->dev_addr);
smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
SMSC_TRACE(pdata, probe,
- "MAC Address is set to random_ether_addr");
+ "MAC Address is derived from system serial number");
}
}

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@ -1,236 +0,0 @@
From 76a102bd5c9d792db19c6c72eafdecea0311a0c9 Mon Sep 17 00:00:00 2001
From: Craig Hughes <craig@gumstix.com>
Date: Fri, 30 Oct 2009 14:16:27 -0400
Subject: [PATCH] [ARM] pxa: Gumstix Verdex PCMCIA support
Needed for the Libertas CS wireless device.
Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
---
drivers/pcmcia/Kconfig | 3 +-
drivers/pcmcia/Makefile | 3 +
drivers/pcmcia/pxa2xx_gumstix.c | 194 +++++++++++++++++++++++++++++++++++++++
3 files changed, 199 insertions(+), 1 deletions(-)
create mode 100644 drivers/pcmcia/pxa2xx_gumstix.c
--- a/drivers/pcmcia/Kconfig
+++ b/drivers/pcmcia/Kconfig
@@ -212,7 +212,7 @@ config PCMCIA_PXA2XX
|| MACH_ARMCORE || ARCH_PXA_PALM || TRIZEPS_PCMCIA \
|| ARCOM_PCMCIA || ARCH_PXA_ESERIES || MACH_STARGATE2 \
|| MACH_VPAC270 || MACH_BALLOON3 || MACH_COLIBRI \
- || MACH_COLIBRI320)
+ || MACH_COLIBRI320 || ARCH_GUMSTIX)
select PCMCIA_SOC_COMMON
help
Say Y here to include support for the PXA2xx PCMCIA controller
--- a/drivers/pcmcia/Makefile
+++ b/drivers/pcmcia/Makefile
@@ -70,6 +70,9 @@ pxa2xx-obj-$(CONFIG_MACH_BALLOON3) += p
pxa2xx-obj-$(CONFIG_MACH_COLIBRI) += pxa2xx_colibri.o
pxa2xx-obj-$(CONFIG_MACH_COLIBRI320) += pxa2xx_colibri.o
+pxa2xx-obj-$(CONFIG_MACH_GUMSTIX_VERDEX) += pxa2xx_cs.o
+pxa2xx_cs-objs := pxa2xx_gumstix.o
+
obj-$(CONFIG_PCMCIA_PXA2XX) += pxa2xx_base.o $(pxa2xx-obj-y)
obj-$(CONFIG_PCMCIA_XXS1500) += xxs1500_ss.o
--- /dev/null
+++ b/drivers/pcmcia/pxa2xx_gumstix.c
@@ -0,0 +1,195 @@
+/*
+ * linux/drivers/pcmcia/pxa2xx_gumstix.c
+ *
+ * Gumstix PCMCIA specific routines. Based on Mainstone
+ *
+ * Copyright 2004, Craig Hughes <craig@gumstix.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <linux/gpio-pxa.h>
+
+#include <pcmcia/ss.h>
+
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+
+#include <mach/pxa27x.h>
+
+#include <asm/io.h>
+#include <mach/gpio.h>
+#include <mach/gumstix.h>
+#include "soc_common.h"
+
+#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
+
+#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
+#define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
+
+static struct pcmcia_irqs gumstix_pcmcia_irqs0[] = {
+ { 0, GUMSTIX_S0_nCD_IRQ, "CF0 nCD" },
+ { 0, GUMSTIX_S0_nSTSCHG_IRQ, "CF0 nSTSCHG" },
+};
+
+static struct pcmcia_irqs gumstix_pcmcia_irqs1[] = {
+ { 1, GUMSTIX_S1_nCD_IRQ, "CF1 nCD" },
+ { 1, GUMSTIX_S1_nSTSCHG_IRQ, "CF1 nSTSCHG" },
+};
+
+
+static int net_cf_vx_mode = 0;
+
+static int gumstix_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
+{
+/* Note: The verdex_pcmcia_pin_config is moved to gumstix_verdex.c in order to use mfp_pxa2xx_config
+ for board-specific pin configuration instead of the old deprecated pxa_gpio_mode function. Thus,
+ only the IRQ init is still needed to be done here. */
+ skt->socket.pci_irq = (skt->nr == 0) ? ((net_cf_vx_mode == 0) ? GUMSTIX_S0_PRDY_nBSY_IRQ : GUMSTIX_S0_PRDY_nBSY_OLD_IRQ) : GUMSTIX_S1_PRDY_nBSY_IRQ;
+
+ return (skt->nr == 0) ? soc_pcmcia_request_irqs(skt, gumstix_pcmcia_irqs0, ARRAY_SIZE(gumstix_pcmcia_irqs0)) :
+ soc_pcmcia_request_irqs(skt, gumstix_pcmcia_irqs1, ARRAY_SIZE(gumstix_pcmcia_irqs1));
+}
+
+static void gumstix_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
+{
+ if(skt->nr == 0)
+ {
+ soc_pcmcia_free_irqs(skt, gumstix_pcmcia_irqs0, ARRAY_SIZE(gumstix_pcmcia_irqs0));
+ } else {
+ soc_pcmcia_free_irqs(skt, gumstix_pcmcia_irqs1, ARRAY_SIZE(gumstix_pcmcia_irqs1));
+ }
+
+ if (net_cf_vx_mode) {
+ gpio_free(GPIO_GUMSTIX_CF_OLD_RESET);
+ } else {
+ gpio_free(GPIO_GUMSTIX_CF_RESET);
+ }
+
+}
+
+static void gumstix_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
+ struct pcmcia_state *state)
+{
+ unsigned int cd, prdy_nbsy, nbvd1;
+ if(skt->nr == 0)
+ {
+ cd = GPIO_GUMSTIX_nCD_0;
+ if(net_cf_vx_mode)
+ prdy_nbsy = GPIO_GUMSTIX_PRDY_nBSY_0_OLD;
+ else
+ prdy_nbsy = GPIO_GUMSTIX_PRDY_nBSY_0;
+ nbvd1 = GPIO_GUMSTIX_nBVD1_0;
+ } else {
+ cd = GPIO_GUMSTIX_nCD_1;
+ prdy_nbsy = GPIO_GUMSTIX_PRDY_nBSY_1;
+ nbvd1 = GPIO_GUMSTIX_nBVD1_1;
+ }
+ state->detect = !!gpio_get_value(cd);
+ state->ready = !!gpio_get_value(prdy_nbsy);
+ state->bvd1 = !!gpio_get_value(nbvd1);
+ state->bvd2 = 1;
+ state->vs_3v = 0;
+ state->vs_Xv = 0;
+ state->wrprot = 0;
+}
+
+static int gumstix_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
+ const socket_state_t *state)
+{
+ return 0;
+}
+
+static void gumstix_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
+{
+ if(skt->nr) {
+ soc_pcmcia_enable_irqs(skt, gumstix_pcmcia_irqs0, ARRAY_SIZE(gumstix_pcmcia_irqs0));
+ } else {
+ soc_pcmcia_enable_irqs(skt, gumstix_pcmcia_irqs1, ARRAY_SIZE(gumstix_pcmcia_irqs1));
+ }
+}
+
+static void gumstix_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
+{
+ if(skt->nr) {
+ soc_pcmcia_disable_irqs(skt, gumstix_pcmcia_irqs0, ARRAY_SIZE(gumstix_pcmcia_irqs0));
+ } else {
+ soc_pcmcia_disable_irqs(skt, gumstix_pcmcia_irqs1, ARRAY_SIZE(gumstix_pcmcia_irqs1));
+ }
+}
+
+static struct pcmcia_low_level gumstix_pcmcia_ops = {
+ .owner = THIS_MODULE,
+ .hw_init = gumstix_pcmcia_hw_init,
+ .hw_shutdown = gumstix_pcmcia_hw_shutdown,
+ .socket_state = gumstix_pcmcia_socket_state,
+ .configure_socket = gumstix_pcmcia_configure_socket,
+ .socket_init = gumstix_pcmcia_socket_init,
+ .socket_suspend = gumstix_pcmcia_socket_suspend,
+ .nr = 2,
+};
+
+static struct platform_device *gumstix_pcmcia_device;
+
+extern int __init gumstix_get_cf_cards(void);
+
+#ifdef CONFIG_MACH_GUMSTIX_VERDEX
+extern int __init gumstix_check_if_netCF_vx(void);
+#endif
+
+static int __init gumstix_pcmcia_init(void)
+{
+ int ret;
+
+#ifdef CONFIG_MACH_GUMSTIX_VERDEX
+ net_cf_vx_mode = gumstix_check_if_netCF_vx();
+#endif
+
+ gumstix_pcmcia_ops.nr = gumstix_get_cf_cards();
+
+ gumstix_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
+ if (!gumstix_pcmcia_device)
+ return -ENOMEM;
+
+ ret = platform_device_add_data(gumstix_pcmcia_device, &gumstix_pcmcia_ops,
+ sizeof(gumstix_pcmcia_ops));
+
+ if (ret == 0) {
+ printk(KERN_INFO "Registering gumstix PCMCIA interface.\n");
+ ret = platform_device_add(gumstix_pcmcia_device);
+ }
+
+ if (ret)
+ platform_device_put(gumstix_pcmcia_device);
+
+ return ret;
+}
+
+static void __exit gumstix_pcmcia_exit(void)
+{
+ /*
+ * This call is supposed to free our gumstix_pcmcia_device.
+ * Unfortunately platform_device don't have a free method, and
+ * we can't assume it's free of any reference at this point so we
+ * can't free it either.
+ */
+ platform_device_unregister(gumstix_pcmcia_device);
+}
+
+fs_initcall(gumstix_pcmcia_init);
+module_exit(gumstix_pcmcia_exit);
+
+MODULE_LICENSE("GPL");

View File

@ -1,24 +0,0 @@
--- a/kernel/printk.c
+++ b/kernel/printk.c
@@ -44,6 +44,10 @@
#include <asm/uaccess.h>
+#ifdef CONFIG_DEBUG_LL
+extern void printascii(char *);
+#endif /* CONFIG_DEBUG_LL */
+
/*
* Architectures can override it:
*/
@@ -900,6 +904,10 @@ asmlinkage int vprintk(const char *fmt,
}
}
+#ifdef CONFIG_DEBUG_LL
+ printascii(printk_buf);
+#endif
+
/*
* Copy the output into log_buf. If the caller didn't provide
* the appropriate log prefix, we insert them here

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@ -1,17 +0,0 @@
#
# Copyright (C) 2012 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/Default
NAME:=Default Profile
PACKAGES:=
endef
define Profile/Default/Description
Default PXA Profile
endef
$(eval $(call Profile,Default))

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@ -1,17 +0,0 @@
#
# Copyright (C) 2012 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/Gumstix
NAME:=Gumstix
PACKAGES:=uboot-pxa-gumstix
endef
define Profile/Atheros-ath5k/Description
Package set compatible with the Gumstix boards
endef
$(eval $(call Profile,Gumstix))