From 70ee4e9d9f054e258480fd51c90cfc2b72be8b78 Mon Sep 17 00:00:00 2001
From: Arnaud Ebalard <arno@natisbad.org>
Date: Sat, 22 Nov 2014 17:23:30 +0100
Subject: arm: mvebu: normalize pinctrl entries for Armada SoCs

There are currently 2 differents naming conventions used between the
existing Armada SoC DT files for pinctrl entries (*_pin(s): *-pin(s)
and pmx_*: pmx-*) with a vast majority of files using the former:

$ grep _pin arch/arm/boot/dts/armada-*.dts* | wc -l
155
$ grep pmx arch/arm/boot/dts/armada-*.dts* | wc -l
13

In fact, only some Armada XP files are using the second variant.
This patch normalizes those files (mainly ge0/1 entries) to use
the first variant.

Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/00114c3169e1d93259ff4150ed46ee36eae16b1e.1416670812.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

--- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts
+++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
@@ -84,14 +84,14 @@
 			};
 
 			ethernet@70000 {
-				pinctrl-0 = <&pmx_ge0_rgmii>;
+				pinctrl-0 = <&ge0_rgmii_pins>;
 				pinctrl-names = "default";
 				status = "okay";
 				phy = <&phy0>;
 				phy-mode = "rgmii-id";
 			};
 			ethernet@74000 {
-				pinctrl-0 = <&pmx_ge1_rgmii>;
+				pinctrl-0 = <&ge1_rgmii_pins>;
 				pinctrl-names = "default";
 				status = "okay";
 				phy = <&phy1>;
@@ -116,7 +116,7 @@
 		compatible = "gpio-keys";
 		#address-cells = <1>;
 		#size-cells = <0>;
-		pinctrl-0 = <&pmx_keys>;
+		pinctrl-0 = <&keys_pin>;
 		pinctrl-names = "default";
 
 		button@1 {
@@ -128,15 +128,15 @@
 };
 
 &pinctrl {
-	pinctrl-0 = <&pmx_phy_int>;
+	pinctrl-0 = <&phy_int_pin>;
 	pinctrl-names = "default";
 
-	pmx_keys: pmx-keys {
+	keys_pin: keys-pin {
 		marvell,pins = "mpp33";
 		marvell,function = "gpio";
 	};
 
-	pmx_phy_int: pmx-phy-int {
+	phy_int_pin: phy-int-pin {
 		marvell,pins = "mpp32";
 		marvell,function = "gpio";
 	};
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -220,7 +220,7 @@
 };
 
 &pinctrl {
-	pmx_ge0_gmii: pmx-ge0-gmii {
+	ge0_gmii_pins: ge0-gmii-pins {
 		marvell,pins =
 		     "mpp0",  "mpp1",  "mpp2",  "mpp3",
 		     "mpp4",  "mpp5",  "mpp6",  "mpp7",
@@ -231,7 +231,7 @@
 		marvell,function = "ge0";
 	};
 
-	pmx_ge0_rgmii: pmx-ge0-rgmii {
+	ge0_rgmii_pins: ge0-rgmii-pins {
 		marvell,pins =
 		     "mpp0", "mpp1", "mpp2", "mpp3",
 		     "mpp4", "mpp5", "mpp6", "mpp7",
@@ -239,7 +239,7 @@
 		marvell,function = "ge0";
 	};
 
-	pmx_ge1_rgmii: pmx-ge1-rgmii {
+	ge1_rgmii_pins: ge1-rgmii-pins {
 		marvell,pins =
 		     "mpp12", "mpp13", "mpp14", "mpp15",
 		     "mpp16", "mpp17", "mpp18", "mpp19",
