commit d3ff53b8f46bbc46c54848a373d46ffc33b541fa Author: Serge Bazanski Date: Fri Nov 12 00:37:27 2021 +0000 it panics, ship it diff --git a/.cargo/config b/.cargo/config new file mode 100644 index 0000000..c22e5ec --- /dev/null +++ b/.cargo/config @@ -0,0 +1,9 @@ +[build] +target = "arm-elf-eabi.json" + +[target.arm-elf-eabi] +rustflags = ["-C", "link-arg=-Tlink.x"] + +[unstable] +build-std = ["core", "compiler_builtins"] +build-std-features = ["compiler-builtins-mem"] diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..5e1d679 --- /dev/null +++ b/.gitignore @@ -0,0 +1,2 @@ +/target +flat.bin diff --git a/Cargo.lock b/Cargo.lock new file mode 100644 index 0000000..184692d --- /dev/null +++ b/Cargo.lock @@ -0,0 +1,349 @@ +# This file is automatically @generated by Cargo. +# It is not intended for manual editing. +version = 3 + +[[package]] +name = "aho-corasick" +version = "0.7.18" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = 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"data-layout": "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64", + "executables": true, + "relocation-model": "static" +} diff --git a/demo/Cargo.toml b/demo/Cargo.toml new file mode 100644 index 0000000..cc4498b --- /dev/null +++ b/demo/Cargo.toml @@ -0,0 +1,13 @@ +[package] +name = "demo" +version = "0.1.0" +edition = "2021" + +# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html + +[dependencies] +ibugger_rt = { path = "../ibugger_rt" } +s5l87xx = { path = "../s5l87xx" } +nano5g = { path = "../nano5g" } +heapless = "0" +embedded-graphics = "0" diff --git a/demo/src/.main.rs.swp b/demo/src/.main.rs.swp new file mode 100644 index 0000000..a00a22b Binary files /dev/null and b/demo/src/.main.rs.swp differ diff --git a/demo/src/.panique.rs.swp b/demo/src/.panique.rs.swp new file mode 100644 index 0000000..910fa5a Binary files /dev/null and b/demo/src/.panique.rs.swp differ diff --git a/demo/src/console.rs b/demo/src/console.rs new file mode 100644 index 0000000..5e82aba --- /dev/null +++ b/demo/src/console.rs @@ -0,0 +1,102 @@ +use embedded_graphics::{ + Drawable, + geometry::{Point, Size}, + mono_font::{ascii::FONT_6X10, MonoTextStyle}, + prelude::{RgbColor}, + primitives::rectangle::Rectangle, + text::{Text, Baseline}, + draw_target::DrawTarget, +}; + +pub struct Console { + array: [[char; W]; H], + dirty: [bool; H], + curline: usize, + curcol: usize, +} + +impl Console { + const FONT_H: i32 = 12; + const FONT_W: i32 = 6; + + pub fn new() -> Self { + Self { + array: [[' '; W]; H], + dirty: [true; H], + curline: 0, + curcol: 0, + } + } + + pub fn write_char(&mut self, c: char) { + let mut wrapped = false; + if self.curcol >= W { + self.curcol = 0; + self.curline += 1; + } + if self.curline >= H { + self.curline = 0; + for i in 0..W { + self.array[0][i] = ' '; + } + wrapped = true; + } + + if c == '\n' { + self.curline += 1; + self.curcol = 0; + } else { + self.array[self.curline][self.curcol] = c; + self.curcol += 1; + self.dirty[self.curline] = true; + } + + if wrapped { + //self.array.rotate_left(1); + for i in 0..H { + self.dirty[i] = true; + } + for i in 1..H { + for j in 0..W { + self.array[i][j] = ' '; + } + } + } + } + + pub fn blit(&mut self, target: &mut D) + where + D: DrawTarget, + { + let style = MonoTextStyle::new(&FONT_6X10, C::WHITE); + for (i, dirty) in self.dirty.iter().enumerate() { + if !dirty { + continue + } + + let mut s = heapless::String::::new(); + for c in self.array[i] { + s.push(c); + } + + let tl = Point::new(0, Self::FONT_H * (i as i32)); + let sz = Size::new((Self::FONT_W * (W as i32)) as u32, Self::FONT_H as u32); + let rect = Rectangle::new(tl, sz); + target.fill_solid(&rect, C::BLACK); + Text::with_baseline(&s, tl, style, Baseline::Top).draw(target); + } + for i in 0..H { + self.dirty[i] = false; + } + } +} + +impl core::fmt::Write for Console { + fn write_str(&mut self, text: &str) -> core::fmt::Result { + for c in text.chars() { + self.write_char(c); + } + Ok(()) + } +} + diff --git a/demo/src/main.rs b/demo/src/main.rs new file mode 100644 index 0000000..5f2cd99 --- /dev/null +++ b/demo/src/main.rs @@ -0,0 +1,46 @@ +#![feature(asm)] +#![feature(asm_const)] +#![feature(asm_sym)] +#![feature(naked_functions)] +#![feature(panic_info_message)] + +#![no_std] +#![no_main] + +use ibugger_rt::entry; +use s5l87xx::Peripherals; +use nano5g::lcd::{LCD, Display}; + +use core::fmt::Write; + +mod console; +mod panique; + +entry!(main); + +fn main() -> ! { + let periphs = unsafe { Peripherals::steal() }; + let lcd = LCD::new(periphs.LCD); + let mut display = Display::new(lcd); + + let mut console = console::Console::<{240/6}, {320/14}>::new(); + console.write_str("Hello, world!\n"); + console.blit(&mut display); + display.flush(); + + let mut i = 0; + loop { + core::fmt::write(&mut console, format_args!("tick {}\n", i)); + i += 1; + console.blit(&mut display); + display.flush(); + if i > 10 { + break + } + } + + let foo: Option = None; + foo.unwrap(); + + loop {} +} diff --git a/demo/src/panique.rs b/demo/src/panique.rs new file mode 100644 index 0000000..17934a3 --- /dev/null +++ b/demo/src/panique.rs @@ -0,0 +1,41 @@ +use core::panic::PanicInfo; +use core::fmt::Write; + +use crate::console::Console; +use nano5g::lcd::{LCD, Display}; +use s5l87xx::Peripherals; + +#[panic_handler] +fn panic(info: &PanicInfo) -> ! { + let periphs = unsafe { Peripherals::steal() }; + let lcd = LCD::new(periphs.LCD); + let mut display = Display::new(lcd); + + let mut console = Console::<{240/6}, {320/14}>::new(); + + console.write_str("Panic!\n"); + console.blit(&mut display); + display.flush(); + + if let Some(s) = info.payload().downcast_ref::<&str>() { + core::fmt::write(&mut console, format_args!( + "Payload: {:?}\n", s, + )); + } else if let Some(a) = info.message() { + console.write_str("Message: "); + core::fmt::write(&mut console, *a); + console.write_str("\n"); + } + console.blit(&mut display); + display.flush(); + + if let Some(location) = info.location() { + core::fmt::write(&mut console, format_args!("In {}:{}\n", location.file(), location.line())); + } else { + console.write_str("No location information.\n"); + } + console.blit(&mut display); + display.flush(); + + loop {} +} diff --git a/ibugger_rt/Cargo.toml b/ibugger_rt/Cargo.toml new file mode 100644 index 0000000..bc97e94 --- /dev/null +++ b/ibugger_rt/Cargo.toml @@ -0,0 +1,10 @@ +[package] +name = "ibugger_rt" +version = "0.1.0" +edition = "2021" + +# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html + +[dependencies] +volatile-register = "0" +heapless = "0" diff --git a/ibugger_rt/build.rs b/ibugger_rt/build.rs new file mode 100644 index 0000000..41a193d --- /dev/null +++ b/ibugger_rt/build.rs @@ -0,0 +1,15 @@ +use std::{env, error::Error, fs::File, io::Write, path::PathBuf}; + +fn main() -> Result<(), Box> { + // build directory for this crate + let out_dir = PathBuf::from(env::var_os("OUT_DIR").unwrap()); + + // extend the library search path + println!("cargo:rustc-link-search={}", out_dir.display()); + + // put `link.x` in the build directory + File::create(out_dir.join("link.x"))?.write_all(include_bytes!("link.x"))?; + + Ok(()) +} + diff --git a/ibugger_rt/link.x b/ibugger_rt/link.x new file mode 100644 index 0000000..52a2f56 --- /dev/null +++ b/ibugger_rt/link.x @@ -0,0 +1,43 @@ +MEMORY +{ + RAM : ORIGIN = 0x08000000, LENGTH = 32M +} + +ENTRY(Entrypoint); + +SECTIONS +{ + .ibugger_header ORIGIN(RAM) : + { + LONG(0xdeadbeef); + LONG(0xdeadbeef); + LONG(0xdeadbeef); + LONG(0xdeadbeef); + LONG(0xdeadbeef); + LONG(0xdeadbeef); + LONG(0xdeadbeef); + LONG(0xdeadbeef); + + KEEP(*(.ibugger_header.entrypoint)); + } > RAM + + .text : + { + *(.text .text.*); + } > RAM + + .data : + { + *(.data .data.*); + *(.bss .bss.*); + *(.rodata .rodata.*); + } > RAM + + _stack = ORIGIN(RAM) + LENGTH(RAM); + + /DISCARD/ : + { + *(.ARM .ARM.*); + *(.comment); + } +} diff --git a/ibugger_rt/src/lib.rs b/ibugger_rt/src/lib.rs new file mode 100644 index 0000000..e81c02d --- /dev/null +++ b/ibugger_rt/src/lib.rs @@ -0,0 +1,28 @@ +#![no_std] + +use core::panic::PanicInfo; + +#[macro_export] +macro_rules! entry { + ($path:path) => { + extern "C" { + static _stack: u8; + } + fn _typecheck() -> ! { + let f: fn() -> ! = $path; + f() + } + #[link_section = ".ibugger_header.entrypoint"] + #[no_mangle] + #[naked] + pub unsafe extern "C" fn Entrypoint() -> ! { + asm!( + "ldr sp, ={}", + "b {}", + sym _stack, + sym $path, + options(noreturn) + ); + } + } +} diff --git a/nano5g/Cargo.toml b/nano5g/Cargo.toml new file mode 100644 index 0000000..e9404ce --- /dev/null +++ b/nano5g/Cargo.toml @@ -0,0 +1,10 @@ +[package] +name = "nano5g" +version = "0.1.0" +edition = "2021" + +# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html + +[dependencies] +s5l87xx = { path = "../s5l87xx" } +embedded-graphics-core = "0" diff --git a/nano5g/src/lcd.rs b/nano5g/src/lcd.rs new file mode 100644 index 0000000..ee8a320 --- /dev/null +++ b/nano5g/src/lcd.rs @@ -0,0 +1,148 @@ +use embedded_graphics_core::{ + pixelcolor::{Rgb565, IntoStorage}, + draw_target::DrawTarget, + Pixel, + geometry::{OriginDimensions, Size}, +}; + +pub struct LCD { + p: s5l87xx::LCD +} + +pub struct Rectangle { + pub startx: u16, + pub endx: u16, + pub starty: u16, + pub endy: u16, +} + +impl Rectangle { + pub fn new(width: u16, height: u16) -> Self { + Self { + startx: 0, + endx: width - 1, + starty: 0, + endy: height - 1, + } + } + + fn width(&self) -> u16 { + (self.endx - self.startx) + 1 + } + + fn height(&self) -> u16 { + (self.endy - self.starty) + 1 + } +} + +impl LCD { + pub const WIDTH: usize = 240; + pub const HEIGHT: usize = 320; + + pub fn new(lcd: s5l87xx::LCD) -> Self { + Self { p: lcd } + } + + fn wait_sync(&self) { + loop { + if self.p.status.read().full().bit_is_clear() { + break + } + } + } + + fn send_command(&mut self, cmd: u8) { + self.wait_sync(); + self.p.wcmd.write(|w| unsafe { w.wcmd().bits(cmd) }); + } + + fn send_data(&mut self, data: u16) { + let data = data as u32; + let data: u32 = ((data & 0x7f00) << 1) | (data & 0xff); + self.wait_sync(); + self.p.wdata.write(|w| unsafe { w.bits(data) }); + } + + fn setup(&mut self, rect: &Rectangle) { + self.send_command(0x2a); + self.send_data(rect.startx); + self.send_data(rect.endx); + + self.send_command(0x2b); + self.send_data(rect.starty); + self.send_data(rect.endy); + + self.send_command(0x2c); + } + + pub fn draw(&mut self, rect: &Rectangle, data: &[u16]) { + self.setup(rect); + let (w, h) = (rect.width(), rect.height()); + + for y in 0u16..h { + for x in 0u16..w { + let ix: usize = (y as usize) * (w as usize) + (x as usize); + if ix >= data.len() { + continue + } + let pix = data[ix]; + self.send_data(pix); + } + } + } + + pub fn full_rect() -> Rectangle { + Rectangle::new(Self::WIDTH as u16, Self::HEIGHT as u16) + } +} + +pub struct Display { + underlying: LCD, + framebuffer: [u16; LCD::WIDTH * LCD::HEIGHT ], +} + +impl Display { + pub fn new(l: LCD) -> Self { + Self { + underlying: l, + framebuffer: [0; LCD::WIDTH * LCD::HEIGHT ], + } + } + pub fn flush(&mut self) -> Result<(), core::convert::Infallible> { + let rect = LCD::full_rect(); + self.underlying.draw(&rect, &self.framebuffer); + Ok(()) + } +} + +impl DrawTarget for Display { + type Color = Rgb565; + type Error = core::convert::Infallible; + + fn draw_iter(&mut self, pixels: I) -> Result<(), Self::Error> + where + I: IntoIterator>, + { + const W: u32 = LCD::WIDTH as u32; + const H: u32 = LCD::HEIGHT as u32; + + for Pixel(coord, color) in pixels.into_iter() { + if let Ok((x @ 0..W, y @ 0..H)) = coord.try_into() { + let index: u32 = y * W + x; + self.framebuffer[index as usize] = color.into_storage(); + } + } + + Ok(()) + } +} + + +impl OriginDimensions for Display { + fn size(&self) -> Size { + Size { + width: LCD::WIDTH as u32, + height: LCD::HEIGHT as u32, + } + } +} diff --git a/nano5g/src/lib.rs b/nano5g/src/lib.rs new file mode 100644 index 0000000..36fdd10 --- /dev/null +++ b/nano5g/src/lib.rs @@ -0,0 +1,5 @@ +#![no_std] +#![feature(exclusive_range_pattern)] + +pub mod lcd; + diff --git a/s5l87xx/Cargo.toml b/s5l87xx/Cargo.toml new file mode 100644 index 0000000..e31b4b0 --- /dev/null +++ b/s5l87xx/Cargo.toml @@ -0,0 +1,9 @@ +[package] +name = "s5l87xx" +version = "0.1.0" +edition = "2021" + +# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html + +[dependencies] +vcell = "0" diff --git a/s5l87xx/lib.rs b/s5l87xx/lib.rs new file mode 100644 index 0000000..c69f2fb --- /dev/null +++ b/s5l87xx/lib.rs @@ -0,0 +1,308 @@ +# ! [doc = "Peripheral access API for S5L8720 microcontrollers (generated using svd2rust v0.19.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] +svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.19.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] +# ! [deny (const_err)] +# ! [deny (dead_code)] +# ! [deny (improper_ctypes)] +# ! [deny (missing_docs)] +# ! [deny (no_mangle_generic_items)] +# ! [deny (non_shorthand_field_patterns)] +# ! [deny (overflowing_literals)] +# ! [deny (path_statements)] +# ! [deny (patterns_in_fns_without_body)] +# ! [deny (private_in_public)] +# ! [deny (unconditional_recursion)] +# ! [deny (unused_allocation)] +# ! [deny (unused_comparisons)] +# ! [deny (unused_parens)] +# ! [deny (while_true)] +# ! [allow (non_camel_case_types)] +# ! [allow (non_snake_case)] +# ! [no_std] +use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] +pub const NVIC_PRIO_BITS : u8 = 5 ; # [allow (unused_imports)] +use generic :: * ; # [doc = r"Common register and bit access and modify traits"] +pub mod generic { use core :: marker ; # [doc = " Raw register type"] +pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] +type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] +# [doc = ""] +# [doc = " Registers marked with `Writable` can be also `modify`'ed."] +pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] +type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] +# [doc = ""] +# [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] +# [doc = ""] +# [doc = " Registers marked with `Readable` can be also `modify`'ed."] +pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] +type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] +# [doc = ""] +# [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] +# [doc = " register by using the `reset` method."] +pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] +fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] +# [repr (transparent)] +pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] +# [doc = ""] +# [doc = " ```ignore"] +# [doc = " let reg_ptr = periph.reg.as_ptr();"] +# [doc = " ```"] +# [inline (always)] +pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] +# [doc = ""] +# [doc = " You can read the raw contents of a register by using `bits`:"] +# [doc = " ```ignore"] +# [doc = " let bits = periph.reg.read().bits();"] +# [doc = " ```"] +# [doc = " or get the content of a particular field of a register:"] +# [doc = " ```ignore"] +# [doc = " let reader = periph.reg.read();"] +# [doc = " let bits = reader.field1().bits();"] +# [doc = " let flag = reader.field2().bit_is_set();"] +# [doc = " ```"] +# [inline (always)] +pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] +# [doc = ""] +# [doc = " Resets the register to its initial state."] +# [inline (always)] +pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] +# [doc = ""] +# [doc = " You can write raw bits into a register:"] +# [doc = " ```ignore"] +# [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] +# [doc = " ```"] +# [doc = " or write only the fields you need:"] +# [doc = " ```ignore"] +# [doc = " periph.reg.write(|w| w"] +# [doc = " .field1().bits(newfield1bits)"] +# [doc = " .field2().set_bit()"] +# [doc = " .field3().variant(VARIANT)"] +# [doc = " );"] +# [doc = " ```"] +# [doc = " In the latter case, other fields will be set to their reset value."] +# [inline (always)] +pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] +# [doc = ""] +# [doc = " Similar to `write`, but unused bits will contain 0."] +# [inline (always)] +pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] +# [doc = ""] +# [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] +# [doc = " ```ignore"] +# [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] +# [doc = " r.bits() | 3"] +# [doc = " ) });"] +# [doc = " ```"] +# [doc = " or"] +# [doc = " ```ignore"] +# [doc = " periph.reg.modify(|_, w| w"] +# [doc = " .field1().bits(newfield1bits)"] +# [doc = " .field2().set_bit()"] +# [doc = " .field3().variant(VARIANT)"] +# [doc = " );"] +# [doc = " ```"] +# [doc = " Other fields will have the value they had before the call to `modify`."] +# [inline (always)] +pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] +# [doc = ""] +# [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] +# [doc = " method."] +pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] +# [inline (always)] +pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] +fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] +# [doc = ""] +# [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] +pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] +pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] +# [inline (always)] +pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] +# [doc = ""] +# [doc = " Result of the `read` methods of fields."] +pub struct FieldReader < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , T > FieldReader < U , T > where U : Copy , { # [doc = " Creates a new instance of the reader."] +# [allow (unused)] +# [inline (always)] +pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } # [doc = " Reads raw bits from field."] +# [inline (always)] +pub fn bits (& self) -> U { self . bits } } impl < U , T , FI > PartialEq < FI > for FieldReader < U , T > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)] +fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > FieldReader < bool , FI > { # [doc = " Value of the field as raw bits."] +# [inline (always)] +pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] +# [inline (always)] +pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] +# [inline (always)] +pub fn bit_is_set (& self) -> bool { self . bit () } } } # [doc = "LCD Interface Controller"] +pub struct LCD { _marker : PhantomData < * const () > } unsafe impl Send for LCD { } impl LCD { # [doc = r"Pointer to the register block"] +pub const PTR : * const lcd :: RegisterBlock = 0x3830_0000 as * const _ ; # [doc = r"Return the pointer to the register block"] +# [inline (always)] +pub const fn ptr () -> * const lcd :: RegisterBlock { Self :: PTR } } impl Deref for LCD { type Target = lcd :: RegisterBlock ; # [inline (always)] +fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for LCD { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("LCD") . finish () } } # [doc = "LCD Interface Controller"] +pub mod lcd { # [doc = r"Register block"] +# [repr (C)] +pub struct RegisterBlock { # [doc = "0x00 - Control Register"] +pub con : crate :: Reg < con :: CON_SPEC > , # [doc = "0x04 - Write Command Register"] +pub wcmd : crate :: Reg < wcmd :: WCMD_SPEC > , _reserved2 : [u8 ; 0x04] +, # [doc = "0x0c - Read Command Register"] +pub rcmd : crate :: Reg < rcmd :: RCMD_SPEC > , # [doc = "0x10 - Read Data Register"] +pub rdata : crate :: Reg < rdata :: RDATA_SPEC > , # [doc = "0x14 - Read Data Buffer"] +pub dbuff : crate :: Reg < dbuff :: DBUFF_SPEC > , # [doc = "0x18 - Interrupt Control Register"] +pub intcon : crate :: Reg < intcon :: INTCON_SPEC > , # [doc = "0x1c - Interface Status Register"] +pub status : crate :: Reg < status :: STATUS_SPEC > , # [doc = "0x20 - Phase Time Register"] +pub phtime : crate :: Reg < phtime :: PHTIME_SPEC > , # [doc = "0x24 - Reset Active Period"] +pub rst_time : crate :: Reg < rst_time :: RST_TIME_SPEC > , # [doc = "0x28 - Reset Drive Signal"] +pub drv_rst : crate :: Reg < drv_rst :: DRV_RST_SPEC > , _reserved10 : [u8 ; 0x14] +, # [doc = "0x40 - Write Data Register"] +pub wdata : crate :: Reg < wdata :: WDATA_SPEC > , } # [doc = "CON register accessor: an alias for `Reg`"] +pub type CON = crate :: Reg < con :: CON_SPEC > ; # [doc = "Control Register"] +pub mod con { # [doc = "Register `CON` reader"] +pub struct R (crate :: R < CON_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < CON_SPEC > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < CON_SPEC >> for R { # [inline (always)] +fn from (reader : crate :: R < CON_SPEC >) -> Self { R (reader) } } # [doc = "Register `CON` writer"] +pub struct W (crate :: W < CON_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < CON_SPEC > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] +fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < CON_SPEC >> for W { # [inline (always)] +fn from (writer : crate :: W < CON_SPEC >) -> Self { W (writer) } } impl W { # [doc = "Writes raw bits to the register."] +# [inline (always)] +pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [con](index.html) module"] +pub struct CON_SPEC ; impl crate :: RegisterSpec for CON_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [con::R](R) reader structure"] +impl crate :: Readable for CON_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [con::W](W) writer structure"] +impl crate :: Writable for CON_SPEC { type Writer = W ; } # [doc = "`reset()` method sets CON to value 0"] +impl crate :: Resettable for CON_SPEC { # [inline (always)] +fn reset_value () -> Self :: Ux { 0 } } } # [doc = "WCMD register accessor: an alias for `Reg`"] +pub type WCMD = crate :: Reg < wcmd :: WCMD_SPEC > ; # [doc = "Write Command Register"] +pub mod wcmd { # [doc = "Register `WCMD` writer"] +pub struct W (crate :: W < WCMD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < WCMD_SPEC > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] +fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < WCMD_SPEC >> for W { # [inline (always)] +fn from (writer : crate :: W < WCMD_SPEC >) -> Self { W (writer) } } # [doc = "Field `WCMD` writer - Write LCD driver command"] +pub struct WCMD_W < 'a > { w : & 'a mut W , } impl < 'a > WCMD_W < 'a > { # [doc = r"Writes raw bits to the field"] +# [inline (always)] +pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u32 & 0xff) ; self . w } } impl W { # [doc = "Bits 0:7 - Write LCD driver command"] +# [inline (always)] +pub fn wcmd (& mut self) -> WCMD_W { WCMD_W { w : self } } # [doc = "Writes raw bits to the register."] +# [inline (always)] +pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Write Command Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wcmd](index.html) module"] +pub struct WCMD_SPEC ; impl crate :: RegisterSpec for WCMD_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [wcmd::W](W) writer structure"] +impl crate :: Writable for WCMD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets WCMD to value 0"] +impl crate :: Resettable for WCMD_SPEC { # [inline (always)] +fn reset_value () -> Self :: Ux { 0 } } } # [doc = "RCMD register accessor: an alias for `Reg`"] +pub type RCMD = crate :: Reg < rcmd :: RCMD_SPEC > ; # [doc = "Read Command Register"] +pub mod rcmd { # [doc = "Register `RCMD` reader"] +pub struct R (crate :: R < RCMD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < RCMD_SPEC > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < RCMD_SPEC >> for R { # [inline (always)] +fn from (reader : crate :: R < RCMD_SPEC >) -> Self { R (reader) } } # [doc = "Read Command Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rcmd](index.html) module"] +pub struct RCMD_SPEC ; impl crate :: RegisterSpec for RCMD_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [rcmd::R](R) reader structure"] +impl crate :: Readable for RCMD_SPEC { type Reader = R ; } # [doc = "`reset()` method sets RCMD to value 0"] +impl crate :: Resettable for RCMD_SPEC { # [inline (always)] +fn reset_value () -> Self :: Ux { 0 } } } # [doc = "RDATA register accessor: an alias for `Reg`"] +pub type RDATA = crate :: Reg < rdata :: RDATA_SPEC > ; # [doc = "Read Data Register"] +pub mod rdata { # [doc = "Register `RDATA` reader"] +pub struct R (crate :: R < RDATA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < RDATA_SPEC > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < RDATA_SPEC >> for R { # [inline (always)] +fn from (reader : crate :: R < RDATA_SPEC >) -> Self { R (reader) } } # [doc = "Read Data Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rdata](index.html) module"] +pub struct RDATA_SPEC ; impl crate :: RegisterSpec for RDATA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [rdata::R](R) reader structure"] +impl crate :: Readable for RDATA_SPEC { type Reader = R ; } # [doc = "`reset()` method sets RDATA to value 0"] +impl crate :: Resettable for RDATA_SPEC { # [inline (always)] +fn reset_value () -> Self :: Ux { 0 } } } # [doc = "DBUFF register accessor: an alias for `Reg`"] +pub type DBUFF = crate :: Reg < dbuff :: DBUFF_SPEC > ; # [doc = "Read Data Buffer"] +pub mod dbuff { # [doc = "Register `DBUFF` reader"] +pub struct R (crate :: R < DBUFF_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < DBUFF_SPEC > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < DBUFF_SPEC >> for R { # [inline (always)] +fn from (reader : crate :: R < DBUFF_SPEC >) -> Self { R (reader) } } # [doc = "Read Data Buffer\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbuff](index.html) module"] +pub struct DBUFF_SPEC ; impl crate :: RegisterSpec for DBUFF_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [dbuff::R](R) reader structure"] +impl crate :: Readable for DBUFF_SPEC { type Reader = R ; } # [doc = "`reset()` method sets DBUFF to value 0"] +impl crate :: Resettable for DBUFF_SPEC { # [inline (always)] +fn reset_value () -> Self :: Ux { 0 } } } # [doc = "INTCON register accessor: an alias for `Reg`"] +pub type INTCON = crate :: Reg < intcon :: INTCON_SPEC > ; # [doc = "Interrupt Control Register"] +pub mod intcon { # [doc = "Register `INTCON` reader"] +pub struct R (crate :: R < INTCON_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < INTCON_SPEC > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < INTCON_SPEC >> for R { # [inline (always)] +fn from (reader : crate :: R < INTCON_SPEC >) -> Self { R (reader) } } # [doc = "Register `INTCON` writer"] +pub struct W (crate :: W < INTCON_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INTCON_SPEC > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] +fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INTCON_SPEC >> for W { # [inline (always)] +fn from (writer : crate :: W < INTCON_SPEC >) -> Self { W (writer) } } impl W { # [doc = "Writes raw bits to the register."] +# [inline (always)] +pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intcon](index.html) module"] +pub struct INTCON_SPEC ; impl crate :: RegisterSpec for INTCON_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [intcon::R](R) reader structure"] +impl crate :: Readable for INTCON_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [intcon::W](W) writer structure"] +impl crate :: Writable for INTCON_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INTCON to value 0"] +impl crate :: Resettable for INTCON_SPEC { # [inline (always)] +fn reset_value () -> Self :: Ux { 0 } } } # [doc = "STATUS register accessor: an alias for `Reg`"] +pub type STATUS = crate :: Reg < status :: STATUS_SPEC > ; # [doc = "Interface Status Register"] +pub mod status { # [doc = "Register `STATUS` reader"] +pub struct R (crate :: R < STATUS_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < STATUS_SPEC > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < STATUS_SPEC >> for R { # [inline (always)] +fn from (reader : crate :: R < STATUS_SPEC >) -> Self { R (reader) } } # [doc = "Field `FULL` reader - FIFO is Full"] +pub struct FULL_R (crate :: FieldReader < bool , bool >) ; impl FULL_R { pub (crate) fn new (bits : bool) -> Self { FULL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for FULL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 4 - FIFO is Full"] +# [inline (always)] +pub fn full (& self) -> FULL_R { FULL_R :: new (((self . bits >> 4) & 0x01) != 0) } } # [doc = "Interface Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] +pub struct STATUS_SPEC ; impl crate :: RegisterSpec for STATUS_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [status::R](R) reader structure"] +impl crate :: Readable for STATUS_SPEC { type Reader = R ; } # [doc = "`reset()` method sets STATUS to value 0"] +impl crate :: Resettable for STATUS_SPEC { # [inline (always)] +fn reset_value () -> Self :: Ux { 0 } } } # [doc = "PHTIME register accessor: an alias for `Reg`"] +pub type PHTIME = crate :: Reg < phtime :: PHTIME_SPEC > ; # [doc = "Phase Time Register"] +pub mod phtime { # [doc = "Register `PHTIME` reader"] +pub struct R (crate :: R < PHTIME_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < PHTIME_SPEC > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < PHTIME_SPEC >> for R { # [inline (always)] +fn from (reader : crate :: R < PHTIME_SPEC >) -> Self { R (reader) } } # [doc = "Register `PHTIME` writer"] +pub struct W (crate :: W < PHTIME_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < PHTIME_SPEC > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] +fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < PHTIME_SPEC >> for W { # [inline (always)] +fn from (writer : crate :: W < PHTIME_SPEC >) -> Self { W (writer) } } impl W { # [doc = "Writes raw bits to the register."] +# [inline (always)] +pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Phase Time Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [phtime](index.html) module"] +pub struct PHTIME_SPEC ; impl crate :: RegisterSpec for PHTIME_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [phtime::R](R) reader structure"] +impl crate :: Readable for PHTIME_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [phtime::W](W) writer structure"] +impl crate :: Writable for PHTIME_SPEC { type Writer = W ; } # [doc = "`reset()` method sets PHTIME to value 0x0106"] +impl crate :: Resettable for PHTIME_SPEC { # [inline (always)] +fn reset_value () -> Self :: Ux { 0x0106 } } } # [doc = "RST_TIME register accessor: an alias for `Reg`"] +pub type RST_TIME = crate :: Reg < rst_time :: RST_TIME_SPEC > ; # [doc = "Reset Active Period"] +pub mod rst_time { # [doc = "Register `RST_TIME` reader"] +pub struct R (crate :: R < RST_TIME_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < RST_TIME_SPEC > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < RST_TIME_SPEC >> for R { # [inline (always)] +fn from (reader : crate :: R < RST_TIME_SPEC >) -> Self { R (reader) } } # [doc = "Register `RST_TIME` writer"] +pub struct W (crate :: W < RST_TIME_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < RST_TIME_SPEC > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] +fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < RST_TIME_SPEC >> for W { # [inline (always)] +fn from (writer : crate :: W < RST_TIME_SPEC >) -> Self { W (writer) } } impl W { # [doc = "Writes raw bits to the register."] +# [inline (always)] +pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Reset Active Period\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rst_time](index.html) module"] +pub struct RST_TIME_SPEC ; impl crate :: RegisterSpec for RST_TIME_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [rst_time::R](R) reader structure"] +impl crate :: Readable for RST_TIME_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [rst_time::W](W) writer structure"] +impl crate :: Writable for RST_TIME_SPEC { type Writer = W ; } # [doc = "`reset()` method sets RST_TIME to value 0x07ff"] +impl crate :: Resettable for RST_TIME_SPEC { # [inline (always)] +fn reset_value () -> Self :: Ux { 0x07ff } } } # [doc = "DRV_RST register accessor: an alias for `Reg`"] +pub type DRV_RST = crate :: Reg < drv_rst :: DRV_RST_SPEC > ; # [doc = "Reset Drive Signal"] +pub mod drv_rst { # [doc = "Register `DRV_RST` reader"] +pub struct R (crate :: R < DRV_RST_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < DRV_RST_SPEC > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < DRV_RST_SPEC >> for R { # [inline (always)] +fn from (reader : crate :: R < DRV_RST_SPEC >) -> Self { R (reader) } } # [doc = "Register `DRV_RST` writer"] +pub struct W (crate :: W < DRV_RST_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < DRV_RST_SPEC > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] +fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < DRV_RST_SPEC >> for W { # [inline (always)] +fn from (writer : crate :: W < DRV_RST_SPEC >) -> Self { W (writer) } } impl W { # [doc = "Writes raw bits to the register."] +# [inline (always)] +pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Reset Drive Signal\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [drv_rst](index.html) module"] +pub struct DRV_RST_SPEC ; impl crate :: RegisterSpec for DRV_RST_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [drv_rst::R](R) reader structure"] +impl crate :: Readable for DRV_RST_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [drv_rst::W](W) writer structure"] +impl crate :: Writable for DRV_RST_SPEC { type Writer = W ; } # [doc = "`reset()` method sets DRV_RST to value 0x01"] +impl crate :: Resettable for DRV_RST_SPEC { # [inline (always)] +fn reset_value () -> Self :: Ux { 0x01 } } } # [doc = "WDATA register accessor: an alias for `Reg`"] +pub type WDATA = crate :: Reg < wdata :: WDATA_SPEC > ; # [doc = "Write Data Register"] +pub mod wdata { # [doc = "Register `WDATA` writer"] +pub struct W (crate :: W < WDATA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < WDATA_SPEC > ; # [inline (always)] +fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] +fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < WDATA_SPEC >> for W { # [inline (always)] +fn from (writer : crate :: W < WDATA_SPEC >) -> Self { W (writer) } } impl W { # [doc = "Writes raw bits to the register."] +# [inline (always)] +pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Write Data Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdata](index.html) module"] +pub struct WDATA_SPEC ; impl crate :: RegisterSpec for WDATA_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [wdata::W](W) writer structure"] +impl crate :: Writable for WDATA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets WDATA to value 0"] +impl crate :: Resettable for WDATA_SPEC { # [inline (always)] +fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] +static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] +# [allow (non_snake_case)] +pub struct Peripherals { # [doc = "LCD"] +pub LCD : LCD , } impl Peripherals { # [doc = r"Unchecked version of `Peripherals::take`"] +# [inline] +pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { LCD : LCD { _marker : PhantomData } , } } } \ No newline at end of file diff --git a/s5l87xx/s5l87xx.xml b/s5l87xx/s5l87xx.xml new file mode 100644 index 0000000..a969020 --- /dev/null +++ b/s5l87xx/s5l87xx.xml @@ -0,0 +1,129 @@ + + + + + + Samsung + Samsung + S5L8720 + S5L + 0.1 + Audio player IC + + ARM1176 + little + 1 + true + true + 5 + false + + 32 + 32 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + + LCD + 1.0 + LCD Interface Controller + 0x38300000 + + 0 + 0x44 + registers + + + + CON + Control Register + 0x00 + + + WCMD + Write Command Register + 0x04 + write-only + + + WCMD + Write LCD driver command + [7:0] + write-only + + + + + RCMD + Read Command Register + 0x0C + read-only + + + RDATA + Read Data Register + 0x10 + read-only + + + DBUFF + Read Data Buffer + 0x14 + read-only + + + INTCON + Interrupt Control Register + 0x18 + read-write + + + STATUS + Interface Status Register + 0x1C + read-only + + + FULL + FIFO is Full + [4:4] + read-only + + + + + PHTIME + Phase Time Register + 0x20 + read-write + 0x00000106 + + + RST_TIME + Reset Active Period + 0x24 + read-write + 0x000007FF + + + DRV_RST + Reset Drive Signal + 0x28 + read-write + 0x00000001 + + + WDATA + Write Data Register + 0x40 + write-only + + + + + diff --git a/s5l87xx/src/generic.rs b/s5l87xx/src/generic.rs new file mode 100644 index 0000000..de75e28 --- /dev/null +++ b/s5l87xx/src/generic.rs @@ -0,0 +1 @@ +use core :: marker ; # [ doc = " Raw register type" ] pub trait RegisterSpec { # [ doc = " Raw register type (`u8`, `u16`, `u32`, ...)." ] type Ux : Copy ; } # [ doc = " Trait implemented by readable registers to enable the `read` method." ] # [ doc = "" ] # [ doc = " Registers marked with `Writable` can be also `modify`'ed." ] pub trait Readable : RegisterSpec { # [ doc = " Result from a call to `read` and argument to `modify`." ] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [ doc = " Trait implemented by writeable registers." ] # [ doc = "" ] # [ doc = " This enables the `write`, `write_with_zero` and `reset` methods." ] # [ doc = "" ] # [ doc = " Registers marked with `Readable` can be also `modify`'ed." ] pub trait Writable : RegisterSpec { # [ doc = " Writer type argument to `write`, et al." ] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [ doc = " Reset value of the register." ] # [ doc = "" ] # [ doc = " This value is the initial value for the `write` method. It can also be directly written to the" ] # [ doc = " register by using the `reset` method." ] pub trait Resettable : RegisterSpec { # [ doc = " Reset value of the register." ] fn reset_value ( ) -> Self :: Ux ; } # [ doc = " This structure provides volatile access to registers." ] # [ repr ( transparent ) ] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [ doc = " Returns the underlying memory address of register." ] # [ doc = "" ] # [ doc = " ```ignore" ] # [ doc = " let reg_ptr = periph.reg.as_ptr();" ] # [ doc = " ```" ] # [ inline ( always ) ] pub fn as_ptr ( & self ) -> * mut REG :: Ux { self . register . as_ptr ( ) } } impl < REG : Readable > Reg < REG > { # [ doc = " Reads the contents of a `Readable` register." ] # [ doc = "" ] # [ doc = " You can read the raw contents of a register by using `bits`:" ] # [ doc = " ```ignore" ] # [ doc = " let bits = periph.reg.read().bits();" ] # [ doc = " ```" ] # [ doc = " or get the content of a particular field of a register:" ] # [ doc = " ```ignore" ] # [ doc = " let reader = periph.reg.read();" ] # [ doc = " let bits = reader.field1().bits();" ] # [ doc = " let flag = reader.field2().bit_is_set();" ] # [ doc = " ```" ] # [ inline ( always ) ] pub fn read ( & self ) -> REG :: Reader { REG :: Reader :: from ( R { bits : self . register . get ( ) , _reg : marker :: PhantomData , } ) } } impl < REG : Resettable + Writable > Reg < REG > { # [ doc = " Writes the reset value to `Writable` register." ] # [ doc = "" ] # [ doc = " Resets the register to its initial state." ] # [ inline ( always ) ] pub fn reset ( & self ) { self . register . set ( REG :: reset_value ( ) ) } # [ doc = " Writes bits to a `Writable` register." ] # [ doc = "" ] # [ doc = " You can write raw bits into a register:" ] # [ doc = " ```ignore" ] # [ doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });" ] # [ doc = " ```" ] # [ doc = " or write only the fields you need:" ] # [ doc = " ```ignore" ] # [ doc = " periph.reg.write(|w| w" ] # [ doc = " .field1().bits(newfield1bits)" ] # [ doc = " .field2().set_bit()" ] # [ doc = " .field3().variant(VARIANT)" ] # [ doc = " );" ] # [ doc = " ```" ] # [ doc = " In the latter case, other fields will be set to their reset value." ] # [ inline ( always ) ] pub fn write < F > ( & self , f : F ) where F : FnOnce ( & mut REG :: Writer ) -> & mut W < REG > { self . register . set ( f ( & mut REG :: Writer :: from ( W { bits : REG :: reset_value ( ) , _reg : marker :: PhantomData , } ) ) . bits , ) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [ doc = " Writes 0 to a `Writable` register." ] # [ doc = "" ] # [ doc = " Similar to `write`, but unused bits will contain 0." ] # [ inline ( always ) ] pub unsafe fn write_with_zero < F > ( & self , f : F ) where F : FnOnce ( & mut REG :: Writer ) -> & mut W < REG > { self . register . set ( ( * f ( & mut REG :: Writer :: from ( W { bits : REG :: Ux :: default ( ) , _reg : marker :: PhantomData , } ) ) ) . bits , ) ; } } impl < REG : Readable + Writable > Reg < REG > { # [ doc = " Modifies the contents of the register by reading and then writing it." ] # [ doc = "" ] # [ doc = " E.g. to do a read-modify-write sequence to change parts of a register:" ] # [ doc = " ```ignore" ] # [ doc = " periph.reg.modify(|r, w| unsafe { w.bits(" ] # [ doc = " r.bits() | 3" ] # [ doc = " ) });" ] # [ doc = " ```" ] # [ doc = " or" ] # [ doc = " ```ignore" ] # [ doc = " periph.reg.modify(|_, w| w" ] # [ doc = " .field1().bits(newfield1bits)" ] # [ doc = " .field2().set_bit()" ] # [ doc = " .field3().variant(VARIANT)" ] # [ doc = " );" ] # [ doc = " ```" ] # [ doc = " Other fields will have the value they had before the call to `modify`." ] # [ inline ( always ) ] pub fn modify < F > ( & self , f : F ) where for < 'w > F : FnOnce ( & REG :: Reader , & 'w mut REG :: Writer ) -> & 'w mut W < REG > { let bits = self . register . get ( ) ; self . register . set ( f ( & REG :: Reader :: from ( R { bits , _reg : marker :: PhantomData , } ) , & mut REG :: Writer :: from ( W { bits , _reg : marker :: PhantomData , } ) , ) . bits , ) ; } } # [ doc = " Register reader." ] # [ doc = "" ] # [ doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`" ] # [ doc = " method." ] pub struct R < REG : RegisterSpec + ? Sized > { pub ( crate ) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [ doc = " Reads raw bits from register." ] # [ inline ( always ) ] pub fn bits ( & self ) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [ inline ( always ) ] fn eq ( & self , other : & FI ) -> bool { self . bits . eq ( & ( * other ) . into ( ) ) } } # [ doc = " Register writer." ] # [ doc = "" ] # [ doc = " Used as an argument to the closures in the `write` and `modify` methods of the register." ] pub struct W < REG : RegisterSpec + ? Sized > { # [ doc = "Writable bits" ] pub ( crate ) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [ doc = " Writes raw bits to the register." ] # [ inline ( always ) ] pub unsafe fn bits ( & mut self , bits : REG :: Ux ) -> & mut Self { self . bits = bits ; self } } # [ doc = " Field reader." ] # [ doc = "" ] # [ doc = " Result of the `read` methods of fields." ] pub struct FieldReader < U , T > { pub ( crate ) bits : U , _reg : marker :: PhantomData < T > , } impl < U , T > FieldReader < U , T > where U : Copy , { # [ doc = " Creates a new instance of the reader." ] # [ allow ( unused ) ] # [ inline ( always ) ] pub ( crate ) fn new ( bits : U ) -> Self { Self { bits , _reg : marker :: PhantomData , } } # [ doc = " Reads raw bits from field." ] # [ inline ( always ) ] pub fn bits ( & self ) -> U { self . bits } } impl < U , T , FI > PartialEq < FI > for FieldReader < U , T > where U : PartialEq , FI : Copy + Into < U > , { # [ inline ( always ) ] fn eq ( & self , other : & FI ) -> bool { self . bits . eq ( & ( * other ) . into ( ) ) } } impl < FI > FieldReader < bool , FI > { # [ doc = " Value of the field as raw bits." ] # [ inline ( always ) ] pub fn bit ( & self ) -> bool { self . bits } # [ doc = " Returns `true` if the bit is clear (0)." ] # [ inline ( always ) ] pub fn bit_is_clear ( & self ) -> bool { ! self . bit ( ) } # [ doc = " Returns `true` if the bit is set (1)." ] # [ inline ( always ) ] pub fn bit_is_set ( & self ) -> bool { self . bit ( ) } } \ No newline at end of file diff --git a/s5l87xx/src/lcd.rs b/s5l87xx/src/lcd.rs new file mode 100644 index 0000000..fc6f52b --- /dev/null +++ b/s5l87xx/src/lcd.rs @@ -0,0 +1 @@ +# [ doc = r"Register block" ] # [ repr ( C ) ] pub struct RegisterBlock { # [ doc = "0x00 - Control Register" ] pub con : crate :: Reg < con :: CON_SPEC > , # [ doc = "0x04 - Write Command Register" ] pub wcmd : crate :: Reg < wcmd :: WCMD_SPEC > , _reserved2 : [ u8 ; 0x04 ] , # [ doc = "0x0c - Read Command Register" ] pub rcmd : crate :: Reg < rcmd :: RCMD_SPEC > , # [ doc = "0x10 - Read Data Register" ] pub rdata : crate :: Reg < rdata :: RDATA_SPEC > , # [ doc = "0x14 - Read Data Buffer" ] pub dbuff : crate :: Reg < dbuff :: DBUFF_SPEC > , # [ doc = "0x18 - Interrupt Control Register" ] pub intcon : crate :: Reg < intcon :: INTCON_SPEC > , # [ doc = "0x1c - Interface Status Register" ] pub status : crate :: Reg < status :: STATUS_SPEC > , # [ doc = "0x20 - Phase Time Register" ] pub phtime : crate :: Reg < phtime :: PHTIME_SPEC > , # [ doc = "0x24 - Reset Active Period" ] pub rst_time : crate :: Reg < rst_time :: RST_TIME_SPEC > , # [ doc = "0x28 - Reset Drive Signal" ] pub drv_rst : crate :: Reg < drv_rst :: DRV_RST_SPEC > , _reserved10 : [ u8 ; 0x14 ] , # [ doc = "0x40 - Write Data Register" ] pub wdata : crate :: Reg < wdata :: WDATA_SPEC > , } # [ doc = "CON register accessor: an alias for `Reg`" ] pub type CON = crate :: Reg < con :: CON_SPEC > ; # [ doc = "Control Register" ] pub mod con ; # [ doc = "WCMD register accessor: an alias for `Reg`" ] pub type WCMD = crate :: Reg < wcmd :: WCMD_SPEC > ; # [ doc = "Write Command Register" ] pub mod wcmd ; # [ doc = "RCMD register accessor: an alias for `Reg`" ] pub type RCMD = crate :: Reg < rcmd :: RCMD_SPEC > ; # [ doc = "Read Command Register" ] pub mod rcmd ; # [ doc = "RDATA register accessor: an alias for `Reg`" ] pub type RDATA = crate :: Reg < rdata :: RDATA_SPEC > ; # [ doc = "Read Data Register" ] pub mod rdata ; # [ doc = "DBUFF register accessor: an alias for `Reg`" ] pub type DBUFF = crate :: Reg < dbuff :: DBUFF_SPEC > ; # [ doc = "Read Data Buffer" ] pub mod dbuff ; # [ doc = "INTCON register accessor: an alias for `Reg`" ] pub type INTCON = crate :: Reg < intcon :: INTCON_SPEC > ; # [ doc = "Interrupt Control Register" ] pub mod intcon ; # [ doc = "STATUS register accessor: an alias for `Reg`" ] pub type STATUS = crate :: Reg < status :: STATUS_SPEC > ; # [ doc = "Interface Status Register" ] pub mod status ; # [ doc = "PHTIME register accessor: an alias for `Reg`" ] pub type PHTIME = crate :: Reg < phtime :: PHTIME_SPEC > ; # [ doc = "Phase Time Register" ] pub mod phtime ; # [ doc = "RST_TIME register accessor: an alias for `Reg`" ] pub type RST_TIME = crate :: Reg < rst_time :: RST_TIME_SPEC > ; # [ doc = "Reset Active Period" ] pub mod rst_time ; # [ doc = "DRV_RST register accessor: an alias for `Reg`" ] pub type DRV_RST = crate :: Reg < drv_rst :: DRV_RST_SPEC > ; # [ doc = "Reset Drive Signal" ] pub mod drv_rst ; # [ doc = "WDATA register accessor: an alias for `Reg`" ] pub type WDATA = crate :: Reg < wdata :: WDATA_SPEC > ; # [ doc = "Write Data Register" ] pub mod wdata ; \ No newline at end of file diff --git a/s5l87xx/src/lcd/con.rs b/s5l87xx/src/lcd/con.rs new file mode 100644 index 0000000..ac7f52e --- /dev/null +++ b/s5l87xx/src/lcd/con.rs @@ -0,0 +1 @@ +# [ doc = "Register `CON` reader" ] pub struct R ( crate :: R < CON_SPEC > ) ; impl core :: ops :: Deref for R { type Target = crate :: R < CON_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl From < crate :: R < CON_SPEC > > for R { # [ inline ( always ) ] fn from ( reader : crate :: R < CON_SPEC > ) -> Self { R ( reader ) } } # [ doc = "Register `CON` writer" ] pub struct W ( crate :: W < CON_SPEC > ) ; impl core :: ops :: Deref for W { type Target = crate :: W < CON_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [ inline ( always ) ] fn deref_mut ( & mut self ) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < CON_SPEC > > for W { # [ inline ( always ) ] fn from ( writer : crate :: W < CON_SPEC > ) -> Self { W ( writer ) } } impl W { # [ doc = "Writes raw bits to the register." ] # [ inline ( always ) ] pub unsafe fn bits ( & mut self , bits : u32 ) -> & mut Self { self . 0 . bits ( bits ) ; self } } # [ doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [con](index.html) module" ] pub struct CON_SPEC ; impl crate :: RegisterSpec for CON_SPEC { type Ux = u32 ; } # [ doc = "`read()` method returns [con::R](R) reader structure" ] impl crate :: Readable for CON_SPEC { type Reader = R ; } # [ doc = "`write(|w| ..)` method takes [con::W](W) writer structure" ] impl crate :: Writable for CON_SPEC { type Writer = W ; } # [ doc = "`reset()` method sets CON to value 0" ] impl crate :: Resettable for CON_SPEC { # [ inline ( always ) ] fn reset_value ( ) -> Self :: Ux { 0 } } \ No newline at end of file diff --git a/s5l87xx/src/lcd/dbuff.rs b/s5l87xx/src/lcd/dbuff.rs new file mode 100644 index 0000000..700c6b7 --- /dev/null +++ b/s5l87xx/src/lcd/dbuff.rs @@ -0,0 +1 @@ +# [ doc = "Register `DBUFF` reader" ] pub struct R ( crate :: R < DBUFF_SPEC > ) ; impl core :: ops :: Deref for R { type Target = crate :: R < DBUFF_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl From < crate :: R < DBUFF_SPEC > > for R { # [ inline ( always ) ] fn from ( reader : crate :: R < DBUFF_SPEC > ) -> Self { R ( reader ) } } # [ doc = "Read Data Buffer\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbuff](index.html) module" ] pub struct DBUFF_SPEC ; impl crate :: RegisterSpec for DBUFF_SPEC { type Ux = u32 ; } # [ doc = "`read()` method returns [dbuff::R](R) reader structure" ] impl crate :: Readable for DBUFF_SPEC { type Reader = R ; } # [ doc = "`reset()` method sets DBUFF to value 0" ] impl crate :: Resettable for DBUFF_SPEC { # [ inline ( always ) ] fn reset_value ( ) -> Self :: Ux { 0 } } \ No newline at end of file diff --git a/s5l87xx/src/lcd/drv_rst.rs b/s5l87xx/src/lcd/drv_rst.rs new file mode 100644 index 0000000..ef0d2c8 --- /dev/null +++ b/s5l87xx/src/lcd/drv_rst.rs @@ -0,0 +1 @@ +# [ doc = "Register `DRV_RST` reader" ] pub struct R ( crate :: R < DRV_RST_SPEC > ) ; impl core :: ops :: Deref for R { type Target = crate :: R < DRV_RST_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl From < crate :: R < DRV_RST_SPEC > > for R { # [ inline ( always ) ] fn from ( reader : crate :: R < DRV_RST_SPEC > ) -> Self { R ( reader ) } } # [ doc = "Register `DRV_RST` writer" ] pub struct W ( crate :: W < DRV_RST_SPEC > ) ; impl core :: ops :: Deref for W { type Target = crate :: W < DRV_RST_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [ inline ( always ) ] fn deref_mut ( & mut self ) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < DRV_RST_SPEC > > for W { # [ inline ( always ) ] fn from ( writer : crate :: W < DRV_RST_SPEC > ) -> Self { W ( writer ) } } impl W { # [ doc = "Writes raw bits to the register." ] # [ inline ( always ) ] pub unsafe fn bits ( & mut self , bits : u32 ) -> & mut Self { self . 0 . bits ( bits ) ; self } } # [ doc = "Reset Drive Signal\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [drv_rst](index.html) module" ] pub struct DRV_RST_SPEC ; impl crate :: RegisterSpec for DRV_RST_SPEC { type Ux = u32 ; } # [ doc = "`read()` method returns [drv_rst::R](R) reader structure" ] impl crate :: Readable for DRV_RST_SPEC { type Reader = R ; } # [ doc = "`write(|w| ..)` method takes [drv_rst::W](W) writer structure" ] impl crate :: Writable for DRV_RST_SPEC { type Writer = W ; } # [ doc = "`reset()` method sets DRV_RST to value 0x01" ] impl crate :: Resettable for DRV_RST_SPEC { # [ inline ( always ) ] fn reset_value ( ) -> Self :: Ux { 0x01 } } \ No newline at end of file diff --git a/s5l87xx/src/lcd/intcon.rs b/s5l87xx/src/lcd/intcon.rs new file mode 100644 index 0000000..63578c9 --- /dev/null +++ b/s5l87xx/src/lcd/intcon.rs @@ -0,0 +1 @@ +# [ doc = "Register `INTCON` reader" ] pub struct R ( crate :: R < INTCON_SPEC > ) ; impl core :: ops :: Deref for R { type Target = crate :: R < INTCON_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl From < crate :: R < INTCON_SPEC > > for R { # [ inline ( always ) ] fn from ( reader : crate :: R < INTCON_SPEC > ) -> Self { R ( reader ) } } # [ doc = "Register `INTCON` writer" ] pub struct W ( crate :: W < INTCON_SPEC > ) ; impl core :: ops :: Deref for W { type Target = crate :: W < INTCON_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [ inline ( always ) ] fn deref_mut ( & mut self ) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INTCON_SPEC > > for W { # [ inline ( always ) ] fn from ( writer : crate :: W < INTCON_SPEC > ) -> Self { W ( writer ) } } impl W { # [ doc = "Writes raw bits to the register." ] # [ inline ( always ) ] pub unsafe fn bits ( & mut self , bits : u32 ) -> & mut Self { self . 0 . bits ( bits ) ; self } } # [ doc = "Interrupt Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intcon](index.html) module" ] pub struct INTCON_SPEC ; impl crate :: RegisterSpec for INTCON_SPEC { type Ux = u32 ; } # [ doc = "`read()` method returns [intcon::R](R) reader structure" ] impl crate :: Readable for INTCON_SPEC { type Reader = R ; } # [ doc = "`write(|w| ..)` method takes [intcon::W](W) writer structure" ] impl crate :: Writable for INTCON_SPEC { type Writer = W ; } # [ doc = "`reset()` method sets INTCON to value 0" ] impl crate :: Resettable for INTCON_SPEC { # [ inline ( always ) ] fn reset_value ( ) -> Self :: Ux { 0 } } \ No newline at end of file diff --git a/s5l87xx/src/lcd/phtime.rs b/s5l87xx/src/lcd/phtime.rs new file mode 100644 index 0000000..1d09332 --- /dev/null +++ b/s5l87xx/src/lcd/phtime.rs @@ -0,0 +1 @@ +# [ doc = "Register `PHTIME` reader" ] pub struct R ( crate :: R < PHTIME_SPEC > ) ; impl core :: ops :: Deref for R { type Target = crate :: R < PHTIME_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl From < crate :: R < PHTIME_SPEC > > for R { # [ inline ( always ) ] fn from ( reader : crate :: R < PHTIME_SPEC > ) -> Self { R ( reader ) } } # [ doc = "Register `PHTIME` writer" ] pub struct W ( crate :: W < PHTIME_SPEC > ) ; impl core :: ops :: Deref for W { type Target = crate :: W < PHTIME_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [ inline ( always ) ] fn deref_mut ( & mut self ) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < PHTIME_SPEC > > for W { # [ inline ( always ) ] fn from ( writer : crate :: W < PHTIME_SPEC > ) -> Self { W ( writer ) } } impl W { # [ doc = "Writes raw bits to the register." ] # [ inline ( always ) ] pub unsafe fn bits ( & mut self , bits : u32 ) -> & mut Self { self . 0 . bits ( bits ) ; self } } # [ doc = "Phase Time Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [phtime](index.html) module" ] pub struct PHTIME_SPEC ; impl crate :: RegisterSpec for PHTIME_SPEC { type Ux = u32 ; } # [ doc = "`read()` method returns [phtime::R](R) reader structure" ] impl crate :: Readable for PHTIME_SPEC { type Reader = R ; } # [ doc = "`write(|w| ..)` method takes [phtime::W](W) writer structure" ] impl crate :: Writable for PHTIME_SPEC { type Writer = W ; } # [ doc = "`reset()` method sets PHTIME to value 0x0106" ] impl crate :: Resettable for PHTIME_SPEC { # [ inline ( always ) ] fn reset_value ( ) -> Self :: Ux { 0x0106 } } \ No newline at end of file diff --git a/s5l87xx/src/lcd/rcmd.rs b/s5l87xx/src/lcd/rcmd.rs new file mode 100644 index 0000000..67b2ead --- /dev/null +++ b/s5l87xx/src/lcd/rcmd.rs @@ -0,0 +1 @@ +# [ doc = "Register `RCMD` reader" ] pub struct R ( crate :: R < RCMD_SPEC > ) ; impl core :: ops :: Deref for R { type Target = crate :: R < RCMD_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl From < crate :: R < RCMD_SPEC > > for R { # [ inline ( always ) ] fn from ( reader : crate :: R < RCMD_SPEC > ) -> Self { R ( reader ) } } # [ doc = "Read Command Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rcmd](index.html) module" ] pub struct RCMD_SPEC ; impl crate :: RegisterSpec for RCMD_SPEC { type Ux = u32 ; } # [ doc = "`read()` method returns [rcmd::R](R) reader structure" ] impl crate :: Readable for RCMD_SPEC { type Reader = R ; } # [ doc = "`reset()` method sets RCMD to value 0" ] impl crate :: Resettable for RCMD_SPEC { # [ inline ( always ) ] fn reset_value ( ) -> Self :: Ux { 0 } } \ No newline at end of file diff --git a/s5l87xx/src/lcd/rdata.rs b/s5l87xx/src/lcd/rdata.rs new file mode 100644 index 0000000..450e1cd --- /dev/null +++ b/s5l87xx/src/lcd/rdata.rs @@ -0,0 +1 @@ +# [ doc = "Register `RDATA` reader" ] pub struct R ( crate :: R < RDATA_SPEC > ) ; impl core :: ops :: Deref for R { type Target = crate :: R < RDATA_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl From < crate :: R < RDATA_SPEC > > for R { # [ inline ( always ) ] fn from ( reader : crate :: R < RDATA_SPEC > ) -> Self { R ( reader ) } } # [ doc = "Read Data Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rdata](index.html) module" ] pub struct RDATA_SPEC ; impl crate :: RegisterSpec for RDATA_SPEC { type Ux = u32 ; } # [ doc = "`read()` method returns [rdata::R](R) reader structure" ] impl crate :: Readable for RDATA_SPEC { type Reader = R ; } # [ doc = "`reset()` method sets RDATA to value 0" ] impl crate :: Resettable for RDATA_SPEC { # [ inline ( always ) ] fn reset_value ( ) -> Self :: Ux { 0 } } \ No newline at end of file diff --git a/s5l87xx/src/lcd/rst_time.rs b/s5l87xx/src/lcd/rst_time.rs new file mode 100644 index 0000000..ffaad9b --- /dev/null +++ b/s5l87xx/src/lcd/rst_time.rs @@ -0,0 +1 @@ +# [ doc = "Register `RST_TIME` reader" ] pub struct R ( crate :: R < RST_TIME_SPEC > ) ; impl core :: ops :: Deref for R { type Target = crate :: R < RST_TIME_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl From < crate :: R < RST_TIME_SPEC > > for R { # [ inline ( always ) ] fn from ( reader : crate :: R < RST_TIME_SPEC > ) -> Self { R ( reader ) } } # [ doc = "Register `RST_TIME` writer" ] pub struct W ( crate :: W < RST_TIME_SPEC > ) ; impl core :: ops :: Deref for W { type Target = crate :: W < RST_TIME_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [ inline ( always ) ] fn deref_mut ( & mut self ) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < RST_TIME_SPEC > > for W { # [ inline ( always ) ] fn from ( writer : crate :: W < RST_TIME_SPEC > ) -> Self { W ( writer ) } } impl W { # [ doc = "Writes raw bits to the register." ] # [ inline ( always ) ] pub unsafe fn bits ( & mut self , bits : u32 ) -> & mut Self { self . 0 . bits ( bits ) ; self } } # [ doc = "Reset Active Period\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rst_time](index.html) module" ] pub struct RST_TIME_SPEC ; impl crate :: RegisterSpec for RST_TIME_SPEC { type Ux = u32 ; } # [ doc = "`read()` method returns [rst_time::R](R) reader structure" ] impl crate :: Readable for RST_TIME_SPEC { type Reader = R ; } # [ doc = "`write(|w| ..)` method takes [rst_time::W](W) writer structure" ] impl crate :: Writable for RST_TIME_SPEC { type Writer = W ; } # [ doc = "`reset()` method sets RST_TIME to value 0x07ff" ] impl crate :: Resettable for RST_TIME_SPEC { # [ inline ( always ) ] fn reset_value ( ) -> Self :: Ux { 0x07ff } } \ No newline at end of file diff --git a/s5l87xx/src/lcd/status.rs b/s5l87xx/src/lcd/status.rs new file mode 100644 index 0000000..2e370fb --- /dev/null +++ b/s5l87xx/src/lcd/status.rs @@ -0,0 +1 @@ +# [ doc = "Register `STATUS` reader" ] pub struct R ( crate :: R < STATUS_SPEC > ) ; impl core :: ops :: Deref for R { type Target = crate :: R < STATUS_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl From < crate :: R < STATUS_SPEC > > for R { # [ inline ( always ) ] fn from ( reader : crate :: R < STATUS_SPEC > ) -> Self { R ( reader ) } } # [ doc = "Field `FULL` reader - FIFO is Full" ] pub struct FULL_R ( crate :: FieldReader < bool , bool > ) ; impl FULL_R { pub ( crate ) fn new ( bits : bool ) -> Self { FULL_R ( crate :: FieldReader :: new ( bits ) ) } } impl core :: ops :: Deref for FULL_R { type Target = crate :: FieldReader < bool , bool > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl R { # [ doc = "Bit 4 - FIFO is Full" ] # [ inline ( always ) ] pub fn full ( & self ) -> FULL_R { FULL_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } } # [ doc = "Interface Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module" ] pub struct STATUS_SPEC ; impl crate :: RegisterSpec for STATUS_SPEC { type Ux = u32 ; } # [ doc = "`read()` method returns [status::R](R) reader structure" ] impl crate :: Readable for STATUS_SPEC { type Reader = R ; } # [ doc = "`reset()` method sets STATUS to value 0" ] impl crate :: Resettable for STATUS_SPEC { # [ inline ( always ) ] fn reset_value ( ) -> Self :: Ux { 0 } } \ No newline at end of file diff --git a/s5l87xx/src/lcd/wcmd.rs b/s5l87xx/src/lcd/wcmd.rs new file mode 100644 index 0000000..2ad2e96 --- /dev/null +++ b/s5l87xx/src/lcd/wcmd.rs @@ -0,0 +1 @@ +# [ doc = "Register `WCMD` writer" ] pub struct W ( crate :: W < WCMD_SPEC > ) ; impl core :: ops :: Deref for W { type Target = crate :: W < WCMD_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [ inline ( always ) ] fn deref_mut ( & mut self ) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < WCMD_SPEC > > for W { # [ inline ( always ) ] fn from ( writer : crate :: W < WCMD_SPEC > ) -> Self { W ( writer ) } } # [ doc = "Field `WCMD` writer - Write LCD driver command" ] pub struct WCMD_W < 'a > { w : & 'a mut W , } impl < 'a > WCMD_W < 'a > { # [ doc = r"Writes raw bits to the field" ] # [ inline ( always ) ] pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( value as u32 & 0xff ) ; self . w } } impl W { # [ doc = "Bits 0:7 - Write LCD driver command" ] # [ inline ( always ) ] pub fn wcmd ( & mut self ) -> WCMD_W { WCMD_W { w : self } } # [ doc = "Writes raw bits to the register." ] # [ inline ( always ) ] pub unsafe fn bits ( & mut self , bits : u32 ) -> & mut Self { self . 0 . bits ( bits ) ; self } } # [ doc = "Write Command Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wcmd](index.html) module" ] pub struct WCMD_SPEC ; impl crate :: RegisterSpec for WCMD_SPEC { type Ux = u32 ; } # [ doc = "`write(|w| ..)` method takes [wcmd::W](W) writer structure" ] impl crate :: Writable for WCMD_SPEC { type Writer = W ; } # [ doc = "`reset()` method sets WCMD to value 0" ] impl crate :: Resettable for WCMD_SPEC { # [ inline ( always ) ] fn reset_value ( ) -> Self :: Ux { 0 } } \ No newline at end of file diff --git a/s5l87xx/src/lcd/wdata.rs b/s5l87xx/src/lcd/wdata.rs new file mode 100644 index 0000000..6505a32 --- /dev/null +++ b/s5l87xx/src/lcd/wdata.rs @@ -0,0 +1 @@ +# [ doc = "Register `WDATA` writer" ] pub struct W ( crate :: W < WDATA_SPEC > ) ; impl core :: ops :: Deref for W { type Target = crate :: W < WDATA_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [ inline ( always ) ] fn deref_mut ( & mut self ) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < WDATA_SPEC > > for W { # [ inline ( always ) ] fn from ( writer : crate :: W < WDATA_SPEC > ) -> Self { W ( writer ) } } impl W { # [ doc = "Writes raw bits to the register." ] # [ inline ( always ) ] pub unsafe fn bits ( & mut self , bits : u32 ) -> & mut Self { self . 0 . bits ( bits ) ; self } } # [ doc = "Write Data Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdata](index.html) module" ] pub struct WDATA_SPEC ; impl crate :: RegisterSpec for WDATA_SPEC { type Ux = u32 ; } # [ doc = "`write(|w| ..)` method takes [wdata::W](W) writer structure" ] impl crate :: Writable for WDATA_SPEC { type Writer = W ; } # [ doc = "`reset()` method sets WDATA to value 0" ] impl crate :: Resettable for WDATA_SPEC { # [ inline ( always ) ] fn reset_value ( ) -> Self :: Ux { 0 } } \ No newline at end of file diff --git a/s5l87xx/src/lib.rs b/s5l87xx/src/lib.rs new file mode 100644 index 0000000..46dde40 --- /dev/null +++ b/s5l87xx/src/lib.rs @@ -0,0 +1,2 @@ +# ! [ doc = "Peripheral access API for S5L8720 microcontrollers (generated using svd2rust v0.19.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] +svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.19.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust" ] # ! [ deny ( const_err ) ] # ! [ deny ( dead_code ) ] # ! [ deny ( improper_ctypes ) ] # ! [ deny ( missing_docs ) ] # ! [ deny ( no_mangle_generic_items ) ] # ! [ deny ( non_shorthand_field_patterns ) ] # ! [ deny ( overflowing_literals ) ] # ! [ deny ( path_statements ) ] # ! [ deny ( patterns_in_fns_without_body ) ] # ! [ deny ( private_in_public ) ] # ! [ deny ( unconditional_recursion ) ] # ! [ deny ( unused_allocation ) ] # ! [ deny ( unused_comparisons ) ] # ! [ deny ( unused_parens ) ] # ! [ deny ( while_true ) ] # ! [ allow ( non_camel_case_types ) ] # ! [ allow ( non_snake_case ) ] # ! [ no_std ] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [ doc = r"Number available in the NVIC for configuring priority" ] pub const NVIC_PRIO_BITS : u8 = 5 ; # [ allow ( unused_imports ) ] use generic :: * ; # [ doc = r"Common register and bit access and modify traits" ] pub mod generic ; # [ doc = "LCD Interface Controller" ] pub struct LCD { _marker : PhantomData < * const ( ) > } unsafe impl Send for LCD { } impl LCD { # [ doc = r"Pointer to the register block" ] pub const PTR : * const lcd :: RegisterBlock = 0x3830_0000 as * const _ ; # [ doc = r"Return the pointer to the register block" ] # [ inline ( always ) ] pub const fn ptr ( ) -> * const lcd :: RegisterBlock { Self :: PTR } } impl Deref for LCD { type Target = lcd :: RegisterBlock ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for LCD { fn fmt ( & self , f : & mut core :: fmt :: Formatter ) -> core :: fmt :: Result { f . debug_struct ( "LCD" ) . finish ( ) } } # [ doc = "LCD Interface Controller" ] pub mod lcd ; # [ no_mangle ] static mut DEVICE_PERIPHERALS : bool = false ; # [ doc = r"All the peripherals" ] # [ allow ( non_snake_case ) ] pub struct Peripherals { # [ doc = "LCD" ] pub LCD : LCD , } impl Peripherals { # [ doc = r"Unchecked version of `Peripherals::take`" ] # [ inline ] pub unsafe fn steal ( ) -> Self { DEVICE_PERIPHERALS = true ; Peripherals { LCD : LCD { _marker : PhantomData } , } } } \ No newline at end of file