109 lines
3.6 KiB
C
109 lines
3.6 KiB
C
#ifndef __PAGING_H__
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#define __PAGING_H__
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#include "types.h"
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#include "load_context.h"
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// Some helpful macros
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#define PAGING_GET_ML4_INDEX(x) (((u64)x >> 39) & 0x1FF)
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#define PAGING_GET_DPT_INDEX(x) (((u64)x >> 30) & 0x1FF)
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#define PAGING_GET_DIR_INDEX(x) (((u64)x >> 21) & 0x1FF)
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#define PAGING_GET_TAB_INDEX(x) (((u64)x >> 12) & 0x1FF)
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#define PAGING_GET_PAGE_OFFSET(x) (x & 0xFFF)
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// Intel-defined entries - strict!
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struct S_PAGING_TAB_ENTRY {
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u8 Present : 1;
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u8 RW : 1;
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u8 User : 1;
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u8 Accessed : 1;
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u8 Misc : 8;
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u64 Physical : 40; // The physical address is limited by MAXPHYADDR
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u16 Zero : 12;
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} __attribute__((packed));
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typedef struct S_PAGING_TAB_ENTRY T_PAGING_TAB_ENTRY;
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struct S_PAGING_DIR_ENTRY {
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u8 Present : 1;
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u8 RW : 1;
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u8 User : 1;
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u8 Accessed : 1;
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u8 Misc : 8;
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u64 Physical : 40; // The physical address is limited by MAXPHYADDR
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u64 Zero : 12;
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} __attribute__((packed));
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typedef struct S_PAGING_DIR_ENTRY T_PAGING_DIR_ENTRY;
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struct S_PAGING_DPT_ENTRY {
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u8 Present : 1;
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u8 RW : 1;
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u8 User : 1;
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u8 Accessed : 1;
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u8 Misc : 8;
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u64 Physical : 40; // The physical address is limited by MAXPHYADDR
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u64 Zero : 12;
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} __attribute__((packed));
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typedef struct S_PAGING_DPT_ENTRY T_PAGING_DPT_ENTRY;
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struct S_PAGING_ML4_ENTRY {
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u8 Present : 1;
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u8 RW : 1;
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u8 User : 1;
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u8 Accessed : 1;
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u8 Misc : 8;
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u64 Physical : 40; // The physical address is limited by MAXPHYADDR
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u64 Zero : 12;
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} __attribute__((packed));
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typedef struct S_PAGING_ML4_ENTRY T_PAGING_ML4_ENTRY;
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// OS-defined structures
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typedef struct {
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T_PAGING_TAB_ENTRY Entries[512];
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} __attribute__((packed)) T_PAGING_TAB;
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typedef struct {
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T_PAGING_DIR_ENTRY Entries[512]; // For use by the CPU
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} __attribute__((packed)) T_PAGING_DIR;
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typedef struct {
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T_PAGING_DPT_ENTRY Entries[512]; // For use by the CPU
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} __attribute__((packed)) T_PAGING_DPT;
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typedef struct {
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T_PAGING_ML4_ENTRY Entries[512]; // For use by the CPU
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} __attribute__((packed)) T_PAGING_ML4;
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T_PAGING_ML4 * paging_get_ml4(void);
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void paging_set_ml4(u64 ML4Physical);
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u8 paging_get_physical(u64 Virtual, u64 *Physical);
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u8 paging_get_physical_ex(u64 Virtual, u64 *Physical,T_PAGING_ML4 *ML4);
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void paging_kernel_initialize(u64 KernelVirtualStart, u64 KernelPhysicalStart, u64 KernelSize);
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// The temporary page is a page you can use to access some temporary physical
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// location. There is only one page, 4096 bytes large. Deal with it.
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void paging_temp_page_setup(void);
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volatile const u64 paging_temp_page_get_virtual(void);
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void paging_temp_page_set_physical(u64 Physical);
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// We have to prepare for virtual memory allocation from 0xFFFFFFFF00000000
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// right from the beggining, because that's the mapping that we will be using
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// in later parts of the code (see Tier1/CKernelML4.h), and there's not sense
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// in remapping everything.
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// This means we have to set up a page directory for our managed pool, fill
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// it up with a heap (from Tier0/heap.c), and attach that directory to a DPT.
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// Then, when we offload page management to CKernelML4, we have to let it know
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// about the state of all these things.
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void paging_scratch_initialize(void);
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// Allocates 4096 of physical and virtual memory in the kernel scratch buffer.
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// Warning, this memory cannot be freed.
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void *paging_scratch_map(u64 Physical);
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void *paging_scratch_allocate(void);
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// A simple page map call. This does no checks! Triple faults ahoy.
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void paging_map_page(u64 Virtual, u64 Physical);
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#endif
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